diff --git a/asm/sh3.txt b/asm/sh3.txt new file mode 100644 index 0000000..228c578 --- /dev/null +++ b/asm/sh3.txt @@ -0,0 +1,225 @@ +type: assembly +name: sh-3 +--- + +# Format: [01nmdi]{16}, followed by the mnemonic and the list of arguments. +# In each opcode, there should be at most one sequence of "m", "n", "d" and "i" +# each (representing the location of the argument). +# +# Possible argument strings are predefined and include: +# rn rm #imm +# jump8 jump12 disp pcdisp +# @rn @rm @rn+ @rm+ @-rn +# @(disp,rn) @(disp,rm) @(r0,rn) @(r0,rm) @(disp,gbr) +# +# The disassembler substitutes some elements as follows: +# rn -> value of the "n"-sequence +# rm -> value of the "m"-sequence +# #imm -> value of the "i"-sequence +# disp -> value of the "d"-sequence +# jump8 -> value of the 8-bit "d"-sequence x2 plus value of PC +# jump12 -> value of the 12-bit "d"-sequence x2 plus value of PC +# @(disp,pc) -> value of the 8-bit "d"-sequence x2 or x4, plus value of PC +# TODO: This list does not exactly reflect the behavior of the parser + +0000000001001000 clrs +0000000000001000 clrt +0000000000101000 clrmac +0000000000011001 div0u +0000000000111000 ldtlb +0000000000001001 nop +0000000000101011 rte +0000000000001011 rts +0000000001011000 sets +0000000000011000 sett +0000000000011011 sleep + +0100nnnn00010101 cmp/pl rn +0100nnnn00010001 cmp/pz rn +0100nnnn00010000 dt rn +0000nnnn00101001 movt rn +0100nnnn00000100 rotl rn +0100nnnn00000101 rotr rn +0100nnnn00100100 rotcl rn +0100nnnn00100101 rotcr rn +0100nnnn00100000 shal rn +0100nnnn00100001 shar rn +0100nnnn00000000 shll rn +0100nnnn00000001 shlr rn +0100nnnn00001000 shll2 rn +0100nnnn00001001 shlr2 rn +0100nnnn00011000 shll8 rn +0100nnnn00011001 shlr8 rn +0100nnnn00101000 shll16 rn +0100nnnn00101001 shlr16 rn + +0011nnnnmmmm1100 add rm, rn +0011nnnnmmmm1110 addc rm, rn +0011nnnnmmmm1111 addv rm, rn +0010nnnnmmmm1001 and rm, rn +0011nnnnmmmm0000 cmp/eq rm, rn +0011nnnnmmmm0010 cmp/hs rm, rn +0011nnnnmmmm0011 cmp/ge rm, rn +0011nnnnmmmm0110 cmp/hi rm, rn +0011nnnnmmmm0111 cmp/gt rm, rn +0010nnnnmmmm1100 cmp/str rm, rn +0011nnnnmmmm0100 div1 rm, rn +0010nnnnmmmm0111 div0s rm, rn +0011nnnnmmmm1101 dmuls.l rm, rn +0011nnnnmmmm0101 dmulu.l rm, rn +0110nnnnmmmm1110 exts.b rm, rn +0110nnnnmmmm1111 exts.w rm, rn +0110nnnnmmmm1100 extu.b rm, rn +0110nnnnmmmm1101 extu.w rm, rn +0110nnnnmmmm0011 mov rm, rn +0000nnnnmmmm0111 mul.l rm, rn +0010nnnnmmmm1111 muls.w rm, rn +0010nnnnmmmm1110 mulu.w rm, rn +0110nnnnmmmm1011 neg rm, rn +0110nnnnmmmm1010 negc rm, rn +0110nnnnmmmm0111 not rm, rn +0010nnnnmmmm1011 or rm, rn +0100nnnnmmmm1100 shad rm, rn +0100nnnnmmmm1101 shld rm, rn +0011nnnnmmmm1000 sub rm, rn +0011nnnnmmmm1010 subc rm, rn +0011nnnnmmmm1011 subv rm, rn +0110nnnnmmmm1000 swap.b rm, rn +0110nnnnmmmm1001 swap.w rm, rn +0010nnnnmmmm1000 tst rm, rn +0010nnnnmmmm1010 xor rm, rn +0010nnnnmmmm1101 xtrct rm, rn + +0100mmmm00001110 ldc rm, sr +0100mmmm00011110 ldc rm, gbr +0100mmmm00101110 ldc rm, vbr +0100mmmm00111110 ldc rm, ssr +0100mmmm01001110 ldc rm, spc +0100mmmm10001110 ldc rm, r0_bank +0100mmmm10011110 ldc rm, r1_bank +0100mmmm10101110 ldc rm, r2_bank +0100mmmm10111110 ldc rm, r3_bank +0100mmmm11001110 ldc rm, r4_bank +0100mmmm11011110 ldc rm, r5_bank +0100mmmm11101110 ldc rm, r6_bank +0100mmmm11111110 ldc rm, r7_bank +0100mmmm00001010 lds rm, mach +0100mmmm00011010 lds rm, macl +0100mmmm00101010 lds rm, pr +0000nnnn00000010 stc sr, rn +0000nnnn00010010 stc gbr, rn +0000nnnn00100010 stc vbr, rn +0000nnnn00110010 stc ssr, rn +0000nnnn01000010 stc spc, rn +0000nnnn10000010 stc r0_bank, rn +0000nnnn10010010 stc r1_bank, rn +0000nnnn10100010 stc r2_bank, rn +0000nnnn10110010 stc r3_bank, rn +0000nnnn11000010 stc r4_bank, rn +0000nnnn11010010 stc r5_bank, rn +0000nnnn11100010 stc r6_bank, rn +0000nnnn11110010 stc r7_bank, rn +0000nnnn00001010 sts mach, rn +0000nnnn00011010 sts macl, rn +0000nnnn00101010 sts pr, rn + +0100nnnn00101011 jmp @rn +0100nnnn00001011 jsr @rn +0000nnnn10000011 pref @rn +0100nnnn00011011 tas.b @rn +0010nnnnmmmm0000 mov.b rm, @rn +0010nnnnmmmm0001 mov.w rm, @rn +0010nnnnmmmm0010 mov.l rm, @rn +0110nnnnmmmm0000 mov.b @rm, rn +0110nnnnmmmm0001 mov.w @rm, rn +0110nnnnmmmm0010 mov.l @rm, rn +0000nnnnmmmm1111 mac.l @rm+, @rn+ +0100nnnnmmmm1111 mac.w @rm+, @rn+ + +0110nnnnmmmm0100 mov.b @rm+, rn +0110nnnnmmmm0101 mov.w @rm+, rn +0110nnnnmmmm0110 mov.l @rm+, rn + +0100mmmm00000111 ldc.l @rm+, sr +0100mmmm00010111 ldc.l @rm+, gbr +0100mmmm00100111 ldc.l @rm+, vbr +0100mmmm00110111 ldc.l @rm+, ssr +0100mmmm01000111 ldc.l @rm+, spc +0100mmmm10000111 ldc.l @rm+, r0_bank +0100mmmm10010111 ldc.l @rm+, r1_bank +0100mmmm10100111 ldc.l @rm+, r2_bank +0100mmmm10110111 ldc.l @rm+, r3_bank +0100mmmm11000111 ldc.l @rm+, r4_bank +0100mmmm11010111 ldc.l @rm+, r5_bank +0100mmmm11100111 ldc.l @rm+, r6_bank +0100mmmm11110111 ldc.l @rm+, r7_bank +0100mmmm00000110 lds.l @rm+, mach +0100mmmm00010110 lds.l @rm+, macl +0100mmmm00100110 lds.l @rm+, pr + +0010nnnnmmmm0100 mov.b rm, @-rn +0010nnnnmmmm0101 mov.w rm, @-rn +0010nnnnmmmm0110 mov.l rm, @-rn + +0100nnnn00000011 stc.l sr, @-rn +0100nnnn00010011 stc.l gbr, @-rn +0100nnnn00100011 stc.l vbr, @-rn +0100nnnn00110011 stc.l ssr, @-rn +0100nnnn01000011 stc.l spc, @-rn +0100nnnn10000011 stc.l r0_bank, @-rn +0100nnnn10010011 stc.l r1_bank, @-rn +0100nnnn10100011 stc.l r2_bank, @-rn +0100nnnn10110011 stc.l r3_bank, @-rn +0100nnnn11000011 stc.l r4_bank, @-rn +0100nnnn11010011 stc.l r5_bank, @-rn +0100nnnn11100011 stc.l r6_bank, @-rn +0100nnnn11110011 stc.l r7_bank, @-rn +0100nnnn00000010 sts.l mach, @-rn +0100nnnn00010010 sts.l macl, @-rn +0100nnnn00100010 sts.l pr, @-rn + +10000000nnnndddd mov.b r0, @(disp,rn) +10000001nnnndddd mov.w r0, @(disp,rn) +0001nnnnmmmmdddd mov.l rm, @(disp,rn) +10000100mmmmdddd mov.b @(disp,rm), r0 +10000101mmmmdddd mov.w @(disp,rm), r0 +0101nnnnmmmmdddd mov.l @(disp,rm), rn +0000nnnnmmmm0100 mov.b rm, @(r0,rn) +0000nnnnmmmm0101 mov.w rm, @(r0,rn) +0000nnnnmmmm0110 mov.l rm, @(r0,rn) +0000nnnnmmmm1100 mov.b @(r0,rm), rn +0000nnnnmmmm1101 mov.w @(r0,rm), rn +0000nnnnmmmm1110 mov.l @(r0,rm), rn +11000000dddddddd mov.b r0, @(disp,gbr) +11000001dddddddd mov.w r0, @(disp,gbr) +11000010dddddddd mov.l r0, @(disp,gbr) +11000100dddddddd mov.b @(disp,gbr), r0 +11000101dddddddd mov.w @(disp,gbr), r0 +11000110dddddddd mov.l @(disp,gbr), r0 + +11001101iiiiiiii and.b #imm, @(r0,gbr) +11001111iiiiiiii or.b #imm, @(r0,gbr) +11001100iiiiiiii tst.b #imm, @(r0,gbr) +11001110iiiiiiii xor.b #imm, @(r0,gbr) + +1001nnnndddddddd mov.w @(disp,pc), rn +1101nnnndddddddd mov.l @(disp,pc), rn +11000111dddddddd mova.l @(disp,pc), r0 + +0000mmmm00100011 braf rm +0000mmmm00000011 bsrf rm +10001011dddddddd bf jump8 +10001111dddddddd bf.s jump8 +10001001dddddddd bt jump8 +10001101dddddddd bt.s jump8 +1010dddddddddddd bra jump12 +1011dddddddddddd bsr jump12 + +0111nnnniiiiiiii add #imm, rn +11001001iiiiiiii and #imm, r0 +10001000iiiiiiii cmp/eq #imm, r0 +1110nnnniiiiiiii mov #imm, rn +11001011iiiiiiii or #imm, r0 +11001000iiiiiiii tst #imm, r0 +11001010iiiiiiii xor #imm, r0 +11000011iiiiiiii trapa #imm diff --git a/asm/sh4.txt b/asm/sh4.txt new file mode 100644 index 0000000..09f076a --- /dev/null +++ b/asm/sh4.txt @@ -0,0 +1,26 @@ +type: assembly +name: sh-4a-extensions +--- + +0000nnnn01110011 movco.l r0, @rn +0000mmmm01100011 movli.l @rm, r0 +0100mmmm10101001 movua.l @rm, r0 +0100mmmm11101001 movua.l @rm+, r0 +0000nnnn11000011 movca.l r0, @rn + +0000nnnn11100011 icbi @rn +0000nnnn10010011 ocbi @rn +0000nnnn10100011 ocbp @rn +0000nnnn10110011 ocbwb @rn + +0000nnnn11010011 prefi @rn +0000000010101011 synco + +0100mmmm00111010 ldc rm, sgr +0100mmmm11111010 ldc rm, dbr +0100mmmm00110110 ldc.l @rm+, sgr +0100mmmm11110110 ldc.l @rm+, dbr +0000nnnn00111010 stc sgr, rn +0000nnnn11111010 stc dbr, rn +0100nnnn00110010 stc.l sgr, @-rn +0100nnnn11110010 stc.l dbr, @-rn