forked from Lephenixnoir/fxos
_ic: new command to show claims on addresses
This commit is contained in:
parent
ee1c36db4e
commit
3a9a622ee3
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@ -68,11 +68,11 @@ bool Claim::intersects(Claim const &other) const
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std::string Claim::str() const
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{
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std::string details = format(" (claim %08x:%d)", address, size);
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std::string details = format(" (claim 0x%08x:%d)", address, size);
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switch(type) {
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case Claim::Function:
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return format("function %08x", owner) + details;
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return format("function at 0x%08x", owner) + details;
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case Claim::FunctionAuxiliary:
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return std::string("auxiliary data") + details;
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case Claim::Data:
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@ -80,7 +80,7 @@ std::string Claim::str() const
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case Claim::Zero:
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return std::string("zero region") + details;
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case Claim::Special:
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return format("special region %08x", address) + details;
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return format("special region at 0x%08x", address) + details;
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default:
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return format("<type %d>", type) + details;
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}
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@ -103,7 +103,7 @@ bool Disassembly::hasInstructionAt(uint32_t pc)
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Instruction *Disassembly::getInstructionAt(uint32_t pc, bool allowDiscovery)
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{
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if(pc & 1) {
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FxOS_log(ERR, "reading instruction for disassembly at %08x", pc);
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FxOS_log(ERR, "reading instruction for disassembly at 0x%08x", pc);
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pc &= -2;
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}
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@ -121,7 +121,7 @@ Instruction *Disassembly::getInstructionAt(uint32_t pc, bool allowDiscovery)
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return &this->instructions.at(pc);
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}
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else {
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FxOS_log(ERR, "reading non-existing instruction at %08x", pc);
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FxOS_log(ERR, "reading non-existing instruction at 0x%08x", pc);
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return nullptr;
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}
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}
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@ -222,7 +222,7 @@ bool FunctionPass::analyzeFunction(uint32_t pc)
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{
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Function *func = m_disasm.getFunctionAt(pc);
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if(!func) {
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FxOS_log(ERR, "no function at %08x", pc);
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FxOS_log(ERR, "no function at 0x%08x", pc);
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return false;
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}
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return this->analyzeFunction(*func);
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@ -23,7 +23,7 @@ bool CfgPass::analyzeInstruction(uint32_t pc, Instruction &i)
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/* Don't explore successors if the instruction cannot be decoded, not
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even pc+2. This will prevent wild overshoot. */
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if(!i.inst) {
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FxOS_log(ERR, "invalid instruction as %08x: %04x", pc, i.opcode);
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FxOS_log(ERR, "invalid instruction at 0x%08x: 0x%04x", pc, i.opcode);
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return false;
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}
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@ -38,7 +38,7 @@ bool CfgPass::analyzeInstruction(uint32_t pc, Instruction &i)
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auto &args = i.inst->args;
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if(i.inst->arg_count != 1 || args[0].kind != AsmArgument::PcJump) {
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FxOS_log(ERR, "invalid jump instruction at %08x", pc);
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FxOS_log(ERR, "invalid jump instruction at 0x%08x", pc);
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return false;
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}
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@ -50,8 +50,8 @@ bool CfgPass::analyzeInstruction(uint32_t pc, Instruction &i)
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/* Check that it's not in a delay slot */
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if(target.delayslot)
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throw std::logic_error(format("%08x jumps into %08x, which is a "
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"delay slot - this is unsupported by fxos and will produce "
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throw std::logic_error(format("0x%08x jumps into 0x%08x, which is "
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"a delay slot - this is unsupported by fxos and will produce "
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"garbage analysis! (x_x)", pc, jmptarget));
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}
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@ -60,7 +60,7 @@ bool CfgPass::analyzeInstruction(uint32_t pc, Instruction &i)
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set in the properties. */
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if(i.delayslot) {
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if(!i.inst->isvaliddelayslot()) {
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FxOS_log(ERR, "invalid delay slot at %08x", pc);
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FxOS_log(ERR, "invalid delay slot at 0x%08x", pc);
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return false;
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}
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}
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@ -68,11 +68,11 @@ bool CfgPass::analyzeInstruction(uint32_t pc, Instruction &i)
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else if(i.inst->isdelayed()) {
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Instruction &slot = *m_disasm.getInstructionAt(pc+2, true);
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if(slot.leader)
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throw std::logic_error(format("%08x is a leader and also a delay "
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"slot - this is unsupported by fxos and will produce garbage "
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throw std::logic_error(format("0x%08x is a leader and also a delay"
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" slot - this is unsupported by fxos and will produce garbage "
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"analysis! (x_x)", pc+2));
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if(!slot.inst->isvaliddelayslot()) {
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FxOS_log(ERR, "invalid delay slot at %08x", pc+2);
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FxOS_log(ERR, "invalid delay slot at 0x%08x", pc+2);
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return false;
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}
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12
shell/a.cpp
12
shell/a.cpp
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@ -239,10 +239,10 @@ static void ad_disassemble_all(VirtualSpace &space,
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/* We collect subfunction addresses while running the pass */
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for(int i = 0; i < (int)addresses.size(); i++) {
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uint32_t entry = addresses[i];
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printr("[cfg %d/%zu] Disassembling %08x...",
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printr("[cfg %d/%zu] Disassembling 0x%08x...",
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i+1, addresses.size(), entry);
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if(!cfg_pass.exploreFunction(entry)) {
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FxOS_log(ERR, "while processing %08x", entry);
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FxOS_log(ERR, "while processing 0x%08x", entry);
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errors++;
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if(!force) return;
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}
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@ -355,7 +355,7 @@ static ShellCommand _af4_cmd("af4",
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auto args = parse_af4(s, p);
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_af4(s, args.value, args.regions); },
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[](Session &s, Parser &p){ parse_af4(s, p); },
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"Analysis Find 4-aligned value", R"(
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"Analysis: Find 4-aligned value", R"(
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af4 <value> [<regions>...]
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Searches mapped memory for a 4-aligned 32-bit value. If regions are specified
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@ -376,7 +376,7 @@ static ShellCommand _afh_cmd("afh",
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_afh(s, args.reference.c_str(), args.pattern.c_str(), args.size,
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args.align, args.distance, args.regions); },
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[](Session &s, Parser &p){ parse_afh(s, p); },
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"Analysis Find Hexadecimal pattern", R"(
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"Analysis: Find Hexadecimal pattern", R"(
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afh [align=<value>] "<pattern>" [<regions>...]
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Searches mapped memory for a hexadecimal pattern with hole bytes. The pattern
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@ -404,7 +404,7 @@ static ShellCommand _ad_cmd("ad",
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auto addresses = parse_ad(s, p);
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_ad(s, addresses); },
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[](Session &s, Parser &p) { parse_ad(s, p); },
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"Analysis Disassemble", R"(
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"Analysis: Disassemble", R"(
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ad [<addresses>...]
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Disassemble the given set of addresses into the current virtual space's main
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@ -417,7 +417,7 @@ static ShellCommand _ads_cmd("ads",
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parse_ads(s, p);
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_ads(s); },
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[](Session &s, Parser &p) { parse_ads(s, p); },
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"Analysis Disassemble all Syscalls", R"(
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"Analysis: Disassemble all Syscalls", R"(
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ads
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Disassembles all syscalls entries using ad, which stores the results in the
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44
shell/i.cpp
44
shell/i.cpp
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@ -7,6 +7,39 @@
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#include <algorithm>
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#include <fmt/core.h>
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//---
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// ic
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//---
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struct _ic_args {
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std::vector<uint32_t> addresses;
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};
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static struct _ic_args parse_ic(Session &session, Parser &parser)
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{
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_ic_args args;
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while(!parser.at_end())
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args.addresses.push_back(parser.expr(session.current_space));
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parser.end();
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return args;
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}
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void _ic(Session &session, struct _ic_args const &args)
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{
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if(!session.current_space)
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return;
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for(uint32_t address: args.addresses) {
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Claim const *claim = session.current_space->disasm.getClaimAt(address);
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if(claim)
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fmt::print("0x{:08x} is claimed by {}\n", address, claim->str());
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else
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fmt::print("0x{:08x} is not claimed\n", address);
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}
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}
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//---
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// io
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//---
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@ -164,6 +197,17 @@ void _is(Session &session, std::string vspace_name, bool sort)
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// Command registration
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//---
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static ShellCommand _ic_cmd("ic",
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[](Session &s, Parser &p){ _ic(s, parse_ic(s, p)); },
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[](Session &s, Parser &p){ parse_ic(s, p); },
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"Info Claims", R"(
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ic <address>...
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Prints information about claims over the specified addresses. Claims are
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usually generated by analysis commands and allow sections of the OS to be
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marked as part of functions, data, interrupt handlers, etc.
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)");
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static ShellCommand _io_cmd("io",
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[](Session &s, Parser &p){ _io(s, parse_io(s, p)); },
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[](Session &s, Parser &p){ parse_io(s, p); },
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