#include <cpu.h>
#pragma once
#define HI_NIBBLE(b) (((b) >> 4) & 0x0F)
#define LO_NIBBLE(b) ((b) & 0x0F)

void instruction_mov_r_r(cpu_status_t*);
void instruction_mov_imm_r(cpu_status_t*);
void instruction_movt_r(cpu_status_t* status);
void instruction_swapb_r_r(cpu_status_t* status);
void instruction_mova_disp_pc_r0(cpu_status_t* status);

void instruction_movl_disp_pc_r(cpu_status_t*);
void instruction_movl_ar_r(cpu_status_t*);
void instruction_movl_r_ar(cpu_status_t*);
void instruction_movl_arp_r(cpu_status_t*);
void instruction_movl_r_amr(cpu_status_t*);
void instruction_movl_disp_r_r(cpu_status_t*);
void instruction_movl_r_disp_r(cpu_status_t*);
void instruction_movl_r0_r_r(cpu_status_t*);
void instruction_movl_r_r0_r(cpu_status_t*);
void instruction_movl_disp_gbr_r0(cpu_status_t*);

void instruction_movw_r0_disp_r(cpu_status_t* status);
void instruction_movw_disp_r_r0(cpu_status_t* status);
void instruction_movw_disp_pc_r0 (cpu_status_t* status);
void instruction_movw_r_ar(cpu_status_t* status);
void instruction_movw_arp_r(cpu_status_t* status);
void instruction_movw_r0_disp_gbr(cpu_status_t* status);
void instruction_movw_ar_r(cpu_status_t* status);
void instruction_movw_r0_r_r(cpu_status_t* status);
void instruction_movw_disp_gbr_r0(cpu_status_t* status);
void instruction_movw_r_r0_r(cpu_status_t* status);

void instruction_movb_ar_r(cpu_status_t* status);
void instruction_movb_r_ar(cpu_status_t* status);
void instruction_movb_arp_r(cpu_status_t* status);
void instruction_movb_r_amr(cpu_status_t* status);
void instruction_movb_disp_r_r0(cpu_status_t* status);
void instruction_movb_r0_r_r(cpu_status_t* status);
void instruction_movb_r_r0_r (cpu_status_t* status);
void instruction_movb_disp_gbr_r0(cpu_status_t* status);
void instruction_movb_r0_disp_r(cpu_status_t* status);
void instruction_movb_r0_disp_gbr(cpu_status_t* status);

void instruction_roctl_r(cpu_status_t* status);
void instruction_shar_r(cpu_status_t* status);
void instruction_shll2_r(cpu_status_t* status);
void instruction_shlr_r(cpu_status_t* status);
void instruction_shlr2_r(cpu_status_t* status);
void instruction_shld_r_r(cpu_status_t* status);
void instruction_shll_r(cpu_status_t* status);
void instruction_shll16_r(cpu_status_t* status);
void instruction_shll8_r(cpu_status_t* status);
void instruction_rotcr_r (cpu_status_t* status);
void instruction_shad_r_r(cpu_status_t* status);
void instruction_shlr16_r(cpu_status_t* status);
void instruction_shlr8_r(cpu_status_t* status);
void instruction_rotr_r (cpu_status_t* status);
void instruction_rotl_r (cpu_status_t* status);

void instruction_div1_r_r(cpu_status_t* status);
void instruction_add_r_r(cpu_status_t* status);
void instruction_add_imm_r(cpu_status_t* status);
void instruction_cmp_pz_r(cpu_status_t* status);
void instruction_cmp_gt_r_r(cpu_status_t* status);
void instruction_cmp_hs_r_r(cpu_status_t* status);
void instruction_sub_r_r(cpu_status_t* status);
void instruction_extuw_r_r(cpu_status_t* status);
void instruction_cmp_pl_r(cpu_status_t* status);
void instruction_cmp_eq_imm_r0(cpu_status_t* status);
void instruction_cmp_hi_r_r(cpu_status_t* status);
void instruction_cmp_ge_r_r(cpu_status_t* status);
void instruction_mull_r_r(cpu_status_t* status);
void instruction_cmp_eq_r_r(cpu_status_t* status);
void instruction_extub_r_r(cpu_status_t* status);
void instruction_dt_r(cpu_status_t* status);
void instruction_div0s_r_r(cpu_status_t* status);
void instruction_addc_r_r(cpu_status_t* status);
void instruction_subc_r_r(cpu_status_t* status);
void instruction_extsb_r_r(cpu_status_t* status);
void instruction_neg_r_r(cpu_status_t* status);
void instruction_cmp_str_r_r(cpu_status_t* status);
void instruction_div0u(cpu_status_t* status);
void instruction_tst_imm_r0 (cpu_status_t* status);
void instruction_dmulul_r_r(cpu_status_t* status);
void instruction_negc_r_r(cpu_status_t* status);

void instruction_jmp_r(cpu_status_t* status);
void instruction_bsr_lbl(cpu_status_t* status);
void instruction_jsr_ar(cpu_status_t* status);
void instruction_rts(cpu_status_t* status);
void instruction_bf_lbl(cpu_status_t* status);
void instruction_bra_lbl(cpu_status_t* status);
void instruction_bt_lbl(cpu_status_t* status);
void instruction_bts_lbl(cpu_status_t* status);
void instruction_bfs_lbl(cpu_status_t* status);
void instruction_braf_r(cpu_status_t* status);

void instruction_nop(cpu_status_t* status);
void instruction_stsl_mash_amr(cpu_status_t* status);
void instruction_stsl_macl_amr (cpu_status_t* status);
void instruction_stsl_pr_amr(cpu_status_t* status);
void instruction_clrt(cpu_status_t* status);
void instruction_ldsl_arp_pr(cpu_status_t* status);
void instruction_ldsl_arp_macl(cpu_status_t* status);
void instruction_sts_macl_r(cpu_status_t* status);
void instruction_ldc_r_gbr(cpu_status_t* status);
void instruction_stc_gbr_r(cpu_status_t* status);
void instruction_ldsl_arm_mach(cpu_status_t* status);
void instruction_sts_mach_r(cpu_status_t* status);

void instruction_tst_r_r(cpu_status_t* status);
void instruction_or_r_r(cpu_status_t* status);
void instruction_and_r_r(cpu_status_t* status);
void instruction_xor_r_r(cpu_status_t* status);
void instruction_and_imm_r0(cpu_status_t* status);
void instruction_not_r_r(cpu_status_t* status);
void instruction_or_imm_r0(cpu_status_t* status);
void instruction_xor_imm_r0(cpu_status_t* status);