fxos: switch to symbolic opcodes in AsmInstruction
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74fade0042
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068898c2d6
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@ -159,6 +159,14 @@ struct AsmInstruction
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IsDynamicJump = 0x40,
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};
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#define GENDEFS_INSN(NAME, STR) SH_##NAME,
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enum {
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#include "gendefs/insn.h"
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SH_MAX,
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};
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#undef GENDEFS_INSN
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static_assert(SH_MAX <= 0xff);
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AsmInstruction() = default;
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/* Construct with one or several arguments */
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@ -177,7 +185,7 @@ struct AsmInstruction
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u16 tags;
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/* Mnemonic **without the size indicator** */
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char mnemonic[12];
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char const *mnemonic() const;
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/* Arguments (up to 2) */
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AsmArgument args[2];
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@ -235,6 +243,10 @@ struct AsmInstruction
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/* Get the PC-relative target, assuming the instruction is at the provided
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address, for instructions with PC-relative offsets. */
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u32 getPCRelativeTarget(u32 pc) const;
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private:
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/* Assembler instruction name (mov, add, etc), without size modifier. */
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u8 m_opcode;
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};
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} /* namespace FxOS */
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@ -23,7 +23,7 @@ void register_instruction(AsmInstruction const &ins)
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if(insmap[encoding])
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FxOS_log(ERR, "encoding collision between a %s and a %s at %04x",
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insmap[encoding]->mnemonic, ins.mnemonic, encoding);
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insmap[encoding]->mnemonic(), ins.mnemonic(), encoding);
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else
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insmap[encoding] = ins;
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}
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25
lib/lang.cpp
25
lib/lang.cpp
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@ -9,6 +9,7 @@
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#include <fxos/util/format.h>
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#include <string>
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#include <cstring>
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#include <cassert>
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namespace FxOS {
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@ -195,6 +196,12 @@ u32 AsmArgument::getPCRelativeTarget(u32 pc, int size) const
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// Instruction management
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//---
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static char const *instructionMnemonics[] = {
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#define GENDEFS_INSN(NAME, STR) [AsmInstruction::SH_##NAME] = STR,
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#include "gendefs/insn.h"
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#undef GENDEFS_INSN
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};
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AsmInstruction::AsmInstruction(char const *mn):
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encoding {0}, opsize {0}, arg_count {0}
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{
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@ -214,9 +221,15 @@ AsmInstruction::AsmInstruction(char const *mn):
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len -= 2;
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}
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len = std::min(len, 11);
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strncpy(mnemonic, mn, len);
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mnemonic[len] = 0;
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int i;
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for(i = 0; i < SH_MAX; i++) {
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if(!strncmp(mn, instructionMnemonics[i], len)
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&& !instructionMnemonics[i][len]) {
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m_opcode = i;
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break;
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}
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}
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assert(i < SH_MAX && "AsmInstruction with unknown opcode string");
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}
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AsmInstruction::AsmInstruction(char const *mn, AsmArgument arg):
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@ -235,6 +248,12 @@ AsmInstruction::AsmInstruction(
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arg_count = 2;
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}
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char const *AsmInstruction::mnemonic() const
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{
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assert(m_opcode < SH_MAX);
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return instructionMnemonics[m_opcode];
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}
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u32 AsmInstruction::getPCRelativeTarget(u32 pc) const
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{
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for(int i = 0; i < this->arg_count; i++) {
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@ -152,9 +152,10 @@ static void doOldInst(u32 pc, OldInstruction &i,
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static char const *suffixes[5] = {"", ".b", ".w", "", ".l"};
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char const *suffix = suffixes[(i.inst->opsize <= 4) ? i.inst->opsize : 0];
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int spacing
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= i.inst->arg_count ? 8 - strlen(i.inst->mnemonic) - strlen(suffix) : 0;
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printf(" %s%s%*s", i.inst->mnemonic, suffix, spacing, "");
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int spacing = i.inst->arg_count
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? 8 - strlen(i.inst->mnemonic()) - strlen(suffix)
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: 0;
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printf(" %s%s%*s", i.inst->mnemonic(), suffix, spacing, "");
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/* Arguments */
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for(size_t n = 0; n < i.inst->arg_count; n++) {
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@ -246,9 +247,9 @@ void viewAssemblyInstruction(Instruction const &ins, ViewAssemblyOptions *opts)
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char const *suffix = suffixes[(opcode.opsize <= 4) ? opcode.opsize : 0];
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int spacing
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= opcode.arg_count ? 8 - strlen(opcode.mnemonic) - strlen(suffix) : 0;
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= opcode.arg_count ? 8 - strlen(opcode.mnemonic()) - strlen(suffix) : 0;
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std::string str = " ";
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str += opcode.mnemonic;
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str += opcode.mnemonic();
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str += suffix;
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str += std::string(spacing, ' ');
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