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61 Commits

Author SHA1 Message Date
Lephenixnoir 0373ae50fe
_ic: also print claims owned by provided address 2023-08-20 20:27:52 +02:00
Lephenixnoir 2dbd910379
fxos, _if: add insufficient call analysis 
We look for constants in call instruction parameters, but this only
works for jsr because the register argument in [jmp @rn] is not known to
be a constant yet (some static analysis required).
 2023-08-20 20:23:30 +02:00
Lephenixnoir df4bba2c1a
fxos: analyze pcrel in cfg (for future call analysis) 
This will not cover advanced stuff that relies on static analysis, but
we don't care at the moment.
 2023-08-20 19:42:06 +02:00
Lephenixnoir 44babe3baf
lib: allow declaring exclusive claims multiple times 2023-08-20 18:31:30 +02:00
Lephenixnoir 97029d4f3e
clang-format and other minor changes 2023-08-20 17:54:03 +02:00
Lephenixnoir a399ed31d7
relconst: fix a printing bug causing some constants to show as 0 
Constants (no base) that fit on a single byte would print as 0 due to
flawed logic.
 2022-12-29 22:16:47 +01:00
Dr-Carlos 5a3de5aa17 Allow building fxos with Clang 2022-12-20 15:33:29 +10:30
Dr-Carlos 0e6cec0821 Print all syscalls to 4 hex figures 2022-12-04 21:15:25 +10:30
Lephenixnoir cf2bc1870c
meta: provide automatic formatting with clang-format 2022-04-14 15:28:20 +01:00
Lephenixnoir 3a9a622ee3
_ic: new command to show claims on addresses 2022-04-06 18:41:41 +01:00
Lephenixnoir ee1c36db4e
_ads: functions now claim the instructions they explore 2022-04-06 12:15:34 +01:00
Lephenixnoir 4ab1df810b
fix mismatch of new[] and delete in Buffer 2022-04-06 09:36:29 +01:00
Lephenixnoir 23275d99c7
add infrastructure for function claiming parts of the binary 
The CFG pass will soon be extended to actually emit the claims.
 2022-04-05 19:35:52 +01:00
Lephenixnoir 6ae1a88bf7
_ads: register functions during discovery 2022-04-05 14:02:06 +01:00
Lephenixnoir d7b3fd0de8
add infrastructure for function passes 
Ported existing passes to the new pass interface, now working properly.
 2022-04-05 11:11:19 +01:00
Lephenixnoir 45888eb01c
add infrastructure for function passes (WIP) 2022-04-04 22:53:05 +01:00
Lephenixnoir 59ed0c8621
add main disassembly, ad and ads commands 2022-03-28 22:42:53 +01:00
Lephenixnoir 29cd2815ec
refactor disassembly infrastructure and passes 2022-03-28 20:59:30 +01:00
Lephenixnoir 1f475b0863
refactor vspace - remove most memory simulation 
All of it can be derived from translate_dynamic().
 2022-03-27 18:32:28 +01:00
Lephenixnoir e90ef447fc
more refactoring, still less exceptions: os 2022-03-27 17:39:42 +01:00
Lephenixnoir da69725697
more refactoring and minor style updates 2022-03-27 16:10:13 +01:00
Lephenixnoir a9660da767
get rid of exceptions in the library, use explicit errors 2022-03-27 13:59:49 +01:00
Lephenixnoir 50963d7c20
refactor logging utility 2022-03-27 12:57:36 +01:00
Lephenixnoir b37a056c2e
clean up indent for utils 2022-03-27 12:16:58 +01:00
Lephenixnoir 36fe7fcff4
refactor library utils 2022-03-27 12:12:53 +01:00
Lephenixnoir 2394725074
add OS checksum computations 2022-03-06 22:50:48 +00:00
Lephenixnoir 3b684389e9
replace CLI with WIP shell (huge commit) 2022-03-04 11:29:33 +00:00
Lephenixnoir 0a659cc6e6
memory: correct end address for RAM and RAM_P2 2021-03-18 18:44:16 +01:00
Lephenixnoir 41fbdb144e
remove long-unused parser file 2021-03-16 17:30:53 +01:00
Lephenixnoir cd52f5efd6
rename TargetDescription into Target 2021-03-16 17:30:28 +01:00
Lephenixnoir 245af5e993
rename Target into VirtualSpace 2021-03-16 14:43:43 +01:00
Lephenixnoir ca1217af1b
lib/load-asm: greatly improve loading time with less strings 2021-03-16 13:40:36 +01:00
Lephenixnoir dea24a2547
print: fix ellipses after non-decodable words 2021-03-16 13:40:01 +01:00
Lephenixnoir c8b28b447f
masive improvements to memory use by compacting core objects 
* Store CpuRegister on a single byte
* Store operation sizes (0, 1, 2, 4) on a single byte
* Share the (disp) and (imm) fields of instruction arguments
* Store instructions as char[12] instead of std::string (>32B)
* Store instruction args in Argument[2], not std::vector (>24B)

Size changes:
  CpuRegister:    4B ->  1B
  Argument:      24B ->  8B
  Instruction:  >64B -> 32B

This reduced the malloc size from 3.3M to 177k after a standard 40-line
disassembly (this excludes OS files mapped to memory), and improved the
loading time for the SH3 instruction table by about 30% (100 ms -> 65
ms).
 2021-03-16 13:37:55 +01:00
Lephenixnoir fc9b292846
main: print malloc() stats after disassembly in verbose mode 2021-03-16 13:35:23 +01:00
Lephenixnoir c20db6a8ca
minor data storage improvements 2021-03-16 13:19:48 +01:00
Lephenixnoir 4c9b738247
(cosmetics) 2021-03-16 12:29:39 +01:00
Lephenixnoir 23809e40ef
improve help message to reflect implemented functions 2021-03-16 12:27:19 +01:00
Lephenixnoir c36b63870a
info: fix serial number 2021-03-16 12:25:10 +01:00
Lephenixnoir 9c49114928
symbols: add os and mpu constraints to symbol tables 
Each of these constraints is specified in the header by an [os] or [mpu]
line. For the symbol table to be usable on a disassembly, both
constraints must be met:

* Either [os] is unset, no OS is used for disassembly, or the OS type is
  the same as the [os] constraint (either "fx" or "cg");
* Either [mpu] is unset, the disassembled target has no specified MPU,
  or the MPU type of the target is the same as the [mpu] constraint (eg
  "sh7305").
 2020-06-13 11:23:46 +02:00
Lephenixnoir a572f20d4d
os: support fx-CG OS structures 
This change adds OS parsing for fx-CG OSes; this includes the
information available in [fxos info] but also makes it possible to
disassemble syscalls using [fxos disasm].

Symbols and addresses, including syscall names, are still shared with
legacy FX versions, which is definitely a no-no.
 2020-06-13 10:47:13 +02:00
Lephenixnoir 772a67e35e
print: show ellipses when addresses jump in output 2020-06-11 20:03:42 +02:00
Lephenixnoir 2e58a8850b
support non-decoded instructions 
This finally makes it possible to disassemble any interval without
worrying about potential errors. That's some progress.

By the way, now we can fully disassemble fx@3.10. Takes about 6 seconds
for the analysis passes, and ~9 seconds for printing on my machine.
 2020-02-29 16:32:25 +01:00
Lephenixnoir c1c1be2d2c
support for mova, and more responsible OS creation 2020-02-29 11:25:03 +01:00
Lephenixnoir c5a7071dcc better manage exceptions and instruction-level passes 2020-02-28 16:19:50 +01:00
Lephenixnoir fad6f48152 print: indent code lines less (1 space instead of 2) 2020-02-27 15:13:05 +01:00
Lephenixnoir ff3aec0a34 library: do not try to load directories as data files 2020-02-27 15:11:42 +01:00
Lephenixnoir 54a79ca4b4
add support for flexible location specifiers 2020-02-17 22:56:41 +01:00
Lephenixnoir 5178a489be
add disassembly from arbitrary file 
Also changes the naked pointer of the Buffer object to a shared_ptr.
Still learning how to use this thing, but I'll manage eventually.
 2020-02-16 21:45:16 +01:00
Lephenixnoir 6ca3bc1f03
add the library command for a bit of introspection 
The library commands lists the targets and instruction sets that have
been loaded from fxos data files.
 2020-02-16 21:23:10 +01:00