Lephenixnoir
c8b28b447f
* Store CpuRegister on a single byte * Store operation sizes (0, 1, 2, 4) on a single byte * Share the (disp) and (imm) fields of instruction arguments * Store instructions as char[12] instead of std::string (>32B) * Store instruction args in Argument[2], not std::vector (>24B) Size changes: CpuRegister: 4B -> 1B Argument: 24B -> 8B Instruction: >64B -> 32B This reduced the malloc size from 3.3M to 177k after a standard 40-line disassembly (this excludes OS files mapped to memory), and improved the loading time for the SH3 instruction table by about 30% (100 ms -> 65 ms). |
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.. | ||
disasm-passes | ||
disassembly.h | ||
domains.h | ||
errors.h | ||
lang.h | ||
library.h | ||
load.h | ||
log.h | ||
memory.h | ||
os.h | ||
semantics.h | ||
symbols.h | ||
target.h | ||
util.h |