gint/include/gint/drivers/states.h

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kernel: driver and world system overhaul Changes in the driver and world system: * Rewrite driver logic to include more advanced concepts. The notion of binding a driver to a device is introduced to formalize wait(); power management is now built-in instead of being handled by the drivers (for instance DMA). The new driver model is described in great detail in <gint/drivers.h> * Formalized the concept of "world switch" where the hardware state is saved and later restored. As a tool, the world switch turns out to be very stable, and allows a lot of hardware manipulation that would be edgy at best when running in the OS world. * Added a GINT_DRV_SHARED flag for drivers to specify that their state is shared between worlds and not saved/restored. This has a couple of uses. * Exposed a lot more of the internal driver/world system as their is no particular downside to it. This includes stuff in <gint/drivers.h> and the driver's state structures in <gint/drivers/states.h>. This is useful for debugging and for cracked concepts, but there is no API stability guarantee. * Added a more flexible driver level system that allows any 2-digit level to be used. Feature changes: * Added a CPU driver that provides the VBR change as its state save. Because the whole context switch relied on interrupts being disabled anyway, there is no longer an inversion of control when setting the VBR; this is just part of the CPU driver's configuration. The CPU driver may also support other features such as XYRAM block transfer in the future. * Moved gint_inthandler() to the INTC driver under the name intc_handler(), pairing up again with intc_priority(). * Added a reentrant atomic lock based on the test-and-set primitive. Interrupts are disabled with IMASK=15 for the duration of atomic operations. * Enabled the DMA driver on SH7305-based fx-9860G. The DMA provides little benefit on this platform because the RAM is generally faster and buffers are ultimately small. The DMA is still not available on SH3-based fx-9860G models. * Solved an extremely obnoxious bug in timer_spin_wait() where the timer is not freed, causing the callback to be called when interrupts are re-enabled. This increments a random value on the stack. As a consequence of the change, removed the long delays in the USB driver since they are not actually needed. Minor changes: * Deprecated some of the elements in <gint/hardware.h>. There really is no good way to "enumerate" devices yet. * Deprecated gint_switch() in favor of a new function gint_world_switch() which uses the GINT_CALL abstraction. * Made the fx-9860G VRAM 32-aligned so that it can be used for tests with the DMA. Some features of the driver and world systems have not been implemented yet, but may be in the future: * Some driver flags should be per-world in order to create multiple gint worlds. This would be useful in Yatis' hypervisor. * A GINT_DRV_LAZY flag would be useful for drivers that don't want to be started up automatically during a world switch. This is relevant for drivers that have a slow start/stop sequence. However, this is tricky to do correctly as it requires dynamic start/stop and also tracking which world the current hardware state belongs to.
2021-04-23 18:50:20 +02:00
//---
// gint:drivers:states - State structures for drivers
//
// The state structures in this header are exposed for introspection and driver
// debugging purposes. This is not part of the gint API, and there is *no
// stability guarantee* across minor and patch versions of gint.
//---
#ifndef GINT_DRIVERS_STATES
#define GINT_DRIVERS_STATES
#include <gint/mpu/dma.h>
/* Clock Pulse Generator (see cpg/cpg.c) */
typedef struct {
uint32_t SSCGCR;
} cpg_state_t;
/* CPU (see cpu/cpu.c) */
typedef struct {
uint32_t SR;
uint32_t VBR;
uint32_t CPUOPM;
} cpu_state_t;
/* Direct Memory Access controller (see dma/dma.c) */
typedef struct {
sh7305_dma_channel_t ch[6];
uint16_t OR;
} dma_state_t;
/* Interrupt Controller (see intc/intc.c) */
typedef struct {
uint16_t IPR[12];
uint8_t MSK[13];
} intc_state_t;
/* Memory Manager Unit (see mmu/mmu.c) */
typedef struct {
uint32_t PASCR;
uint32_t IRMCR;
} mmu_state_t;
/* R61524 display (see r61524/r61524.c) */
typedef struct {
/* Graphics RAM range */
uint16_t HSA, HEA, VSA, VEA;
} r61524_state_t;
/* Real-time Clock (see rtc/rtc.c) */
typedef struct {
uint8_t RCR1, RCR2;
} rtc_state_t;
/* Sound Processing Unit (see spu/spu.c) */
typedef struct {
uint32_t PBANKC0, PBANKC1;
uint32_t XBANKC0, XBANKC1;
} spu_state_t;
/* T6K11 display (see t6k11/t6k11.c) */
typedef struct {
/* Some status bits, obtained by using the STRD command. There are other
parameters that cannot be read */
uint8_t STRD;
} t6k11_state_t;
/* Timer Unit (see tmu/tmu.c) */
typedef struct {
/* Individual timers; TSTR is used for ETMU */
struct tmu_state_stored_timer {
uint32_t TCOR;
uint32_t TCNT;
uint16_t TCR;
uint16_t TSTR;
} t[9];
/* TSTR value for TMU */
uint8_t TSTR;
} tmu_state_t;
/* USB 2.0 function module (see usb/usb.c) */
typedef struct {
/* Control and power-up. We don't save power-related registers from other
modules nor UPONCR, because they must be changed to use the module */
uint16_t SYSCFG, DVSTCTR, TESTMODE, REG_C2;
/* FIFO configuration */
uint16_t CFIFOSEL, D0FIFOSEL, D1FIFOSEL;
/* Interrupt configuration */
uint16_t INTENB0, BRDYENB, NRDYENB, BEMPENB, SOFCFG;
/* Default Control Pipe (maybe not needed) */
uint16_t DCPCFG, DCPMAXP, DCPCTR;
} usb_state_t;
#endif /* GINT_DRIVERS_STATES */