From 0c2935055e6d0b732b895dd57f47fc8f359aee72 Mon Sep 17 00:00:00 2001 From: Lephe Date: Fri, 15 Apr 2022 21:08:37 +0100 Subject: [PATCH] cpg: provide a function to recompute clock frequency --- include/gint/clock.h | 5 +++++ src/cpg/cpg.c | 20 +++++++++++++------- 2 files changed, 18 insertions(+), 7 deletions(-) diff --git a/include/gint/clock.h b/include/gint/clock.h index c70a9b7..2dc3d6c 100644 --- a/include/gint/clock.h +++ b/include/gint/clock.h @@ -52,6 +52,11 @@ typedef struct module; this address never changes. */ const clock_frequency_t *clock_freq(void); +/* cpg_compute_freq(): Compute the current clock frequency + This function updates the data structure returned by clock_freq() by + determining the current clock frequencies from the CPG. */ +void cpg_compute_freq(void); + //--- // Overclock //--- diff --git a/src/cpg/cpg.c b/src/cpg/cpg.c index a822e5a..8895669 100644 --- a/src/cpg/cpg.c +++ b/src/cpg/cpg.c @@ -29,7 +29,7 @@ const clock_frequency_t *clock_freq(void) #if defined(FX9860G) || (!defined(FX9860G) && !defined(FXCG50)) #define CPG SH7705_CPG -static void sh7705_probe(void) +void sh7705_probe(void) { /* According to Sentaro21 in the sources of Ftune 1.0.1, the clock mode is thought to be 5, which means that: @@ -115,10 +115,21 @@ static void sh7305_probe(void) #undef CPG + //--- // Initialization //--- +void cpg_compute_freq(void) +{ + /* This avoids warnings about sh7705_probe() being undefined when + building for fxcg50 */ + #if defined(FX9860G) || (!defined(FX9860G) && !defined(FXCG50)) + isSH3() ? sh7705_probe() : + #endif + sh7305_probe(); +} + static void configure(void) { /* Disable spread spectrum in SSGSCR */ @@ -127,12 +138,7 @@ static void configure(void) SH7305_CPG.SSCGCR.SSEN = 0; } - /* This avoids warnings about sh7705_probe() being undefined when - building for fxcg50 */ - #if defined(FX9860G) || (!defined(FX9860G) && !defined(FXCG50)) - isSH3() ? sh7705_probe() : - #endif - sh7305_probe(); + cpg_compute_freq(); } //---