diff --git a/fx9860g.ld b/fx9860g.ld index 476f318..b08d58c 100644 --- a/fx9860g.ld +++ b/fx9860g.ld @@ -15,19 +15,24 @@ MEMORY { /* Userspace mapping of the add-in (0x200 B are for the G1A header). 220k is the maximum amount of simultaneously-mappable code */ - rom (rx): o = 0x00300200, l = 220k + rom (rx): o = 0x00300200, l = 220k /* This is mapped to RAM; 8k on SH3, apparently 32k on SH4 */ - ram (rw): o = 0x08100000, l = 8k + ram (rw): o = 0x08100000, l = 8k /* gint's VBR space, mentioned here for completeness */ - vbr (rwx): o = 0x8800e000, l = 5k + vbr (rwx): o = 0x8800e000, l = 5k /* Some RAM region from P1 area; gint's data will reside here */ - rram (rwx): o = 0x8800f400, l = 3k + rram (rwx): o = 0x8800f400, l = 3k + /* On-chip IL memory */ + ilram (rwx): o = 0xe5200000, l = 4k + /* On-chip X and Y memory */ + xram (rwx): o = 0xe5007000, l = 8k + yram (rwx): o = 0xe5017000, l = 8k } SECTIONS { /* - ** ROM sections + ** ROM sections */ /* First address to be mapped to ROM (including G1A header) */ @@ -94,13 +99,16 @@ SECTIONS - Resources or assets from fxconv or similar converters - Data marked read-only by the compiler (.rodata and .rodata.*) */ .rodata : SUBALIGN(4) { + /* Put these first, they need to be 4-aligned */ + *(.rodata.4) + *(.rodata .rodata.*) } > rom /* - ** RAM sections + ** RAM sections */ . = ORIGIN(ram); @@ -142,12 +150,48 @@ SECTIONS _sdata = SIZEOF(.data) + SIZEOF(.data.4); + /* On-chip memory sections: IL, X and Y memory */ + + . = ORIGIN(ilram); + .ilram ALIGN(4) : ALIGN(4) { + _lilram = LOADADDR(.ilram); + _rilram = . ; + + *(.ilram) + + . = ALIGN(16); + } > ilram AT> rom + + . = ORIGIN(xram); + .xram ALIGN(4) : ALIGN(4) { + _lxram = LOADADDR(.xram); + _rxram = . ; + + *(.xram) + + . = ALIGN(16); + } > xram AT> rom + + . = ORIGIN(yram); + .yram ALIGN(4) : ALIGN(4) { + _lyram = LOADADDR(.yram); + _ryram = . ; + + *(.yram) + + . = ALIGN(16); + } > yram AT> rom + + _silram = SIZEOF(.ilram); + _sxram = SIZEOF(.xram); + _syram = SIZEOF(.yram); + /* - ** RRAM sections - ** 8800e000:4k VBR space - ** 8800f000:4k .gint.data and .gint.bss + ** RRAM sections + ** 8800e000:4k VBR space + ** 8800f000:4k .gint.data and .gint.bss */ /* VBR address: let's just start at the beginning of the RRAM area. @@ -185,7 +229,7 @@ SECTIONS /* - ** Other sections + ** Other sections */ /* Unwanted sections going to meet Dave Null: diff --git a/fxcg50.ld b/fxcg50.ld index cb5ab49..4f5a590 100644 --- a/fxcg50.ld +++ b/fxcg50.ld @@ -13,20 +13,25 @@ ENTRY(_start) MEMORY { /* Userspace mapping of the add-in (without G3A header) */ - rom (rx): o = 0x00300000, l = 220k + rom (rx): o = 0x00300000, l = 220k /* Static RAM; stack grows down from the end of this region. The first 0x2000 bytes are reserved by gint, see below */ - ram (rw): o = 0x08102000, l = 512k + ram (rw): o = 0x08102000, l = 512k /* gint's VBR space, mentioned here for completeness */ - vbr (rwx): o = 0x8c160000, l = 5k + vbr (rwx): o = 0x8c160000, l = 5k /* Some RAM region from P1 area; gint's data will reside here */ - rram (rwx): o = 0x8c161400, l = 3k + rram (rwx): o = 0x8c161400, l = 3k + /* On-chip IL memory */ + ilram (rwx): o = 0xe5200000, l = 4k + /* On-chip X and Y memory */ + xram (rwx): o = 0xe5007000, l = 8k + yram (rwx): o = 0xe5017000, l = 8k } SECTIONS { /* - ** ROM sections + ** ROM sections */ /* First address to be mapped to ROM */ @@ -87,7 +92,7 @@ SECTIONS - Data marked read-only by the compiler (.rodata and .rodata.*) */ .rodata : SUBALIGN(4) { /* Put these first, they need to be 4-aligned */ - *(.rodata.assets) + *(.rodata.4) *(.rodata .rodata.*) } > rom @@ -95,7 +100,7 @@ SECTIONS /* - ** RAM sections + ** RAM sections */ . = ORIGIN(ram); @@ -130,12 +135,48 @@ SECTIONS _sdata = SIZEOF(.data) + SIZEOF(.data.4); + /* On-chip memory sections: IL, X and Y memory */ + + . = ORIGIN(ilram); + .ilram ALIGN(4) : ALIGN(4) { + _lilram = LOADADDR(.ilram); + _rilram = . ; + + *(.ilram) + + . = ALIGN(16); + } > ilram AT> rom + + . = ORIGIN(xram); + .xram ALIGN(4) : ALIGN(4) { + _lxram = LOADADDR(.xram); + _rxram = . ; + + *(.xram) + + . = ALIGN(16); + } > xram AT> rom + + . = ORIGIN(yram); + .yram ALIGN(4) : ALIGN(4) { + _lyram = LOADADDR(.yram); + _ryram = . ; + + *(.yram) + + . = ALIGN(16); + } > yram AT> rom + + _silram = SIZEOF(.ilram); + _sxram = SIZEOF(.xram); + _syram = SIZEOF(.yram); + /* - ** gint-related sections - ** 8c160000:4k VBR space - ** 8c161000:4k .gint.data and .gint.bss + ** gint-related sections + ** 8c160000:4k VBR space + ** 8c161000:4k .gint.data and .gint.bss */ /* VBR address: let's just start at the beginning of the RAM area. @@ -173,7 +214,7 @@ SECTIONS /* - ** Other sections + ** Other sections */ /* Unwanted sections going to meet Dave Null: diff --git a/include/gint/defs/attributes.h b/include/gint/defs/attributes.h index 90c9f3d..c5f19d1 100644 --- a/include/gint/defs/attributes.h +++ b/include/gint/defs/attributes.h @@ -13,6 +13,10 @@ /* Additional sections that are only needed on SH3 */ #define GDATA3 __attribute__((section(".gint.data.sh3"))) #define GBSS3 __attribute__((section(".gint.bss.sh3"))) +/* Objects for the ILRAM, XRAM and YRAM regions */ +#define GILRAM __attribute__((section(".ilram"))) +#define GXRAM __attribute__((section(".xram"))) +#define GYRAM __attribute__((section(".yram"))) /* Unused parameters or variables */ #define GUNUSED __attribute__((unused)) diff --git a/src/core/start.c b/src/core/start.c index d509ba1..f9af83a 100644 --- a/src/core/start.c +++ b/src/core/start.c @@ -20,6 +20,9 @@ extern uint32_t brom, srom, /* Limits of ROM mappings */ lgdata, sgdata, rgdata, /* gint's data section */ ldata, sdata, rdata, /* User's data section */ + lilram, silram, rilram, /* IL memory section */ + lxram, sxram, rxram, /* X memory section */ + lyram, syram, ryram, /* Y memory section */ sbss, rbss, /* User's BSS section */ btors, mtors, etors; /* Constructor/destructor arrays */ extern gint_driver_t @@ -120,7 +123,10 @@ int start(int isappli, int optnum) /* Load data sections and wipe the bss section. This has to be done first for static and global variables to be initialized */ regcpy(lgdata, sgdata, rgdata); - regcpy(ldata, sdata, rdata); + regcpy(ldata, sdata, rdata); + regcpy(lilram, silram, rilram); + regcpy(lxram, sxram, rxram); + regcpy(lyram, syram, ryram); regclr(rbss, sbss); bootlog_loaded();