core: finalize TLB management in timer callbacks (STABLE)
This change enables interrupts within timer callbacks, making it possible to load pages to MMU while handling a timer underflow. The call to TLB_LoadPTEH() has been moved directly into the VBR handler to avoid jumping to ILRAM for a short call on SH4. The TMU and ETMU handlers have been changed to callback through a new function gint_inth_callback() that saves the user bank and a few registers, then invokes the callback with interrupts enabled and in user bank; until now, callbacks were invoked with interrupts disabled and in kernel bank. Note that IMASK is still set so a callback can only be interrupted by a high-priority interrupt. A timer_wait() function has also been added to simplify tests that involve timers. Finally, the priority level of the TMU0 underflow interrupt has been set to 13 (as per the comments) instead of 7. This version is the first stable version that handles TLB misses transparently for large add-ins. It is suitable for every gint application.
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2
TODO
2
TODO
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@ -1,5 +1,4 @@
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For the 2.1.0 release:
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* core: use gint_switch() to handle TLB misses
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* core: the four basic memory functions (with automated tests)
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* bopti: remove the deprecated image_t definition
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* project: remove the compat branch
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@ -12,6 +11,7 @@ Issues:
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* #10 support fx-CG 20
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Extensions on existing code:
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* bopti: try to display fullscreen images with TLB access + DMA on fxcg50
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* gray: add gprint()
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* gray: double-buffer gray settings and unify d* with g*
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* topti: support unicode fonts
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@ -141,6 +141,12 @@ void timer_pause(int timer);
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@timer Timer id, as returned by timer_setup() */
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void timer_stop(int timer);
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/* timer_wait() - wait for a timer to stop
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Waits until the specified timer stops running. If the timer is not running,
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returns immediately. The timer might not be free if it has just been paused
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instead of stopped entirely. */
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void timer_wait(int timer);
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//---
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// Predefined timer callbacks
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//---
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@ -11,6 +11,8 @@
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.global _gint_inth_7705
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#endif
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.global _gint_inth_callback
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.section .gint.blocks, "ax"
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.align 4
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@ -152,3 +154,70 @@ _inth_remap:
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.byte 0x2f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
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#endif
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/* CALLBACK HELPER
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This function implements the callback with context saving. It is a general
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function and does not need to reside in VBR space which is block-structured.
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This function saves registers r0_bank...r7_bank, enables interrupts,
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switches back to user bank and executes the callback. It does not save other
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registers (pr/mach/macl/gbr) which are managed by the handler entry. */
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.section .gint.mapped
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/* gint_inth_callback()
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Calls the specified function with the given argument after saving the user
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context, enabling interrupts and going to user bank.
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@r4 Callback function (volatile void * -> int)
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@r5 Argument (volatile void *)
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Returns the return value of the callback (int). */
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_gint_inth_callback:
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stc.l r0_bank, @-r15
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stc.l r1_bank, @-r15
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stc.l r2_bank, @-r15
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stc.l r3_bank, @-r15
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stc.l r4_bank, @-r15
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stc.l r5_bank, @-r15
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stc.l r6_bank, @-r15
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stc.l r7_bank, @-r15
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stc.l spc, @-r15
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stc.l ssr, @-r15
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stc.l sr, @-r15
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/* Enable interrupts and go back to user bank. SR.IMASK is already set
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to the level of the current interrupt, which makes sure we can only
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be re-interrupted by something with a higher priority. */
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mov.l .SR_clear_RB_BL, r1
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stc sr, r0
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and r1, r0
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ldc r0, sr
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/* We are now in the user bank, but we can still use r0..r7 as the
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important values have been saved on the stack. Call back. */
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stc r4_bank, r0
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sts.l pr, @-r15
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jsr @r0
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stc r5_bank, r4
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lds.l @r15+, pr
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/* We want to forward the return value to the system bank */
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ldc r0, r0_bank
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/* Restore the previous status register and the registers of the
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interrupted procedure. */
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ldc.l @r15+, sr
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ldc.l @r15+, ssr
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ldc.l @r15+, spc
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ldc.l @r15+, r7_bank
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ldc.l @r15+, r6_bank
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ldc.l @r15+, r5_bank
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ldc.l @r15+, r4_bank
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ldc.l @r15+, r3_bank
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ldc.l @r15+, r2_bank
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ldc.l @r15+, r1_bank
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rts
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ldc.l @r15+, r0_bank
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.align 4
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.SR_clear_RB_BL:
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.long ~((1 << 29) | (1 << 28))
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@ -9,8 +9,7 @@
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** * File system, because it's a mess and we might ruin the ROM.
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*/
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/* TLB management */
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.global ___TLB_LoadPTEH
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.section .pretext
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/* Dynamic allocation */
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.global _malloc
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@ -51,26 +50,6 @@
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#define syscall(id) syscall_(id, syscall_table)
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/*** Special syscalls that must remain mapped ***/
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.section .gint.mapped
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#ifdef FX9860G
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___TLB_LoadPTEH:
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syscall_(0x0003, 2f)
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2: .long 0x80010070
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#endif
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#ifdef FXCG50
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___TLB_LoadPTEH:
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syscall_(0x000c, 2f)
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2: .long 0x80020070
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#endif
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/*** Normal syscalls in ROM ***/
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.section .pretext
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#ifdef FX9860G
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/* Dynamic allocation */
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@ -28,8 +28,15 @@ test_tea:
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map:
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/* If TEA is mappable, map a page and return */
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mov.l .TLB_LoadPTEH, r0
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jsr @r0
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#ifdef FX9860G
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mov #3, r0
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#endif
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#ifdef FXCG50
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mov #12, r0
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#endif
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mov.l .syscall, r2
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jsr @r2
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nop
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lds.l @r15+, macl
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@ -66,5 +73,12 @@ panic:
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.long 0x00300000
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.max_mapped_rom:
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.long 0x00300000 + _srom
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.TLB_LoadPTEH:
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.long ___TLB_LoadPTEH
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#ifdef FX9860G
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.syscall:
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.long 0x80010070
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#endif
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#ifdef FXCG50
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.syscall:
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.long 0x80020070
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#endif
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@ -11,8 +11,8 @@
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priority registers or the interrupt masks, and make sure that all the
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interrupts that it leaves enabled are handled by the new VBR handlers.
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@arg vbr New VBR address (uint32_t)
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@arg configure Configuration function (void -> void)
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@r4 vbr New VBR address (uint32_t)
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@r5 configure Configuration function (void -> void)
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Returns the previous VBR address. */
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_gint_setvbr:
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mov.l r9, @-r15
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@ -40,9 +40,8 @@ _inth_tmu_0:
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mova .storage0, r0
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mov #0, r1
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/*** This is the first shared section ***/
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.clearflag:
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/*** This is the first shared section ***/
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.shared1:
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sts.l pr, @-r15
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mov.l r1, @-r15
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@ -54,32 +53,31 @@ _inth_tmu_0:
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mov.w r2, @r1
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/* Invoke the callback function and pass the argument */
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mov.l @r0, r1
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mov.l .gint_inth_callback_1, r1
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mov.l @r0, r4
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jsr @r1
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mov.l @(4, r0), r4
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mov.l @(4, r0), r5
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/* Prepare stopping the timer and jump to second section */
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/* Jump to second section */
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mov.l .timer_stop_1, r1
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bra .shared2
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mov.l @r15+, r4
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mov.l .timer_stop, r1
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bra .stoptimer
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nop
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/* SECOND GATE - TMU1 entry and stop timer */
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_inth_tmu_1:
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mova .storage1, r0
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bra .clearflag
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bra .shared1
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mov #1, r1
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/*** This is the second shared section ***/
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.stoptimer:
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/*** This is the second shared section ***/
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.shared2:
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/* Stop the timer if the return value is not zero */
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tst r0, r0
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bt .end
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bt .shared3
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jsr @r1
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nop
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.end:
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.shared3:
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lds.l @r15+, pr
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rts
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nop
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@ -89,10 +87,13 @@ _inth_tmu_1:
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/* THIRD GATE - TMU2 entry and storage for TMU0 */
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_inth_tmu_2:
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mova .storage2, r0
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bra .clearflag
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bra .shared1
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mov #2, r1
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.zero 14
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.zero 10
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.gint_inth_callback_1:
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.long _gint_inth_callback
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.storage0:
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.long 0 /* Callback: Configured dynamically */
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@ -104,8 +105,8 @@ _inth_tmu_storage:
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.mask:
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.long 0x0000feff
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.timer_stop:
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.long _timer_stop /* gint's function from <gint/timer.h> */
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.timer_stop_1:
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.long _timer_stop
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.storage1:
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.long 0 /* Callback: Configured dynamically */
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@ -142,27 +143,24 @@ _inth_tmu_storage:
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/* FIRST GATE - ETMU2 entry, invoke callback and prepare clear flag */
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_inth_etmu2:
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/* Warning: the size of the following section (4 bytes) is hardcoded in
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the jump in _inth_etmux */
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mova .storage_etmu2, r0
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mov #5, r1
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.extra_callback:
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.shared4:
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sts.l pr, @-r15
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mov.l r1, @-r15
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mov.l r0, @-r15
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/* Invoke the callback function */
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mov.l @r0, r1
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jsr @r1
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mov.l @(4, r0), r4
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/* Clear interrupt flag */
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mov.l .timer_clear, r2
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jsr @r2
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mov r1, r4
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/* Load timer ID and forward the callback's return value */
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mov.l .timer_clear, r1
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mov.l @r15+, r4
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/* Prepare invoking the callback function */
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mov.l @r15+, r0
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mov.l .gint_inth_callback_2, r1
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mov.l @r0, r4
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bra _inth_etmu_help
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mov r0, r5
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nop
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mov.l @(4, r0), r5
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.storage_etmu2:
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.long 0 /* Callback: Configured dynamically */
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@ -171,18 +169,28 @@ _inth_etmu2:
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/* SECOND GATE - Helper entry, invoke callback and stop timer if requested */
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_inth_etmu_help:
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/* Clear the flag and possibly stop the timer */
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/* Invoke callback; if return value is non-zero, stop timer */
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jsr @r1
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nop
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tst r0, r0
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bt .shared5
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mov.l .timer_stop_2, r1
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jsr @r1
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nop
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/* Clear the flag and possibly stop the timer */
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.shared5:
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lds.l @r15+, pr
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rts
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nop
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.zero 18
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.gint_inth_callback_2:
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.long _gint_inth_callback
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.timer_clear:
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.long _timer_clear /* gint's function from src/tmu/tmu.c */
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.long _timer_clear
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.timer_stop_2:
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.long _timer_stop
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/* THIRD GATE - All other ETMU entries, deferred to the previous ones */
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_inth_etmux:
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@ -198,11 +206,11 @@ _inth_etmux:
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nop
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/* Offset from VBR where extra timer 2 is located:
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- 0x600 to reach the interrupt handlers
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- 0x040 to jump over the entry gate
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- 0x840 to reach the handler of ETMU2
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- 0x004 to skip its first instructions (the size is hardcoded) */
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1: .long 0xe84
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* 0x600 to reach the interrupt handlers
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* 0x040 to jump over the entry gate
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* 0x840 to reach the handler of ETMU2
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* Skip over the first instructions */
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1: .long 0xe80 + (.shared4 - _inth_etmu2)
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.id_etmux:
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.long 0 /* Timer ID */
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@ -162,6 +162,22 @@ GMAPPED void timer_stop(int id)
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}
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}
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/* timer_wait() - wait until a timer is stopped */
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void timer_wait(int id)
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{
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if(id < 3)
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{
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tmu_t *T = &TMU[id];
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/* Sleep if an interruption will wake us up */
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while(*TSTR & (1 << id)) if(T->TCR.UNIE) sleep();
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}
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else
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{
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etmu_t *T = &ETMU[id];
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while(T->TSTR) if(T->TCR.UNIE) sleep();
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}
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}
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//---
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// Predefined timer callbacks
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//---
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@ -178,15 +194,12 @@ GMAPPED int timer_timeout(volatile void *arg)
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// Low-level functions
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//---
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/* timer_clear() - clear an ETMU flag and possibly stop the timer
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@timer Timer ID, must be an ETMU
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@stop Non-zero to stop the timer */
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GMAPPED void timer_clear(int id, int stop)
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/* timer_clear() - clear an ETMU flag
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@timer Timer ID, must be an ETMU */
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GMAPPED void timer_clear(int id)
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{
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do ETMU[id-3].TCR.UNF = 0;
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while(ETMU[id-3].TCR.UNF);
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if(stop) timer_stop(id);
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}
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//---
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@ -270,7 +283,7 @@ static void init(void)
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gint_inthandler(0xc60, inth_etmu_help, 32);
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/* Enable TMU0 at level 13, TMU1 at level 11, TMU2 at level 9 */
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gint_intlevel(0, 7);
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gint_intlevel(0, 13);
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gint_intlevel(1, 11);
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gint_intlevel(2, 9);
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