diff --git a/TODO b/TODO index f48dbae..f33b2e0 100644 --- a/TODO +++ b/TODO @@ -41,3 +41,4 @@ Future directions. * Serial communication * USB communication, using Yatis' reverse-engineering of the module * Make fx9860g projects work out of the box on fxcg50 +* Use the DSP to enhance parallel computation diff --git a/fxcg50.ld b/fxcg50.ld index 0750336..9c0cc47 100644 --- a/fxcg50.ld +++ b/fxcg50.ld @@ -13,7 +13,7 @@ ENTRY(_start) MEMORY { /* Userspace mapping of the add-in (without G3A header) */ - rom (rx): o = 0x00300000, l = 220k + rom (rx): o = 0x00300000, l = 2M /* Static RAM; stack grows down from the end of this region. The first 0x2000 bytes are reserved by gint, see below */ ram (rw): o = 0x08102000, l = 504k diff --git a/include/core/mmu.h b/include/gint/mmu.h similarity index 54% rename from include/core/mmu.h rename to include/gint/mmu.h index 38eccc2..b799c7a 100644 --- a/include/core/mmu.h +++ b/include/gint/mmu.h @@ -1,59 +1,27 @@ //--- -// core:mmu - MMU-related definitions -// -// gint does not touch the MMU because the risk of permanently wreaking -// the system is deemed too high. However, to ensure that the add-in runs -// properly, checks using read-only accesses to the MMU are performed. +// gint:mmu - Memory Management Unit //--- -#ifndef GINT_CORE_MMU -#define GINT_CORE_MMU +#ifndef GINT_MMU +#define GINT_MMU -#include -#include +#include //--- // SH7705 TLB //--- -/* tlb_addr_t - address part of a TLB entry */ -typedef struct -{ - uint VPN :22; - uint :1; - uint V :1; - uint ASID :8; - -} GPACKED(4) tlb_addr_t; - -/* tlb_data_t - data part of a TLB entry */ -typedef struct -{ - uint :3; - uint PPN :19; - uint :1; - uint V :1; - uint :1; - uint PR :2; - uint SZ :1; - uint C :1; - uint D :1; - uint SH :1; - uint :1; - -} GPACKED(4) tlb_data_t; - /* tlb_addr() - get the P4 address of a TLB address entry @way TLB way (0..3) @E Entry number (0..31) Returns a pointer to the entry. */ -const tlb_addr_t *tlb_addr(uint way, uint E); +tlb_addr_t const *tlb_addr(uint way, uint E); /* tlb_data() - get the P4 address of a TLB data entry @way TLB way (0..3) @E Entry number (0..31) Returns a pointer to the entry. */ -const tlb_data_t *tlb_data(uint way, uint E); +tlb_data_t const *tlb_data(uint way, uint E); /* tlb_mapped_memory() - count amount of mapped memory This function returns the amount of mapped text and data segment memory, in @@ -70,42 +38,15 @@ void tlb_mapped_memory(uint32_t *p_rom, uint32_t *p_ram); // SH7305 Unified TLB //--- -/* utlb_addr_t - address part of a UTLB entry */ -typedef struct -{ - uint VPN :22; - uint D :1; - uint V :1; - uint ASID :8; - -} GPACKED(4) utlb_addr_t; - /* utlb_addr() - get the P4 address of a UTLB address entry @E Entry number (should be in range 0..63) Returns a pointer to the entry. */ const utlb_addr_t *utlb_addr(uint E); -/* utlb_data_t - data part of a UTLB entry */ -typedef struct -{ - uint :3; - uint PPN :19; - uint :1; - uint V :1; - uint SZ1 :1; - uint PR :2; - uint SZ2 :1; - uint C :1; - uint D :1; - uint SH :1; - uint WT :1; - -} GPACKED(4) utlb_data_t; - /* utlb_data() - get the P4 address of a UTLB data entry @E Entry number (should be in range 0..63) Returns a pointer to the entry. */ -const utlb_data_t *utlb_data(uint E); +utlb_data_t const *utlb_data(uint E); /* utlb_mapped_memory() - count amount of mapped memory This function returns the amount of mapped text and data segment memory, in @@ -118,4 +59,4 @@ const utlb_data_t *utlb_data(uint E); @ram Pointer to amount of mapped RAM */ void utlb_mapped_memory(uint32_t *rom, uint32_t *ram); -#endif /* GINT_CORE_MMU */ +#endif /* GINT_MMU */ diff --git a/include/gint/mpu/mmu.h b/include/gint/mpu/mmu.h new file mode 100644 index 0000000..b81aa9b --- /dev/null +++ b/include/gint/mpu/mmu.h @@ -0,0 +1,80 @@ +//--- +// gint:mpu:mmu - Memory Management Unit +// +// The MMU mainly exposes the contents of the TLB for us to inspect. +// Functions to manipulate these are exposed by . +//--- + +#ifndef GINT_MPU_MMU +#define GINT_MPU_MMU + +#include +#include + +//--- +// SH7705 TLB. Refer to: +// "Renesas SH7705 Group Hardware Manual" +// Section 3: "Memory Manaegement Unit (MMU)" +//--- + +/* tlb_addr_t - address part of a TLB entry */ +typedef struct +{ + uint VPN :22; + uint :1; + uint V :1; + uint ASID :8; + +} GPACKED(4) tlb_addr_t; + +/* tlb_data_t - data part of a TLB entry */ +typedef struct +{ + uint :3; + uint PPN :19; + uint :1; + uint V :1; + uint :1; + uint PR :2; + uint SZ :1; + uint C :1; + uint D :1; + uint SH :1; + uint :1; + +} GPACKED(4) tlb_data_t; + +//--- +// SH7305 TLB. Refer to: +// "Renesas SH7724 User's Manual: Hardware" +// Section 7: "Memory Management Unit (MMU)" +//--- + +/* utlb_addr_t - address part of a UTLB entry */ +typedef struct +{ + uint VPN :22; + uint D :1; + uint V :1; + uint ASID :8; + +} GPACKED(4) utlb_addr_t; + +/* utlb_data_t - data part of a UTLB entry */ +typedef struct +{ + uint :3; + uint PPN :19; + uint :1; + uint V :1; + uint SZ1 :1; + uint PR :2; + uint SZ2 :1; + uint C :1; + uint D :1; + uint SH :1; + uint WT :1; + +} GPACKED(4) utlb_data_t; + +#endif /* GINT_MPU_MMU */ diff --git a/src/core/bootlog.c b/src/core/bootlog.c index 4cd30a8..5339f34 100644 --- a/src/core/bootlog.c +++ b/src/core/bootlog.c @@ -5,7 +5,7 @@ #include #include #include -#include +#include #include #include diff --git a/src/core/mmu.c b/src/core/mmu.c index b8ab0a4..3912924 100644 --- a/src/core/mmu.c +++ b/src/core/mmu.c @@ -2,7 +2,7 @@ // gint:core:mmu - MMU-related definitions //--- -#include +#include #include //--- diff --git a/src/core/setup.c b/src/core/setup.c index 052fefe..dadc3af 100644 --- a/src/core/setup.c +++ b/src/core/setup.c @@ -14,7 +14,7 @@ /* VBR address, from the linker script */ extern char gint_vbr[]; /* System's VBR address */ -GBSS static uint32_t system_vbr; +GBSS uint32_t system_vbr; /* Size of exception and TLB handler */ extern char gint_exch_tlbh_size; /* Driver table */ diff --git a/src/core/start.c b/src/core/start.c index 07c3be7..0f9cf21 100644 --- a/src/core/start.c +++ b/src/core/start.c @@ -5,7 +5,7 @@ #include #include #include -#include +#include #include #include #include @@ -140,7 +140,7 @@ int start(int isappli, int optnum) bootlog_mapped(rom, ram); /* Cancel add-in execution if not all pages are mapped */ - if(rom < (uint32_t)&srom) gint_panic(0x1040); +// if(rom < (uint32_t)&srom) gint_panic(0x1040); /* Install gint and switch VBR */ gint_install(); diff --git a/src/core/syscalls.S b/src/core/syscalls.S index fefc997..0efb627 100644 --- a/src/core/syscalls.S +++ b/src/core/syscalls.S @@ -9,6 +9,9 @@ ** * File system, because it's a mess and we might ruin the ROM. */ +/* TLB management */ +.global ___TLB_LoadPTEH + /* Dynamic allocation */ .global _malloc .global _free @@ -50,6 +53,11 @@ #ifdef FX9860G +/* TLB Management */ + +___TLB_LoadPTEH: + syscall(0x0003) + /* Dynamic allocation */ _malloc: @@ -110,6 +118,11 @@ syscall_table: #ifdef FXCG50 +/* TLB Management */ + +___TLB_LoadPTEH: + syscall(0x000c) + /* Dynamic allocation */ _malloc: