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cpg, power: improve peripheral register descriptions 

The POWER and CPG modules have been reverse-engineered by Yatis.
This commit is contained in:
Lephe 2020-10-21 14:48:04 +02:00
parent 19951ccf62
commit 858ec8aa12
Signed by: Lephenixnoir
GPG Key ID: 1BBA026E13FC0495
2 changed files with 50 additions and 28 deletions
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23
include/gint/mpu/cpg.h
View File

@ -54,7 +54,17 @@ typedef volatile struct
uint32_t :4;
uint32_t P1FC :4; /* Pphi divider 1 [*] */
);
pad(0x20);
pad(0x4);
lword_union(FSICLKCR,
uint32_t :16;
uint32_t DIVB :6; /* Division ratio for port B */
uint32_t :1;
uint32_t CLKSTP :1; /* Clock Stop */
uint32_t SRC :2; /* Clock source select */
uint32_t DIVA :6; /* Division ratio for port A */
);
pad(0x18);
lword_union(PLLCR,
uint32_t :17;
@ -65,8 +75,17 @@ typedef volatile struct
uint32_t CKOFF :1; /* CKO Output Stop */
uint32_t :1;
);
pad(0x14);
lword_union(SPUCLKCR,
uint32_t :23;
uint32_t CLKSTP :1; /* Clock Stop */
uint32_t _ :1; /* Unknown */
uint32_t :1;
uint32_t DIV :6; /* Division ratio */
);
pad(0x4);
pad(0x1c);
lword_union(SSCGCR,
uint32_t SSEN :1; /* Spread Spectrum Enable */
uint32_t :31;

55
include/gint/mpu/power.h
View File

@ -37,8 +37,8 @@ typedef volatile struct
uint32_t RS :1;
uint32_t IL :1;
uint32_t SndCache :1;
uint32_t _unknown1 :1;
uint32_t :1;
uint32_t FPU :1;
uint32_t :1;
uint32_t INTC :1;
@ -53,41 +53,44 @@ typedef volatile struct
uint32_t CMT :1;
uint32_t RWDT :1;
uint32_t DMAC1 :1;
uint32_t :1;
uint32_t TMU1 :1;
uint32_t SCIF0 :1;
uint32_t SCIF1 :1;
uint32_t :4;
uint32_t SCIF2 :1;
uint32_t SCIF3 :1;
uint32_t SCIF4 :1;
uint32_t SCIF5 :1;
uint32_t :1;
uint32_t SCIF :1;
uint32_t KEYSC :1;
uint32_t RTC :1;
uint32_t :2;
uint32_t MSIOF0 :1;
uint32_t MSIOF1 :1;
uint32_t :1;
);
/* Module Stop Control Register 1 */
lword_union(MSTPCR1,
uint32_t :19;
uint32_t KEYSC :1;
uint32_t RTC :1;
uint32_t :1;
uint32_t I2C0 :1;
uint32_t I2C1 :1;
uint32_t :8;
);
/* Module Stop Control Register 2
I stripped down this one to remove any fancy modules from the SH7724
that are unlikely to even be present in the SH7305. */
The list was established by Yatis. See <https://bible.planet-casio.
com/yatis/hardware/sh7305/power.html>. */
lword_union(MSTPCR2,
uint32_t :2;
uint32_t MMC :1;
uint32_t :1;
uint32_t ADC :1;
uint32_t :6;
uint32_t TPU :1;
uint32_t :4;
uint32_t USB0 :1;
uint32_t :20;
uint32_t :2;
uint32_t SDC :1;
uint32_t :2;
uint32_t FLCTL :1;
uint32_t ECC :1;
uint32_t :1;
uint32_t I2C :1;
uint32_t :1;
uint32_t SPU :1;
uint32_t _unknown2 :1;
uint32_t :1;
uint32_t LCDC :1;
uint32_t _unknown3 :1;
uint32_t Cmod :1;
uint32_t :1;
uint32_t Cmod2A :1;
uint32_t :2;
);
pad(4);