corrected dupdate redirection as per dmode (normal / gray engine) - gray engine now woking on FX9860G_AS_CG target
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@ -243,7 +243,7 @@ set(SOURCES_CG
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set(SOURCES_FXASCG
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# Gray engine
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src/gray/engine_fxascg.c
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src/render-fxascg/engine_fxascg.c
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src/gray/gclear.c
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src/gray/ggetpixel.c
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src/gray/gint_gline.c
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@ -81,16 +81,55 @@ inline drawupscale( int x, int y, int color )
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/* dupdate(): Push the video RAM to the display driver */
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void dupdate(void)
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{
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bool run_default = true;
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for( int j=0; j<DHEIGHT; j++ ) // 64 lines
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{
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for( int i=0; i<DWIDTH; i++ ) // 128 column
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if(dmode && dmode->dupdate)
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{
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/* Call the overridden dupdate(), but continue if it returns
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non-zero (this is used when stopping the gray engine) */
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int rc = dmode->dupdate();
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run_default = (rc != 0);
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}
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if(run_default)
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{
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for( int j=0; j<DHEIGHT; j++ ) // 64 lines
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{
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drawupscale( i, j, dgetpixel(i,j) ); // really not optimised; just to check if OK
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}
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}
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for( int i=0; i<DWIDTH; i++ ) // 128 column
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{
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drawupscale( i, j, dgetpixel(i,j) ); // really not optimised; just to check if OK
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}
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}
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r61524_display(cg_vram, 0, 224, R61524_DMA_WAIT );
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//draw a black layer around the screen
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int base1 = 0;
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int base2 = (64*3+16)*396;
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for(int u = 0; u<16; u++)
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{
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for(int v = 0; v<396; v++)
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{
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cg_vram[base1+v] = 0;
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cg_vram[base2+v] = 0;
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}
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base1+=396;
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base2+=396;
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}
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base1 = 16*396;
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base2 = 16*396+6+128*3;
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for(int u = 0; u<64*3; u++)
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{
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for(int v = 0; v<6; v++)
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{
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cg_vram[base1+v] = 0;
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cg_vram[base2+v] = 0;
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}
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base1+=396;
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base2+=396;
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}
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r61524_display(cg_vram, 0, 224, R61524_DMA_WAIT );
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}
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gint_call(dupdate_get_hook());
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}
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@ -292,7 +292,6 @@ int gupdate(void)
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}
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uint32_t *light, *dark;
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dgray_getvram(&light, &dark);
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@ -311,6 +310,34 @@ int gupdate(void)
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}
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}
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//draw a black layer around the screen
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int base1 = 0;
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int base2 = (64*3+16)*396;
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for(int u = 0; u<16; u++)
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{
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for(int v = 0; v<396; v++)
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{
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cg_vram_gray[base1+v] = 0;
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cg_vram_gray[base2+v] = 0;
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}
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base1+=396;
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base2+=396;
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}
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base1 = 16*396;
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base2 = 16*396+6+128*3;
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for(int u = 0; u<64*3; u++)
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{
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for(int v = 0; v<6; v++)
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{
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cg_vram_gray[base1+v] = 0;
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cg_vram_gray[base2+v] = 0;
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}
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base1+=396;
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base2+=396;
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}
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r61524_display(cg_vram_gray, 0, 224, R61524_DMA_WAIT );
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/* When the engine is running, swap frames */
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