Commit Graph

14 Commits

Author SHA1 Message Date
calamari 5c331e5fa0 Add isSlim() macro 2022-09-25 10:37:18 -07:00
calamari b23ed9629e Add HWCALC entry for fx-9860G Slim 2022-09-24 19:48:07 -07:00
Lephe 2e5e56f82e
hardware: expose filesystem type in the hardware info
Filesystem type is detected with a trivial heuristic:
* fx-9860G: CASIOWIN, unless Fugue in the G-III series (OS >= 3.00)
* fx-CG 50: Always Fugue
2021-12-06 21:31:00 +01:00
Lephe 10180d31bc
add C++ header guards 2021-06-13 18:13:09 +02:00
Lephe c9264a06d5
kernel: driver and world system overhaul
Changes in the driver and world system:

* Rewrite driver logic to include more advanced concepts. The notion of
  binding a driver to a device is introduced to formalize wait(); power
  management is now built-in instead of being handled by the drivers
  (for instance DMA). The new driver model is described in great detail
  in <gint/drivers.h>

* Formalized the concept of "world switch" where the hardware state is
  saved and later restored. As a tool, the world switch turns out to be
  very stable, and allows a lot of hardware manipulation that would be
  edgy at best when running in the OS world.

* Added a GINT_DRV_SHARED flag for drivers to specify that their state
  is shared between worlds and not saved/restored. This has a couple of
  uses.

* Exposed a lot more of the internal driver/world system as their is no
  particular downside to it. This includes stuff in <gint/drivers.h>
  and the driver's state structures in <gint/drivers/states.h>. This is
  useful for debugging and for cracked concepts, but there is no
  API stability guarantee.

* Added a more flexible driver level system that allows any 2-digit
  level to be used.

Feature changes:

* Added a CPU driver that provides the VBR change as its state save.
  Because the whole context switch relied on interrupts being disabled
  anyway, there is no longer an inversion of control when setting the
  VBR; this is just part of the CPU driver's configuration. The CPU
  driver may also support other features such as XYRAM block transfer
  in the future.

* Moved gint_inthandler() to the INTC driver under the name
  intc_handler(), pairing up again with intc_priority().

* Added a reentrant atomic lock based on the test-and-set primitive.
  Interrupts are disabled with IMASK=15 for the duration of atomic
  operations.

* Enabled the DMA driver on SH7305-based fx-9860G. The DMA provides
  little benefit on this platform because the RAM is generally faster
  and buffers are ultimately small. The DMA is still not available on
  SH3-based fx-9860G models.

* Solved an extremely obnoxious bug in timer_spin_wait() where the
  timer is not freed, causing the callback to be called when interrupts
  are re-enabled. This increments a random value on the stack. As a
  consequence of the change, removed the long delays in the USB driver
  since they are not actually needed.

Minor changes:

* Deprecated some of the elements in <gint/hardware.h>. There really is
  no good way to "enumerate" devices yet.

* Deprecated gint_switch() in favor of a new function
  gint_world_switch() which uses the GINT_CALL abstraction.

* Made the fx-9860G VRAM 32-aligned so that it can be used for tests
  with the DMA.

Some features of the driver and world systems have not been implemented
yet, but may be in the future:

* Some driver flags should be per-world in order to create multiple
  gint worlds. This would be useful in Yatis' hypervisor.
* A GINT_DRV_LAZY flag would be useful for drivers that don't want to
  be started up automatically during a world switch. This is relevant
  for drivers that have a slow start/stop sequence. However, this is
  tricky to do correctly as it requires dynamic start/stop and also
  tracking which world the current hardware state belongs to.
2021-04-23 20:44:08 +02:00
Lephe ee7b4f27b8
add a dynamic setting for keyboard scan frequency
The repeat delays of getkey() are adjusted automatically, however a
repeat that is currently going on might be affected.

Also, repeat delays are always approximated as a whole number of
keyboard scans so an increase in scan frequency can impact the speed at
which repeats are emitted.
2021-02-02 18:19:10 +01:00
Lephe bf21246f13
kernel: mask interrupts during callbacks on fx-CG Manager
The fx-CG Manager holds but ignores the CPUOPM.INTMU bit, which means
that we have to mask interrupts as on SH3.
2020-07-20 16:44:27 +02:00
Lephe 7d63a1b536
r61524 render-cg: support Prizm and fx-CG Manager
This change adds a new HWCALC model, HWCALC_FXCG_MANAGER, which
identifies Casio's official fx-CG Manager software. Both the Prizm and,
to my surprise, the fx-CG Manager use the old RAM address of 88000000
(P1) and a8000000 (P2) instead of the new fx-CG 50 address of 8c000000
(P1) and ac000000 (P2).

The VRAM is hence adjusted at startup to move hardcoded pointers into
the proper space. Added to the kernel moving the VBR space dynamically
on the Prizm, this allows gint to be fully compatible with these
platforms.

The fx-CG Manager is detected by its product ID made of 0xff.

Also adds a proper interface to the R61524 driver, even though it's not
any more complete than previously, and fixes an oversight where the
HWURAM entry of the kernel data array was no longer computed since the
TLB management change.

As of now, the fx-CG Manager still has a bug regarding return-to-menu
since returning from the main menu doesn't work very well and often
loops. This has been seen occasionally on some Graph 90+E so it's
unlikely to be a platform-specific problem.
2020-07-02 15:48:19 +02:00
Lephe a91a0a483b
core: remove some useless hardware info 2020-06-20 19:23:50 +02:00
Lephe 0498344349
periodic check of SH3 compatibility 2020-05-31 22:26:30 +02:00
Lephe 61da7debc8
code review and display driver changes
t6k11: use the gint array for variant detection
r61524: use true triple buffering by default
display: define DWIDTH and DHEIGHT
display: add C_RGB(r,g,b) (0 ≤ r,g,b ≤ 31) [fxcg50]
2020-02-23 16:05:25 +01:00
Lephe 552b9b9a43
dma: only expose API on fxcg50
Currently there seems to be no DMA at all on fx9860g. Further
investigation would be required, because this would be the first major
difference between the SH7305's found in fx9860g and fxcg50 models.

An automated peripheral register discovery strategy might help, but
identifying discovered registers would be non trivial.

Also use the pruning ability of the Makefile to avoid troublesome
ifdef's in the code.
2019-09-15 10:20:37 +02:00
lephe 24fbeab55b core: provide MPU type on unknown platforms
This makes it possible to write application code without specifying the
target machine, which is especially useful for libraries. The first user
of this system is libprof.
2019-07-16 15:39:33 -04:00
lephe 3324d58afa core: add a hardware detection interface 2019-07-04 12:11:43 -04:00