Alternative library and kernel for add-in development on fx-9860G and fx-CG50 under Linux.
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  1. //---
  2. // gint:hardware - Platform information and hardware detection
  3. //
  4. // This components centralizes detected information about the runtime
  5. // hardware, including MPU version, peripheral modules, and how drivers
  6. // configured them.
  7. //
  8. // The most common use of this header is for the isSH3() and isSH4()
  9. // macros that let you run MPU-dependent jobs and are used like this:
  10. // if(isSH3()) do_sh3();
  11. // else do_sh4();
  12. //---
  13. #ifndef GINT_HARDWARE
  14. #define GINT_HARDWARE
  15. #include <gint/defs/types.h>
  16. /* Most of the information here is going to be stored in (key, value) pairs for
  17. predetermined keys and 32-bits values that are often integers or a set of
  18. flags. The data will be filled by gint or its drivers. */
  19. #define HW_KEYS 16
  20. extern uint32_t gint[HW_KEYS];
  21. /* MPU detection macros, with a faster version on fx-CG 50 and a generic
  22. dual-platform version for libraries. */
  23. #if defined(FX9860G) || (!defined(FX9860G) && !defined(FXCG50))
  24. #define isSH3() (gint[HWMPU] & 1)
  25. #define isSH4() (!isSH3())
  26. #endif
  27. #ifdef FXCG50
  28. #define isSH3() 0
  29. #define isSH4() 1
  30. #endif
  31. /* hw_detect(): Basic hardware detection
  32. This function probes the hardware and fills in the HWMPU, HWCPUVR and
  33. HWCPUPR fields. */
  34. void hw_detect(void);
  35. /* This bit should be set in all data longwords except HWMPU, HWCPUVR, HWCPUPR
  36. and HWCALC which are guaranteed to always be loaded. If not set then the
  37. information must be treated as invalid. */
  38. #define HW_LOADED 0x80000000
  39. /*
  40. ** Key list
  41. */
  42. #define HWMPU 0 /* MPU type */
  43. #define HWCPUVR 1 /* CPU Version Register */
  44. #define HWCPUPR 2 /* CPU Product Register */
  45. #define HWCALC 3 /* Calculator model */
  46. #define HWRAM 4 /* Amount of RAM */
  47. #define HWROM 5 /* Amount of ROM */
  48. #define HWMMU 6 /* Memory Management Unit */
  49. #define HWURAM 7 /* Userspace RAM (set iff HWMMU is loaded) */
  50. #define HWCPG 8 /* Clock Pulse Generator */
  51. #define HWDMA 9 /* Direct Memory Access Controller */
  52. #define HWTMU 10 /* Timer Unit */
  53. #define HWETMU 11 /* Extra Timer Units */
  54. #define HWRTC 12 /* Real-Time Clock */
  55. #define HWKBD 13 /* Keyboard */
  56. #define HWKBDSF 14 /* Keyboard Scan Frequency (set iff HWKBD is loaded) */
  57. #define HWDD 15 /* Display Driver */
  58. /*
  59. ** MPU type
  60. */
  61. /* Unknown MPUs are all assumed to be SH-4A-based */
  62. #define HWMPU_UNKNOWN 0
  63. /* Used on original fx-9860G, SH-3-based */
  64. #define HWMPU_SH7337 1
  65. /* Used on recent fx-9860G derivates such as the fx-9750G II, and also on the
  66. fx-CG 10/20/50. SH-4A-based */
  67. #define HWMPU_SH7305 2
  68. /* Used on the fx-9860G II, SH-3-based */
  69. #define HWMPU_SH7355 3
  70. /* Closest documented match to the SH7305, not used in any known calculator.
  71. Detected and included for reference only */
  72. #define HWMPU_SH7724 4
  73. /*
  74. ** Calculator type
  75. */
  76. /* SH-3-based fx-9860G-family */
  77. #define HWCALC_FX9860G_SH3 1
  78. /* Other SH-4A-based fx-9860G-family */
  79. #define HWCALC_FX9860G_SH4 2
  80. /* Graph 35+E II, an SH-4A French extension of the fx-9860G family */
  81. #define HWCALC_G35PE2 3
  82. /* fx-CG 10/20, also known as the "Prizm" family */
  83. #define HWCALC_PRIZM 4
  84. /* fx-CG 50, a late extension to the Prizm family */
  85. #define HWCALC_FXCG50 5
  86. /*
  87. ** Memory Management Unit
  88. */
  89. /* MMU has a unified TLB. Essentially correlated with SH4. */
  90. #define HWMMU_UTLB 0x01
  91. /* Add-in is fully mapped in the TLB. This means that gint needs not handle TLB
  92. misses as exceptions. This should generally be set on fx9860g, but not on
  93. fxcg50. */
  94. #define HWMMU_FITTLB 0x02
  95. /*
  96. ** Clock Pulse Generator
  97. */
  98. /* Input clock frequency is known for this model and all frequencies are
  99. computed (they used to be measured from the RTC). Should be 1 */
  100. #define HWCPG_COMP 0x01
  101. /* Used an extended CPG interface, correlated with SH4 */
  102. #define HWCPG_EXT 0x02
  103. /*
  104. ** Direct Memory Access Controller
  105. */
  106. /* Nothing other than the HW_LOADED bit yet. Only valid on fxcg50 */
  107. /*
  108. ** Timer Unit
  109. */
  110. /* Nothing other than the HW_LOADED bit yet */
  111. /*
  112. ** Extra Timer Units
  113. */
  114. /* A single-timer ETMU unit was found. Correlated with SH3 */
  115. #define HWETMU_1 0x01
  116. /* A 6-timer ETMU unit was found. Correlated with SH4 */
  117. #define HWETMU_6 0x02
  118. /* Individual timer status. Not all timers might be operational after setting
  119. up the driver due to seemingly limitless behavioral differences with the
  120. TMU. Operational here means TCNT=TCOR=-1, interrupt disabled and cleared. */
  121. #define HWETMU_OK0 0x04
  122. #define HWETMU_OK1 0x08
  123. #define HWETMU_OK2 0x10
  124. #define HWETMU_OK3 0x20
  125. #define HWETMU_OK4 0x40
  126. #define HWETMU_OK5 0x80
  127. /*
  128. ** Real-Time Clock
  129. */
  130. /* The RTC timer is enabled */
  131. #define HWRTC_TIMER 0x01
  132. /*
  133. ** Keyboard
  134. */
  135. /* The keyboard uses an I/O-port-based scan method. This is possible on both
  136. SH3 and SH4, but gint will normally do it only on SH3. */
  137. #define HWKBD_IO 0x01
  138. /* When using the I/O-port scanning method on SH3, whether the watchdog is used
  139. to delay I/O operations. */
  140. #define HWKBD_WDD 0x02
  141. /* The keyboard uses a KEYSC-based scan method. This is only possible on SH4 */
  142. #define HWKBD_KSI 0x04
  143. /*
  144. ** Display Driver
  145. */
  146. /* Display driver is known. This cannot be determined on fx9860g as the Toshiba
  147. T6K11 and its Graph 35+E II variant don't seem to have an identification
  148. command. It is set to 0 on fx9860g and used on fxcg50. */
  149. #define HWDD_KNOWN 0x01
  150. /* The display driver was configured to use the full screen, instead of leaving
  151. bands on the side. [fxcg50] */
  152. #define HWDD_FULL 0x02
  153. /* The contrast address for this OS version is known. [fx9860g] */
  154. #define HWDD_CONTRAST 0x04
  155. /* Backlight management is supported. This is used both on fx9860g models with
  156. back-lit screen (although that very fact cannot be detected) and fxcg50. */
  157. #define HWDD_LIGHT 0x08
  158. #endif /* GINT_HARDWARE */