210 lines
6.3 KiB
C
210 lines
6.3 KiB
C
//---
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// gint:mpu:scif - Serial Communication Interface with FIFO (SCIF)
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//---
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#ifndef GINT_MPU_SCIF
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#define GINT_MPU_SCIF
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <gint/defs/attributes.h>
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#include <gint/defs/types.h>
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typedef volatile struct
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{
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// Serial Mode
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word_union(SCSMR,
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uint16_t :8; //Reserved
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uint16_t CA :1; //Communication Mode.
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uint16_t CHR :1; //Character Length.
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uint16_t PE :1; //Parity Enable
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uint16_t OE :1; //Parity Mode
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uint16_t STOP :1; //Bit Stop Length
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uint16_t :1; //Reserved
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uint16_t CKS :2; //Clock Select
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);
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pad(0x2);
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// Serial Bit Rate
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uint8_t SCBRR; //set the bit rate of serial transmission/reception in relation to the operating clock of the baud rate generator
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pad(0x3);
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// Serial Control
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word_union(SCSCR,
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uint16_t :8; //Reserved
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uint16_t TIE :1; //Transmit Interrupt Enable
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uint16_t RIE :1; //Receive Interrupt Enable
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uint16_t TE :1; //Transmit Enable
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uint16_t RE :1; //Receive Mode
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uint16_t REIE :1; //Receive Error Interrupt Enable
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uint16_t :1; //Reserved
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uint16_t CKE :2; //Clock Enable
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);
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pad(0x2);
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// Serial Transmit data
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uint8_t SCFTD; // FIFO for serial transmit data
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pad(0x3);
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// Serial Status
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word_union(SCFSR,
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uint16_t PERC :4; //Number of Parity Errors
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uint16_t FERC :4; //Number of Framing Errors
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uint16_t ER :1; //Receive Error
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uint16_t TEND :1; //Transmit End
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uint16_t TDFE :1; //Transmit FIFO Data Empty
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uint16_t BRK :1; //Break Detection
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uint16_t FER :1; //Framing Error Indication
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uint16_t PER :1; //Parity Error Indication
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uint16_t RDF :1; //Receive FIFO Data Full
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uint16_t DR :1; //Received data Ready
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);
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pad(0x2);
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// Serial Receive data
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uint8_t SCFRD; // FIFO for serial received data
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pad(0x3);
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// Serial FIFO Control
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word_union(SCFCR,
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uint16_t :5; //Reserved
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uint16_t RSTRG :3; // ??? from CGplayer
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uint16_t RTRG :2; //Receive FIFO Data Trigger
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uint16_t TTRG :2; //Transmit FIFO Data Trigger
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uint16_t MCE :1; // ??? from CGplayer
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uint16_t TFRST :1; //Transmit FIFO Data Register Reset
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uint16_t RFRST :1; //Receive FIFO Data Register Reset
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uint16_t LOOP :1; //Loopback Test
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);
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pad(0x2);
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// Serial FIFO Count
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word_union(SCFDR,
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uint16_t :3; //Reserved
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uint16_t TFDC :5; //Number of Data Bytes in Transmit FIFO
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uint16_t :3; //Reserved
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uint16_t RFDC :5; //Number of Data Bytes in Receive FIFO
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);
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pad(0x6);
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// Serial Line Status
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word_union(SCLSR,
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uint16_t :15; //Reserved
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uint16_t ORER :1; //Overrun Error
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);
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pad(0x2);
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} GPACKED(4) sh7305_scif_t;
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#define SH7305_SCIF (*((sh7305_scif_t *)0xa4410000))
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typedef volatile struct
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{
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// Serial Mode
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word_union(SCSMR,
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uint16_t :5; //Reserved
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uint16_t SRC :3; //Sampling Control
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uint16_t CA :1; //Communication Mode.
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uint16_t CHR :1; //Character Length.
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uint16_t PE :1; //Parity Enable
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uint16_t OE :1; //Parity Mode
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uint16_t STOP :1; //Bit Stop Length
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uint16_t :1; //Reserved
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uint16_t CKS :2; //Clock Select
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);
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pad(0x2);
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// Serial Bit Rate
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uint8_t SCBRR; //sBit Rate Setting
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pad(0x3);
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// Serial Control Register
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word_union(SCSCR,
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uint16_t :4; //Reserved
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uint16_t TSIE :1; //Transmit Data Stop Interrupt Enable
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uint16_t ERIE :1; //Receive Error Interrupt Enable
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uint16_t BRIE :1; //Break Interrupt Enable
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uint16_t DRIE :1; //Receive Data Ready Interrupt Enable
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uint16_t TIE :1; //Transmit Interrupt Enable
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uint16_t RIE :1; //Receive Interrupt Enable
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uint16_t TE :1; //Transmit Enable
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uint16_t RE :1; //Receive Mode
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uint16_t :2; //Reserved
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uint16_t CKE :2; //Clock Enable
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);
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pad(0x2);
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// Transmit Data Stop Register
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uint8_t SCTDSR; // Number of transmit data bytes
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pad(0x3);
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// FIFO Error Count Register
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word_union(SCFER,
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uint16_t :2; //Reserved
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uint16_t PER :6; //Parity Error Count
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uint16_t :2; //Reserved
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uint16_t FER :6; //Framing Error Count
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);
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pad(0x2);
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// Serial Status Register
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word_union(SCSSRR,
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uint16_t :6;
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uint16_t ORER :1; //Overrun Error
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uint16_t TSF :1; //Transmit Data Stop
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uint16_t ER :1; //Receive Error
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uint16_t TEND :1; //Transmit End
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uint16_t TDFE :1; //Transmit FIFO Data Empty
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uint16_t BRK :1; //Break Detect
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uint16_t FER :1; //Framing Error
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uint16_t PER :1; //Parity Error
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uint16_t RDF :1; //Receive FIFO Data Full
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uint16_t DR :1; //Receive Data Ready
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);
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pad(0x2);
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// FIFO Control Register
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word_union(SCFCR,
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uint16_t TSE :1; //Transmit Data Stop Enable
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uint16_t TCRST :1; //Transmit Count Reset
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uint16_t :3; //Reserved
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uint16_t RSTRG :3; //RTS Output Active Trigger
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uint16_t RTRG :2; //Receive FIFO Data Trigger
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uint16_t TTRG :2; //Transmit FIFO Data Trigger
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uint16_t MCE :1; //Modem Control Enable
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uint16_t TFRST :1; //Transmit FIFO Data Register Reset
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uint16_t RFRST :1; //Receive FIFO Data Register Reset
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uint16_t LOOP :1; //Loopback Test
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);
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pad(0x2);
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// FIFO Data Count Register
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word_union(SCFDR,
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uint16_t :1; //Reserved
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uint16_t T :7; //Number of Untransmitted Bytes in Transmit FIFO
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uint16_t :1; //Reserved
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uint16_t R :7; //Number of Received Bytes in Receive FIFO
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);
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pad(0x2);
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// Transmit FIFO data Register
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uint8_t SCFTDR; // Serial Transmit Data FIFO (64 Bytes-long)
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pad(0x3);
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// Transmit FIFO data Register
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uint8_t SCFRDR; // Serial Receive Data FIFO (64 Bytes-long)
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} GPACKED(4) sh7705_scif_t;
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#define SH7705_SCIF (*((sh7705_scif_t *)0xa4410000))
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#ifdef __cplusplus
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}
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#endif
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#endif /* GINT_MPU_SCIF */ |