95 lines
1.9 KiB
ArmAsm
95 lines
1.9 KiB
ArmAsm
/*
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** gint:tmu:inth-tmu - Interrupt handlers for the timer units
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**
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** This handler consists of 3 consecutive gates that operate as a block. It
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** clears the interrupt flags, invokes a GINT_CALL() in userspace, and stops
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** the timer if the callback returns non-zero.
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**
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** It is important to notice that the code of the gates is continuous in this
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** file and thus must be continuous in memory, as the assembler will use
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** relative addressing methods. This "block operations" is only possible for
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** handlers that are mapped to consecutive event codes.
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*/
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/* Gates for the standard Timer Unit (TMU) */
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.global _inth_tmu /* 96 bytes */
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.section .gint.blocks, "ax"
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.align 4
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/* TMU0 entry and interrupt flag clearing. */
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_inth_tmu:
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mov #0, r5
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mov #0, r6
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mov #0, r7
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.shared1:
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mov.l .TCR0, r1
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add r6, r1
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/* Save the timer ID on the stack */
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mov.l r8, @-r15
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sts.l pr, @-r15
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mov.l r5, @-r15
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/* Clear the interrupt flag. Because r5 contains 0, 1 or 2 the 16 top
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bits are 0 so we can compare without extending */
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1: mov.w @r1, r5
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extu.b r5, r3
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cmp/eq r5, r3
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bf/s 1b
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mov.w r3, @r1
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/* Prepare to run the callback */
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mov.l .callback, r8
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bra .shared2
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mov.l @r8, r8
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/* TMU1 entry, callback and timer stop logic. */
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_inth_tmu_1:
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mov #1, r5
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mov #12, r6
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bra .shared1
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mov #20, r7
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.shared2:
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/* Invoke callback */
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mov.l .tmu_callbacks, r4
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jsr @r8
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add r7, r4
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tst r0, r0
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mov.l .timer_stop, r2
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bt/s .shared3
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mov.l r2, @-r15
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/* Stop the timer if the return value is not zero. We use the top of
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the stack as a gint_call_t object; only the function and first
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argument matter, timer_stop() will ignore the rest. */
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jsr @r8
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mov r15, r4
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bra .shared3
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nop
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nop
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/* TMU2 entry, shared exit and storage. */
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_inth_tmu_2:
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mov #2, r5
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mov #24, r6
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bra .shared1
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mov #40, r7
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.shared3:
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add #8, r15
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lds.l @r15+, pr
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rts
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mov.l @r15+, r8
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.timer_stop:
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.long _timer_stop
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.callback:
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.long _gint_inth_callback
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.TCR0:
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.long 0xa4490010
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.tmu_callbacks:
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.long _tmu_callbacks
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