258 lines
6.5 KiB
C
258 lines
6.5 KiB
C
//---
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// gint:core:kernel - Installing and unloading the library
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//---
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#include <gint/gint.h>
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#include <gint/drivers.h>
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#include <gint/std/string.h>
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#include <gint/hardware.h>
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#include <gint/mmu.h>
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#include <gint/mpu/intc.h>
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#include "cpu.h"
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#include "vbr.h"
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#include "drivers.h"
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#include "kernel.h"
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static void kinit_cpu(void);
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/* Forcefully pull in the INTC driver which gint cannot run without */
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extern gint_driver_t drv_intc;
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GUNUSED gint_driver_t *gint_required_intc = &drv_intc;
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//---
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// Context for the CPU and registers not directly managed by a driver
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//---
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typedef struct
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{
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sr_t SR;
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uint32_t VBR;
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uint32_t CPUOPM;
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} ctx_t;
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/* System context and gint context for the CPU and VBR */
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GBSS static ctx_t sys_ctx, gint_ctx;
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static void ctx_save(ctx_t *ctx)
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{
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if(isSH4())
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{
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ctx->CPUOPM = cpu_getCPUOPM();
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ctx->SR = cpu_getSR();
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}
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}
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static void ctx_restore(ctx_t *ctx)
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{
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if(isSH4())
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{
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cpu_setCPUOPM(ctx->CPUOPM);
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cpu_setSR(ctx->SR);
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}
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}
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//---
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// Driver control
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//---
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static void drivers_wait(void)
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{
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for driver_asc(d)
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{
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if(d->wait) d->wait();
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}
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}
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static void drivers_save_and_init(GUNUSED int zero)
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{
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/* Initialize the CPU, which is done here instead of in a driver */
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ctx_save(&sys_ctx);
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kinit_cpu();
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for driver_asc(d)
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{
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if(isSH3() && d->driver_sh3) d->driver_sh3();
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if(d->ctx_save) d->ctx_save(d->sys_ctx);
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if(d->init) d->init();
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}
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}
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static void drivers_restore(int who)
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{
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for driver_dsc(d)
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{
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if(d->ctx_restore) d->ctx_restore(who?d->gint_ctx:d->sys_ctx);
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}
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ctx_restore(who ? &gint_ctx : &sys_ctx);
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}
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static void drivers_switch(int who)
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{
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/* Save all drivers in reverse order */
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for driver_dsc(d)
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{
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if(!d->ctx_save || !d->ctx_restore) continue;
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d->ctx_save(who ? d->gint_ctx : d->sys_ctx);
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}
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ctx_save(who ? &gint_ctx : &sys_ctx);
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/* Restore the other context */
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ctx_restore(who ? &sys_ctx : &gint_ctx);
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for driver_asc(d)
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{
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if(!d->ctx_save || !d->ctx_restore) continue;
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d->ctx_restore(who ? d->sys_ctx : d->gint_ctx);
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}
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}
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//---
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// Initialization and unloading
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//---
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static void kinit_cpu(void)
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{
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if(isSH4())
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{
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cpu_setCPUOPM(cpu_getCPUOPM() | 0x00000008);
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/* Enable DSP mode on the CPU */
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sr_t SR = cpu_getSR();
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SR.DSP = 1;
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cpu_setSR(SR);
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}
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}
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/* kinit(): Install and start gint */
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void kinit(void)
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{
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#ifdef FX9860G
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/* VBR is loaded at the end of the user RAM. */
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uint32_t uram_end = (uint32_t)mmu_uram() + mmu_uram_size();
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/* On SH4, stack is at the end of the region, leave 8k */
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if(isSH4()) uram_end -= 0x2000;
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/* VBR size differs with models. On SH3, only 0x600 bytes are used due
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to the compact scheme. On SH4, 0x1100 bytes are needed to cover the
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expanded region. */
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uram_end -= (isSH3() ? 0x600 : 0x1100);
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/* There are 0x100 unused bytes at the start of the VBR area */
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gint_ctx.VBR = uram_end - 0x100;
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#endif
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#ifdef FXCG50
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/* VBR is loaded at the start of the user RAM */
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gint_ctx.VBR = (uint32_t)mmu_uram();
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#endif
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/* Event handler entry points */
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void *inth_entry = isSH3() ? gint_inth_7705 : gint_inth_7305;
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uint32_t exch_size = (uint32_t)&gint_exch_size;
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uint32_t tlbh_size = (uint32_t)&gint_tlbh_size;
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/* Load the event handler entry points into memory */
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void *vbr = (void *)gint_ctx.VBR;
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memcpy(vbr + 0x100, gint_exch, exch_size);
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memcpy(vbr + 0x400, gint_tlbh, tlbh_size);
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memcpy(vbr + 0x600, inth_entry, 64);
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/* Take control of the VBR and roll! */
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drivers_wait();
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sys_ctx.VBR = (*cpu_setVBR)(gint_ctx.VBR, drivers_save_and_init, 0);
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}
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/* Due to dire space restrictions on SH3, event codes that are translated to
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SH4 are further remapped into the VBR space to eliminate gaps and save
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space. Each entry in this table represents a 32-byte block after the
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interrupt handler's entry gate. It shows the SH4 event code whose gate is
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placed on that block (some of gint's SH4 event codes are invented to host
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helper blocks).
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For instance, the 5th block after the entry gate hosts the interrupt handler
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for SH4 event 0x9e0, which is ETMU0 underflow.
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The _inth_remap table in src/core/inth.S combines the SH3-SH4 translation
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with the compact translation, hence its entry for 0xf00 (the SH3 event code
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for ETMU0 underflow) is the offset in this table where 0x9e0 is stored,
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which is 4. */
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static const uint16_t sh3_vbr_map[] = {
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0x400, /* TMU0 underflow */
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0x420, /* TMU1 underflow */
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0x440, /* TMU2 underflow */
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0x460, /* (gint custom: TMU helper) */
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0x9e0, /* ETMU0 underflow */
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0xd00, /* ETMU4 underflow (used as helper on SH3) */
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0xd20, /* (gint custom: ETMU helper) */
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0xd40, /* (gint custom: ETMU helper) */
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0xaa0, /* RTC Periodic Interrupt */
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1, /* (Filler to maintain the gap between 0xaa0 and 0xae0) */
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0xae0, /* (gint custom: RTC helper) */
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0
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};
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/* gint_inthandler(): Install interrupt handlers */
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void *gint_inthandler(int event_code, const void *handler, size_t size)
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{
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void *dest;
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/* Normalize the event code */
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if(event_code < 0x400) return NULL;
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event_code &= ~0x1f;
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/* Prevent writing beyond the end of the VBR space on SH4. Using code
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0xfc0 into the interrupt handler space (which starts 0x540 bytes
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into VBR-reserved memory) would reach byte 0x540 + 0xfc0 - 0x400 =
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0x1100, which is out of gint's reserved VBR area. */
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if(isSH4() && event_code + size > 0xfc0) return NULL;
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/* On SH3, make VBR compact. Use this offset specified in the VBR map
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above to avoid gaps */
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if(isSH3())
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{
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int index = 0;
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while(sh3_vbr_map[index])
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{
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if((int)sh3_vbr_map[index] == event_code) break;
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index++;
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}
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/* This happens if the event has not beed added to the table,
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ie. the compact VBR scheme does not support this code */
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if(!sh3_vbr_map[index]) return NULL;
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/* Gates are placed starting at VBR + 0x200 to save space */
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dest = (void *)gint_ctx.VBR + 0x200 + index * 0x20;
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}
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/* On SH4, just use the code as offset */
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else
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{
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/* 0x40 is the size of the entry gate */
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dest = (void *)gint_ctx.VBR + 0x640 + (event_code - 0x400);
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}
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return memcpy(dest, handler, size);
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}
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/* gint_switch(): Temporarily switch out of gint */
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void gint_switch(void (*function)(void))
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{
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/* Switch from gint to the OS after a short wait */
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drivers_wait();
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(*cpu_setVBR)(sys_ctx.VBR, drivers_switch, 1);
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if(function) function();
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/* Then switch back to gint once the OS finishes working */
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drivers_wait();
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(*cpu_setVBR)(gint_ctx.VBR, drivers_switch, 0);
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}
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/* kquit(): Quit gint and give back control to the system */
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void kquit(void)
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{
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/* Wait for hardware tasks then restore all of the drivers' state and
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return the VBR space to the OS */
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drivers_wait();
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(*cpu_setVBR)(sys_ctx.VBR, drivers_restore, 0);
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}
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