183 lines
4.0 KiB
C
183 lines
4.0 KiB
C
//---
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//
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// gint core module: sh7705 interrupt handler
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//
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// Of course all the work related to interrupts is heavily platform-
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// dependent. This module handles interrupts and configures the MPU to
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// save and restore the system's configuration when execution ends.
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//
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//---
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#include <internals/gint.h>
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#include <gint.h>
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#include <timer.h>
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#include <7705.h>
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#include <rtc.h>
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#include <stddef.h>
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//---
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// Interrupt codes.
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//---
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#define IC_RTC_PRI 0x4a0
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#define IC_PINT07 0x700
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#define IC_TMU0_TUNI0 0x400
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#define IC_TMU1_TUNI1 0x420
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#define IC_TMU2_TUNI2 0x440
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//---
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// Exception handling.
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//---
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void gint_int_7705(void)
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{
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volatile unsigned int *intevt2 = (unsigned int *)0xa4000000;
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unsigned int code = *intevt2;
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switch(code)
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{
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case IC_RTC_PRI:
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rtc_interrupt();
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break;
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case IC_TMU0_TUNI0:
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timer_interrupt(TIMER_TMU0);
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break;
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case IC_TMU1_TUNI1:
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timer_interrupt(TIMER_TMU1);
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break;
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case IC_TMU2_TUNI2:
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timer_interrupt(TIMER_TMU2);
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break;
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}
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}
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/*
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gint_reg()
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Returns the address of a common register. All common registers exist
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on both platforms but they may hold different values for the same
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information (f.i. EXPEVT may not return the same value for a given
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exception on both 7705 and 7305).
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*/
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volatile void *gint_reg_7705(enum Register reg)
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{
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volatile unsigned int *expevt = (unsigned int *)0xffffffd4;
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volatile unsigned int *mmucr = (unsigned int *)0xfffffff4;
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volatile unsigned int *tea = (unsigned int *)0xfffffffc;
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switch(reg)
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{
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case Register_EXPEVT: return expevt;
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case Register_MMUCR: return mmucr;
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case Register_TEA: return tea;
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default: return NULL;
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}
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}
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/*
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gint_strerror()
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Returns a string that describe the error set in EXPEVT. This string is
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not platform-dependent.
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Some exception codes represent different errors when invoked inside the
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general exception handler and the TLB error handler. Parameter 'is_tlb'
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should be set to zero for general exception meanings, and anything non-
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zero for TLB error meanings.
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*/
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const char *gint_strerror_7705(int is_tlb)
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{
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volatile unsigned int *expevt = gint_reg_7705(Register_EXPEVT);
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switch(*expevt)
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{
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case 0x1e0: return gint_str[3];
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case 0x0e0: return gint_str[4];
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case 0x040: return gint_str[is_tlb ? 10 : 11];
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case 0x0a0: return gint_str[12];
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case 0x180: return gint_str[6];
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case 0x1a0: return gint_str[7];
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case 0x100: return gint_str[5];
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case 0x060: return gint_str[is_tlb ? 13 : 19];
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case 0x0c0: return gint_str[16];
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case 0x080: return gint_str[20];
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case 0x160: return gint_str[21];
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case 0x5c0: return gint_str[22];
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}
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return gint_str[0];
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}
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//---
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// Setup.
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//---
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static unsigned short iprs[8];
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static unsigned char rcr2;
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static void gint_priority_lock_7705(void)
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{
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// Saving the interrupt masks from registers IPRA to IPRH.
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iprs[0] = INTC.IPRA.WORD;
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iprs[1] = INTC.IPRB.WORD;
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iprs[2] = INTX.IPRC.WORD;
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iprs[3] = INTX.IPRD.WORD;
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iprs[4] = INTX.IPRE.WORD;
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iprs[5] = INTX.IPRF.WORD;
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iprs[6] = INTX.IPRG.WORD;
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iprs[7] = INTX.IPRH.WORD;
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// Disabling everything by default to avoid receiving an interrupt that
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// the handler doesn't handle, which would cause the user program to
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// freeze.
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INTC.IPRA.WORD = 0x0000;
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INTC.IPRB.WORD = 0x0000;
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INTX.IPRC.WORD = 0x0000;
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INTX.IPRD.WORD = 0x0000;
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INTX.IPRE.WORD = 0x0000;
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INTX.IPRF.WORD = 0x0000;
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INTX.IPRG.WORD = 0x0000;
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INTX.IPRH.WORD = 0x0000;
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// Allowing RTC, which handles keyboard.
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INTC.IPRA.BIT._RTC = GINT_INTP_RTC;
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INTC.IPRA.BIT._TMU0 = GINT_INTP_KEY;
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INTC.IPRA.BIT._TMU1 = GINT_INTP_GRAY;
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INTC.IPRA.BIT._TMU2 = GINT_INTP_TIMER;
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}
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static void gint_priority_unlock_7705(void)
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{
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// Restoring the saved states.
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INTC.IPRA.WORD = iprs[0];
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INTC.IPRB.WORD = iprs[1];
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INTX.IPRC.WORD = iprs[2];
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INTX.IPRD.WORD = iprs[3];
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INTX.IPRE.WORD = iprs[4];
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INTX.IPRF.WORD = iprs[5];
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INTX.IPRG.WORD = iprs[6];
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INTX.IPRH.WORD = iprs[7];
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}
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void gint_setup_7705(void)
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{
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gint_priority_lock_7705();
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// Saving the RTC configuration.
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rcr2 = RTC.RCR2.BYTE;
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// Disabling RTC interrupts by default.
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RTC.RCR2.BYTE = 0x09;
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}
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void gint_stop_7705(void)
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{
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gint_priority_unlock_7705();
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// Restoring the RTC configuration.
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RTC.RCR2.BYTE = rcr2;
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}
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