150 lines
3.9 KiB
C
150 lines
3.9 KiB
C
//---
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// gint:core:hardware - Platform information and hardware detection
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//---
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#include <gint/hardware.h>
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#include <gint/mmu.h>
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#include <gint/defs/attributes.h>
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#include <gint/defs/types.h>
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#include <gint/defs/util.h>
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#include <gint/mpu/pfc.h>
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#include <string.h>
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/* Holds information about the current platform */
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GBSS uint32_t gint[HW_KEYS];
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/* Processor Version Register */
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#define PVR (*((volatile uint32_t *)0xff000030))
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/* Product Register */
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#define PRR (*((volatile uint32_t *)0xff000044))
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#if defined(FX9860G) || (!defined(FX9860G) && !defined(FXCG50))
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/* mpu_detect() - detect the underlying MPU
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Many thanks to Simon Lothar for relevant documentation.
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Processor Version Register (PVR) and Product Version Register (PRR) provide
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info for SH-4-based MPUS; SH-3 based boards are detected and distinguished
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by testing writable bits in the Port L Control Register (PLCR).
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Returns the detected MPU type, falling back on mpu_unknown */
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static int mpu_detect(void)
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{
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#define PLCR SH7705_PFC.PLCR
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/* Detect SH-3-based MPUs by testing writable bits in PLCR */
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uint16_t old = PLCR;
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PLCR = 0xffff;
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uint16_t tested = PLCR;
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PLCR = old;
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if(tested == 0x00ff) return HWMPU_SH7337;
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if(tested == 0x0fff) return HWMPU_SH7355;
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/* Check that we're dealing with an SH-4-based MPU */
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if((PVR & 0xffffff00) != 0x10300b00) return HWMPU_UNKNOWN;
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/* Tell SH-4 MPUs by testing the product version register */
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uint32_t ver = PRR & 0xfffffff0;
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if(ver == 0x00002c00) return HWMPU_SH7305;
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if(ver == 0x00002200) return HWMPU_SH7724;
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return HWMPU_UNKNOWN;
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#undef PLCR
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}
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/* hw_detect(): Basic hardware detection */
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void hw_detect(void)
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{
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gint[HWMPU] = mpu_detect();
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if(isSH4())
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{
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gint[HWCPUVR] = PVR;
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gint[HWCPUPR] = PRR;
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}
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gint[HWCALC] = HWCALC_FX9860G_SH4;
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if(gint[HWMPU] == HWMPU_SH7337 || gint[HWMPU] == HWMPU_SH7355)
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{
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gint[HWCALC] = (SH7705_PFC.PEDR & 0x08) ? HWCALC_FX9860G_SH3 :
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HWCALC_FX9860G_SLIM;
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}
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/* Tell Graph 35+E II from OS version (this is accurate unless someone
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tweaks an OS file enough to de-correlate the version of the OS and
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the version of the display and storage memory drivers, which, let's
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be real, is enough for now.
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TODO: Try to detect Graph 35+E II from amount of ROM in BSC? */
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char *version = (void *)0x80010020;
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if(version[1] == '3')
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{
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gint[HWCALC] = HWCALC_G35PE2;
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gint[HWFS] = HWFS_FUGUE;
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}
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else
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{
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gint[HWFS] = HWFS_CASIOWIN;
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}
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/* Detect RAM by checking if 8804'0000 is the same as 8800'0000. */
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volatile uint8_t *R4 = (void *)0x88040000;
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volatile uint8_t *R0 = (void *)0x88000000;
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/* Make backups */
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uint8_t b0 = *R0;
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uint8_t b4 = *R4;
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/* Check if setting a different value in *R4 affects *R0. If not, then
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we have extended RAM. */
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*R4 = ~b0;
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int ext = (*R0 == b0);
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/* Restore backups */
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*R0 = b0;
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*R4 = b4;
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gint[HWRAM] = ext ? (512 << 10) : (256 << 10);
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/* Traditionally 4 MiB, Graph 35+E II has 8 MiB */
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gint[HWROM] = (gint[HWCALC] == HWCALC_G35PE2) ? (8 << 20) : (4 << 20);
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/* Mapped memory */
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if(isSH3()) tlb_mapped_memory(NULL, NULL);
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else utlb_mapped_memory(NULL, NULL);
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}
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#endif /* FX9860G and platform-agnostic */
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#ifdef FXCG50
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/* hw_detect(): Basic hardware detection */
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void hw_detect(void)
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{
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gint[HWMPU] = HWMPU_SH7305;
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gint[HWCPUVR] = PVR;
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gint[HWCPUPR] = PRR;
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/* Tell Prizms apart from fx-CG 50 by checking the stack address*/
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uint32_t stack;
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__asm__("mov r15, %0" : "=r"(stack));
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gint[HWCALC] = (stack < 0x8c000000) ? HWCALC_PRIZM : HWCALC_FXCG50;
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gint[HWFS] = HWFS_FUGUE;
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/* Tell the fx-CG emulator apart using the product ID */
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uint8_t *productID = (void *)0x8001ffd0;
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if(!memcmp(productID, "\xff\xff\xff\xff\xff\xff\xff\xff", 8))
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gint[HWCALC] = HWCALC_FXCG_MANAGER;
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/* Basic memory information */
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gint[HWRAM] = (gint[HWCALC] == HWCALC_PRIZM) ? (2 << 20) : (8 << 20);
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gint[HWROM] = (32 << 20);
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/* Mapped memory */
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utlb_mapped_memory(NULL, NULL);
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}
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#endif /* FXCG50 */
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