70 lines
825 B
ArmAsm
70 lines
825 B
ArmAsm
/*
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** gint:cpu:registers - Access to primary registers used in the CPU
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*/
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.global _cpu_getVBR
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.global _cpu_setVBR
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.global _cpu_setCPUOPM
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.global _cpu_getCPUOPM
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.global _cpu_getSR
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.global _cpu_setSR
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.text
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/* cpu_setVBR(): Change VBR address */
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_cpu_setVBR:
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ldc r4, vbr
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rts
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nop
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_cpu_getVBR:
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stc vbr, r0
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rts
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nop
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_cpu_setCPUOPM:
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/* Set CPUOPM as requested */
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mov.l 1f, r0
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mov.l r4, @r0
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/* Read CPUOPM again */
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mov.l @r0, r5
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/* Invalidate a cache address */
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mov #-96, r0
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shll16 r0
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shll8 r0
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icbi @r0
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rts
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nop
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_cpu_getCPUOPM:
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mov.l 1f, r0
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rts
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mov.l @r0, r0
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.align 4
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1: .long 0xff2f0000
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_cpu_getSR:
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stc sr, r0
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rts
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nop
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_cpu_setSR:
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/* Set only MD, RB, BL, DSP and IMASK */
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mov.l 1f, r0
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not r0, r1
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stc sr, r2
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and r1, r2
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and r0, r4
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or r4, r2
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ldc r2, sr
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rts
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nop
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.align 4
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1: .long 0x700010f0
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