perf/cpu: add tests for mul.l pipeline delays

This commit is contained in:
Lephenixnoir 2023-06-04 22:53:37 +02:00
parent 715b4b9335
commit e941148996
Signed by: Lephenixnoir
GPG Key ID: 1BBA026E13FC0495
2 changed files with 29 additions and 0 deletions

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@ -349,6 +349,32 @@ bench raw_LS_LS_addr, 1024
2: mov.l @r5, r6
end
/* [Multiplication]
This section investigates pipeline delays in the multiplier. */
/* mul.l occupies the multiplier for 2 cycles -> 2 cycles /i */
bench mul_single_32, 1024
1: mul.l r4, r5
2: nop
end
/* The computed value can be retrieved on cycle #2 -> 2 cycles /i */
bench mul_single_32_sts, 1024
1: mul.l r4, r5
2: sts macl, r0
end
/* However it takes an incredibly long time to actually arrive, requiring 2
tempo cycles, even more than a memory load! -> 5 cycles /i */
bench mul_single_32_sts_EX, 1024
1: mul.l r4, r5
nop
sts macl, r0
2: add #1, r0
end
/* [Branching]
In this section, we investigate the cost of conditional execution and

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@ -46,6 +46,9 @@
MACRO(raw_EX_LS_addr, 1024, "RAW on address: EX/LS") \
MACRO(raw_EX_LS_index, 1024, "RAW on index: EX/LS") \
MACRO(raw_LS_LS_addr, 1024, "RAW on address: LS/LS") \
MACRO(mul_single_32, 1024, "Pipeline: mul.l/mul.l") \
MACRO(mul_single_32_sts, 1024, "Pipeline: mul.l/sts") \
MACRO(mul_single_32_sts_EX, 1024, "Pipeline: mul.l/sts/EX") \
MACRO(branch_bra, 1024, "Branching: bra") \
MACRO(branch_bra_cpuloop, 1024, "Branching: bra (CPU loop)") \
MACRO(darken_1, 512, "Darken: 32-bit #1") \