Commit Graph

21 Commits

Author SHA1 Message Date
milang 308cb408a2 correct zbuffer clearing ( thanks @lephenixnoir) 2019-08-19 12:58:50 +02:00
Milang 4ccf324e48 rename some static variables 2019-08-19 12:10:06 +02:00
Milang 891921fd39 f*ck dma again 2019-08-17 20:07:59 +02:00
Milang 42cd1bb580 f*ck dma 2019-08-17 20:07:04 +02:00
Milang a8360f10dc dma again (I hate it) 2019-08-17 19:59:56 +02:00
Milang 869a762637 align zbuffer on 32Bytes blocks 2019-08-17 19:48:41 +02:00
Milang 45ec1a4a35 correct bug in DMA using
-> copied value was not set on 32 bytes, but on 4 bytes
2019-08-17 19:37:27 +02:00
Milang 94b7f6e7c6 still debugging direct memory access controller (I gonna suicide) 2019-08-17 19:25:16 +02:00
Milang e9c5f9935d debugging DMA 2019-08-17 19:13:28 +02:00
Milang 5b99d60eff align the buffer 2 2019-08-17 18:25:30 +02:00
Milang bfe73f1886 align the buffer 2019-08-17 18:23:41 +02:00
Milang 6f36dd1966 test to align zbuffer on 32 2019-08-17 18:14:36 +02:00
Milang d9abe48615 DMA, finished ? 2019-08-17 17:57:44 +02:00
Milang 3b62636d30 potatoes 2019-08-17 17:50:53 +02:00
Milang 84d31c7783 add DMA >> experimental 2019-08-17 17:47:05 +02:00
milang 263e8543c6 changing triangle rendering 2019-08-17 14:09:45 +02:00
Milang 0c85e41ff1 ajout commentaires 2019-08-16 15:27:15 +02:00
util1 7139f8b757 fix bug of zbuffer and prepare face drawing 2019-07-26 15:07:11 +02:00
util1 1881d3df1b add clockwise function 2019-07-26 14:39:08 +02:00
util1 118f7cbcb2 add clearbuffer 2019-07-23 15:52:20 +02:00
util1 90d52cb331 remake FxEngine 2019-07-21 20:14:54 +02:00