From 20b311fd8ef7028a4074c404b9f92a4ca35f4d8e Mon Sep 17 00:00:00 2001 From: Nick Clifton Date: Fri, 23 Aug 2013 07:54:19 +0000 Subject: [PATCH] PR binutils/15834 Fix typos: --- bfd/bfdio.c | 2 +- bfd/elf32-spu.c | 2 +- bfd/elfnn-aarch64.c | 2 +- binutils/od-xcoff.c | 2 +- config/tcl.m4 | 2 +- gas/config/tc-ia64.c | 2 +- gas/config/tc-sparc.c | 2 +- gas/config/tc-z80.c | 12 ++++++------ gas/doc/c-i386.texi | 6 +++--- gas/doc/c-m32r.texi | 2 +- gas/testsuite/gas/d10v/instruction_packing.d | 2 +- gas/testsuite/gas/z80/atend.d | 2 +- gold/object.h | 2 +- include/gdb/remote-sim.h | 2 +- include/opcode/ChangeLog | 2 +- include/opcode/i960.h | 2 +- ld/testsuite/ld-mips-elf/mips16-pic-1.inc | 2 +- opcodes/aarch64-asm.c | 2 +- opcodes/aarch64-dis.c | 2 +- opcodes/msp430-dis.c | 2 +- --- include/opcode/ChangeLog | 7 ++++++- include/opcode/i960.h | 4 ++-- 2 files changed, 8 insertions(+), 3 deletions(-) diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index e842f5da2..caf7aee83 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,3 +1,8 @@ +2013-08-23 Yuri Chornoivan + + PR binutils/15834 + * i960.h: Fix typos. + 2013-08-19 Richard Sandiford * mips.h: Remove references to "+I" and imm2_expr. @@ -1110,7 +1115,7 @@ 2008-04-28 Adam Nemet - * mips.h (INSN_MACRO): Move it up to the the pinfo macros. + * mips.h (INSN_MACRO): Move it up to the pinfo macros. (INSN2_M_FP_S, INSN2_M_FP_D): New pinfo2 macros. 2008-04-14 Edmar Wienskoski diff --git a/include/opcode/i960.h b/include/opcode/i960.h index dc0e78f88..7b8e1f5d5 100644 --- a/include/opcode/i960.h +++ b/include/opcode/i960.h @@ -1,6 +1,6 @@ /* Basic 80960 instruction formats. - Copyright 2001, 2010 Free Software Foundation, Inc. + Copyright 2001-2013 Free Software Foundation, Inc. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by @@ -141,7 +141,7 @@ struct i960_opcode { char operand[3];/* Operand descriptors; same order as assembler instr */ }; -/* Classes of 960 intructions: +/* Classes of 960 instructions: * - each instruction falls into one class. * - each target architecture supports one or more classes. *