From 70b232636f10f8e5ed94456804537bc6879f2869 Mon Sep 17 00:00:00 2001 From: Paul Brook Date: Fri, 24 Feb 2006 15:36:36 +0000 Subject: [PATCH] 2006-02-24 Paul Brook gas/ * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7, arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables. (struct asm_barrier_opt): Define. (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables. (parse_psr): Accept V7M psr names. (parse_barrier): New function. (enum operand_parse_code): Add OP_oBARRIER. (parse_operands): Implement OP_oBARRIER. (do_barrier): New function. (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions. (do_t_cpsi): Add V7M restrictions. (do_t_mrs, do_t_msr): Validate V7M variants. (md_assemble): Check for NULL variants. (v7m_psrs, barrier_opt_names): New tables. (insns): Add V7 instructions. Mark V6 instructions absent from V7M. (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh. (arm_cpu_option_table): Add Cortex-M3, R4 and A8. (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m. (struct cpu_arch_ver_table): Define. (cpu_arch_ver): New. (aeabi_set_public_attributes): Use cpu_arch_ver. Set Tag_CPU_arch_profile. * doc/c-arm.texi: Document new cpu and arch options. gas/testsuite/ * gas/arm/thumb32.d: Fix expected msr and mrs output. * gas/arm/arch7.d: New test. * gas/arm/arch7.s: New test. * gas/arm/arch7m-bad.l: New test. * gas/arm/arch7m-bad.d: New test. * gas/arm/arch7m-bad.s: New test. include/opcode/ * arm.h: Add V7 feature bits. opcodes/ * arm-dis.c (arm_opcodes): Add V7 instructions. (thumb32_opcodes): Ditto. Handle V7M MSR/MRS variants. (print_arm_address): New function. (print_insn_arm): Use it. Add 'P' and 'U' cases. (psr_name): New function. (print_insn_thumb32): Add 'U', 'C' and 'D' cases. --- include/opcode/ChangeLog | 4 ++++ include/opcode/arm.h | 31 ++++++++++++++++++++++++++----- 2 files changed, 30 insertions(+), 5 deletions(-) diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index fedd63875..76b797834 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,3 +1,7 @@ +2006-02-24 Paul Brook + + * arm.h: Add V7 feature bits. + 2006-02-23 H.J. Lu * ia64.h (ia64_opnd): Add IA64_OPND_IMMU5b. diff --git a/include/opcode/arm.h b/include/opcode/arm.h index 97312b63f..3260b2fea 100644 --- a/include/opcode/arm.h +++ b/include/opcode/arm.h @@ -35,6 +35,15 @@ #define ARM_EXT_V6K 0x00002000 /* ARM V6K. */ #define ARM_EXT_V6Z 0x00004000 /* ARM V6Z. */ #define ARM_EXT_V6T2 0x00008000 /* Thumb-2. */ +#define ARM_EXT_DIV 0x00010000 /* Integer division. */ +/* The 'M' in Arm V7M stands for Microcontroller. + On earlier architecture variants it stands for Multiply. */ +#define ARM_EXT_V5E_NOTM 0x00020000 /* Arm V5E but not Arm V7M. */ +#define ARM_EXT_V6_NOTM 0x00040000 /* Arm V6 but not Arm V7M. */ +#define ARM_EXT_V7 0x00080000 /* Arm V7. */ +#define ARM_EXT_V7A 0x00100000 /* Arm V7A. */ +#define ARM_EXT_V7R 0x00200000 /* Arm V7R. */ +#define ARM_EXT_V7M 0x00400000 /* Arm V7M. */ /* Co-processor space extensions. */ #define ARM_CEXT_XSCALE 0x00000001 /* Allow MIA etc. */ @@ -75,10 +84,18 @@ #define ARM_AEXT_V6K (ARM_AEXT_V6 | ARM_EXT_V6K) #define ARM_AEXT_V6Z (ARM_AEXT_V6 | ARM_EXT_V6Z) #define ARM_AEXT_V6ZK (ARM_AEXT_V6 | ARM_EXT_V6K | ARM_EXT_V6Z) -#define ARM_AEXT_V6T2 (ARM_AEXT_V6 | ARM_EXT_V6T2) -#define ARM_AEXT_V6KT2 (ARM_AEXT_V6 | ARM_EXT_V6T2 | ARM_EXT_V6K) -#define ARM_AEXT_V6ZT2 (ARM_AEXT_V6 | ARM_EXT_V6T2 | ARM_EXT_V6Z) -#define ARM_AEXT_V6ZKT2 (ARM_AEXT_V6 | ARM_EXT_V6T2 | ARM_EXT_V6K | ARM_EXT_V6Z) +#define ARM_AEXT_V6T2 (ARM_AEXT_V6 | ARM_EXT_V6T2 | ARM_EXT_V6_NOTM) +#define ARM_AEXT_V6KT2 (ARM_AEXT_V6T2 | ARM_EXT_V6K) +#define ARM_AEXT_V6ZT2 (ARM_AEXT_V6T2 | ARM_EXT_V6Z) +#define ARM_AEXT_V6ZKT2 (ARM_AEXT_V6T2 | ARM_EXT_V6K | ARM_EXT_V6Z) +#define ARM_AEXT_V7_ARM (ARM_AEXT_V6T2 | ARM_EXT_V7) +#define ARM_AEXT_V7A (ARM_AEXT_V7_ARM | ARM_EXT_V7A) +#define ARM_AEXT_V7R (ARM_AEXT_V7_ARM | ARM_EXT_V7R | ARM_EXT_DIV) +#define ARM_AEXT_NOTM \ + (ARM_AEXT_V4 | ARM_EXT_V5ExP | ARM_EXT_V5J | ARM_EXT_V6_NOTM) +#define ARM_AEXT_V7M \ + ((ARM_AEXT_V7_ARM | ARM_EXT_V7M | ARM_EXT_DIV) & ~(ARM_AEXT_NOTM)) +#define ARM_AEXT_V7 (ARM_AEXT_V7A & ARM_AEXT_V7R & ARM_AEXT_V7M) /* Processors with specific extensions in the co-processor space. */ #define ARM_ARCH_XSCALE ARM_FEATURE (ARM_AEXT_V5TE, ARM_CEXT_XSCALE) @@ -130,13 +147,17 @@ #define ARM_ARCH_V6KT2 ARM_FEATURE (ARM_AEXT_V6KT2, 0) #define ARM_ARCH_V6ZT2 ARM_FEATURE (ARM_AEXT_V6ZT2, 0) #define ARM_ARCH_V6ZKT2 ARM_FEATURE (ARM_AEXT_V6ZKT2, 0) +#define ARM_ARCH_V7 ARM_FEATURE (ARM_AEXT_V7, 0) +#define ARM_ARCH_V7A ARM_FEATURE (ARM_AEXT_V7A, 0) +#define ARM_ARCH_V7R ARM_FEATURE (ARM_AEXT_V7R, 0) +#define ARM_ARCH_V7M ARM_FEATURE (ARM_AEXT_V7M, 0) /* Some useful combinations: */ #define ARM_ARCH_NONE ARM_FEATURE (0, 0) #define FPU_NONE ARM_FEATURE (0, 0) #define ARM_ANY ARM_FEATURE (-1, 0) /* Any basic core. */ #define FPU_ANY_HARD ARM_FEATURE (0, FPU_FPA | FPU_VFP_HARD | FPU_MAVERICK) -#define ARM_ARCH_THUMB2 ARM_FEATURE (ARM_EXT_V6T2, 0) +#define ARM_ARCH_THUMB2 ARM_FEATURE (ARM_EXT_V6T2 | ARM_EXT_V7 | ARM_EXT_V7A | ARM_EXT_V7R | ARM_EXT_V7M | ARM_EXT_DIV, 0) /* There are too many feature bits to fit in a single word, so use a structure. For simplicity we put all core features in one word and