2014-11-26 Matthew Fortune <Matthew.Fortune@imgtec.com>
* mips/crt0.S: Remove .set noreorder throughout.
(zerobss): Open code the bltu macro instruction so that the
zero-loop does not have a NOP in the branch delay slot.
This commit is contained in:
Jeff Johnston
parent
93d15b36ef
commit
84b2a020da
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@ -1,3 +1,9 @@
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2014-11-26 Matthew Fortune <Matthew.Fortune@imgtec.com>
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* mips/crt0.S: Remove .set noreorder throughout.
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(zerobss): Open code the bltu macro instruction so that the
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zero-loop does not have a NOP in the branch delay slot.
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2014-11-13 Nick Clifton <nickc@redhat.com>
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* msp430/Makefile.in (CRT_OBJS): Add crt_high_bss.o.
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@ -57,13 +57,14 @@
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.globl _start
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.ent _start
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_start:
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.set noreorder
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#ifdef __mips_embedded_pic
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#define PICBASE start_PICBASE
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.set noreorder
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PICBASE = .+8
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bal PICBASE
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nop
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move s0,$31
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.set reorder
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#endif
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#if __mips<3
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# define STATUS_MASK (SR_CU1|SR_PE)
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@ -89,9 +90,7 @@ _start:
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/* Avoid hazard from FPU enable and other SR changes. */
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LA (t0, hardware_hazard_hook)
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beq t0,zero,1f
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nop
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jal t0
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nop
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jalr t0
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1:
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/* Check for FPU presence. Don't check if we know that soft_float is
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@ -105,11 +104,8 @@ _start:
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mfc1 t1,fp1
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nop
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bne t0,t2,1f /* check for match */
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nop
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bne t1,zero,1f /* double check */
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nop
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j 2f /* FPU is present. */
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nop
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#endif
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1:
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/* FPU is not present. Set status register to say that. */
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@ -119,9 +115,7 @@ _start:
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/* Avoid hazard from FPU disable. */
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LA (t0, hardware_hazard_hook)
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beq t0,zero,2f
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nop
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jal t0
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nop
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jalr t0
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2:
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@ -129,7 +123,6 @@ _start:
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doesn't get confused. */
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LA (v0, 3f)
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jr v0
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nop
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3:
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LA (gp, _gp) # set the global data pointer
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.end _start
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@ -145,21 +138,20 @@ _start:
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zerobss:
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LA (v0, _fbss)
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LA (v1, _end)
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3:
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sw zero,0(v0)
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bltu v0,v1,3b
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addiu v0,v0,4 # executed in delay slot
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beq v0,v1,2f
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1:
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addiu v0,v0,4
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sw zero,-4(v0)
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bne v0,v1,1b
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2:
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la t0, __lstack # make a small stack so we
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addiu sp, t0, STARTUP_STACK_SIZE # can run some C code
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la a0, __memsize # get the usable memory size
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jal get_mem_info
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nop
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/* setup the stack pointer */
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LA (t0, __stack) # is __stack set ?
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bne t0,zero,4f
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nop
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/* NOTE: a0[0] contains the amount of memory available, and
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not the last memory address. */
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@ -189,19 +181,14 @@ zerobss:
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init:
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LA (t9, hardware_init_hook) # init the hardware if needed
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beq t9,zero,6f
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nop
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jal t9
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nop
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jalr t9
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6:
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LA (t9, software_init_hook) # init the hardware if needed
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beq t9,zero,7f
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nop
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jal t9
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nop
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jalr t9
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7:
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LA (a0, _fini)
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jal atexit
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nop
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#ifdef GCRT0
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.globl _ftext
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@ -209,12 +196,10 @@ init:
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LA (a0, _ftext)
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LA (a1, _etext)
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jal monstartup
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nop
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#endif
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jal _init # run global constructors
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nop
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addiu a1,sp,32 # argv = sp + 32
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addiu a2,sp,40 # envp = sp + 40
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@ -225,13 +210,13 @@ init:
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sw zero,(a1)
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sw zero,(a2)
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#endif
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jal main # call the program start function
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move a0,zero # set argc to 0
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jal main # call the program start function
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# fall through to the "exit" routine
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move a0,v0 # pass through the exit code
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jal exit # call libc exit to run the G++
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# destructors
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move a0,v0 # pass through the exit code
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.end init
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@ -257,27 +242,25 @@ _exit:
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/* Need to reinit PICBASE, since we might be called via exit()
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rather than via a return path which would restore old s0. */
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#define PICBASE exit_PICBASE
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.set noreorder
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PICBASE = .+8
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bal PICBASE
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nop
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move s0,$31
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.set reorder
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#endif
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#ifdef GCRT0
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LA (t0, _mcleanup)
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jal t0
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nop
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jalr t0
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#endif
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LA (t0, hardware_exit_hook)
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beq t0,zero,1f
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nop
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jal t0
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nop
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jalr t0
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1:
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# break instruction can cope with 0xfffff, but GAS limits the range:
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break 1023
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b 7b # but loop back just in-case
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nop
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.end _exit
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/* Assume the PICBASE set up above is no longer valid below here. */
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