[.]
* configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
This commit is contained in:
DJ Delorie
parent
cfb964a4e9
commit
a4cff05a7f
|
|
@ -1,3 +1,8 @@
|
|||
2011-11-01 DJ Delorie <dj@redhat.com>
|
||||
|
||||
* configure.ac (rl78-*-*) New case.
|
||||
* configure: Regenerate.
|
||||
|
||||
2011-11-01 DJ Delorie <dj@redhat.com>
|
||||
|
||||
* config.sub: Update to version 2011-10-29 (added rl78)
|
||||
|
|
|
|||
|
|
@ -3065,6 +3065,10 @@ case "${target}" in
|
|||
powerpc-*-aix* | rs6000-*-aix*)
|
||||
noconfigdirs="$noconfigdirs target-libssp"
|
||||
;;
|
||||
rl78-*-*)
|
||||
# Dereferencing -1 is a compile-time error
|
||||
noconfigdirs="$noconfigdirs target-libssp"
|
||||
;;
|
||||
esac
|
||||
|
||||
# Disable libstdc++-v3 for some systems.
|
||||
|
|
|
|||
|
|
@ -501,6 +501,10 @@ case "${target}" in
|
|||
powerpc-*-aix* | rs6000-*-aix*)
|
||||
noconfigdirs="$noconfigdirs target-libssp"
|
||||
;;
|
||||
rl78-*-*)
|
||||
# Dereferencing -1 is a compile-time error
|
||||
noconfigdirs="$noconfigdirs target-libssp"
|
||||
;;
|
||||
esac
|
||||
|
||||
# Disable libstdc++-v3 for some systems.
|
||||
|
|
|
|||
|
|
@ -1,3 +1,7 @@
|
|||
2011-11-01 DJ Delorie <dj@redhat.com>
|
||||
|
||||
* dis-asm.h (print_insn_rl78): Declare.
|
||||
|
||||
2011-10-25 Joern Rennecke <joern.rennecke@embecosm.com>
|
||||
|
||||
* dis-asm.h (print_insn_epiphany): Declare.
|
||||
|
|
|
|||
|
|
@ -299,6 +299,7 @@ extern int print_insn_z80 (bfd_vma, disassemble_info *);
|
|||
extern int print_insn_z8001 (bfd_vma, disassemble_info *);
|
||||
extern int print_insn_z8002 (bfd_vma, disassemble_info *);
|
||||
extern int print_insn_rx (bfd_vma, disassemble_info *);
|
||||
extern int print_insn_rl78 (bfd_vma, disassemble_info *);
|
||||
|
||||
extern disassembler_ftype arc_get_disassembler (void *);
|
||||
extern disassembler_ftype cris_get_disassembler (bfd *);
|
||||
|
|
|
|||
|
|
@ -1,3 +1,8 @@
|
|||
2011-11-01 DJ Delorie <dj@redhat.com>
|
||||
|
||||
* common.h (EM_RL78, EM_78K0R): New.
|
||||
* rl78.h: New.
|
||||
|
||||
2011-10-25 Joern Rennecke <joern.rennecke@embecosm.com>
|
||||
|
||||
* epiphany.h: New file.
|
||||
|
|
|
|||
|
|
@ -296,6 +296,8 @@
|
|||
#define EM_MICROBLAZE 189 /* Xilinx MicroBlaze 32-bit RISC soft processor core */
|
||||
#define EM_CUDA 190 /* NVIDIA CUDA architecture */
|
||||
#define EM_TILEGX 191 /* Tilera TILE-Gx multicore architecture family */
|
||||
#define EM_RL78 197 /* Renesas RL78 family. */
|
||||
#define EM_78K0R 199 /* Renesas 78K0R. */
|
||||
|
||||
/* If it is necessary to assign new unofficial EM_* values, please pick large
|
||||
random numbers (0x8523, 0xa7f2, etc.) to minimize the chances of collision
|
||||
|
|
|
|||
|
|
@ -0,0 +1,118 @@
|
|||
/* RL78 ELF support for BFD.
|
||||
Copyright (C) 2008, 2009, 2010 Free Software Foundation, Inc.
|
||||
|
||||
This file is part of BFD, the Binary File Descriptor library.
|
||||
|
||||
This program is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
This program is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program; if not, write to the Free Software Foundation,
|
||||
Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
|
||||
|
||||
#ifndef _ELF_RL78_H
|
||||
#define _ELF_RL78_H
|
||||
|
||||
#include "elf/reloc-macros.h"
|
||||
|
||||
/* Note that there are a few internal relocation types used by the
|
||||
linker to do link-time relaxation. If you update this file, please
|
||||
check elf32-rl78.c to see if any of the internal relocations need to
|
||||
be, er, relocated. */
|
||||
|
||||
/* Preliminary relocations. */
|
||||
START_RELOC_NUMBERS (elf_rl78_reloc_type)
|
||||
|
||||
RELOC_NUMBER (R_RL78_NONE, 0x00)
|
||||
/* These are for data, and are bi-endian. */
|
||||
RELOC_NUMBER (R_RL78_DIR32, 0x01) /* Was: R_RL78_32. */
|
||||
RELOC_NUMBER (R_RL78_DIR24S, 0x02) /* Was: R_RL78_24. */
|
||||
RELOC_NUMBER (R_RL78_DIR16, 0x03)
|
||||
RELOC_NUMBER (R_RL78_DIR16U, 0x04) /* Was: R_RL78_16_UNS. */
|
||||
RELOC_NUMBER (R_RL78_DIR16S, 0x05) /* Was: R_RL78_16. */
|
||||
RELOC_NUMBER (R_RL78_DIR8, 0x06)
|
||||
RELOC_NUMBER (R_RL78_DIR8U, 0x07) /* Was: R_RL78_8_UNS. */
|
||||
RELOC_NUMBER (R_RL78_DIR8S, 0x08) /* Was: R_RL78_8. */
|
||||
|
||||
/* Signed pc-relative values. */
|
||||
RELOC_NUMBER (R_RL78_DIR24S_PCREL, 0x09) /* Was: R_RL78_24_PCREL. */
|
||||
RELOC_NUMBER (R_RL78_DIR16S_PCREL, 0x0a) /* Was: R_RL78_16_PCREL. */
|
||||
RELOC_NUMBER (R_RL78_DIR8S_PCREL, 0x0b) /* Was: R_RL78_8_PCREL. */
|
||||
|
||||
/* These are for fields in the instructions. */
|
||||
RELOC_NUMBER (R_RL78_DIR16UL, 0x0c)
|
||||
RELOC_NUMBER (R_RL78_DIR16UW, 0x0d)
|
||||
RELOC_NUMBER (R_RL78_DIR8UL, 0x0e)
|
||||
RELOC_NUMBER (R_RL78_DIR8UW, 0x0f)
|
||||
RELOC_NUMBER (R_RL78_DIR32_REV, 0x10)
|
||||
RELOC_NUMBER (R_RL78_DIR16_REV, 0x11)
|
||||
RELOC_NUMBER (R_RL78_DIR3U_PCREL, 0x12)
|
||||
|
||||
/* These are for complex relocs. */
|
||||
RELOC_NUMBER (R_RL78_ABS32, 0x41)
|
||||
RELOC_NUMBER (R_RL78_ABS24S, 0x42)
|
||||
RELOC_NUMBER (R_RL78_ABS16, 0x43)
|
||||
RELOC_NUMBER (R_RL78_ABS16U, 0x44)
|
||||
RELOC_NUMBER (R_RL78_ABS16S, 0x45)
|
||||
RELOC_NUMBER (R_RL78_ABS8, 0x46)
|
||||
RELOC_NUMBER (R_RL78_ABS8U, 0x47)
|
||||
RELOC_NUMBER (R_RL78_ABS8S, 0x48)
|
||||
RELOC_NUMBER (R_RL78_ABS24S_PCREL, 0x49)
|
||||
RELOC_NUMBER (R_RL78_ABS16S_PCREL, 0x4a)
|
||||
RELOC_NUMBER (R_RL78_ABS8S_PCREL, 0x4b)
|
||||
RELOC_NUMBER (R_RL78_ABS16UL, 0x4c)
|
||||
RELOC_NUMBER (R_RL78_ABS16UW, 0x4d)
|
||||
RELOC_NUMBER (R_RL78_ABS8UL, 0x4e)
|
||||
RELOC_NUMBER (R_RL78_ABS8UW, 0x4f)
|
||||
RELOC_NUMBER (R_RL78_ABS32_REV, 0x50)
|
||||
RELOC_NUMBER (R_RL78_ABS16_REV, 0x51)
|
||||
|
||||
RELOC_NUMBER (R_RL78_SYM, 0x80)
|
||||
RELOC_NUMBER (R_RL78_OPneg, 0x81)
|
||||
RELOC_NUMBER (R_RL78_OPadd, 0x82)
|
||||
RELOC_NUMBER (R_RL78_OPsub, 0x83)
|
||||
RELOC_NUMBER (R_RL78_OPmul, 0x84)
|
||||
RELOC_NUMBER (R_RL78_OPdiv, 0x85)
|
||||
RELOC_NUMBER (R_RL78_OPshla, 0x86)
|
||||
RELOC_NUMBER (R_RL78_OPshra, 0x87)
|
||||
RELOC_NUMBER (R_RL78_OPsctsize, 0x88)
|
||||
RELOC_NUMBER (R_RL78_OPscttop, 0x8d)
|
||||
RELOC_NUMBER (R_RL78_OPand, 0x90)
|
||||
RELOC_NUMBER (R_RL78_OPor, 0x91)
|
||||
RELOC_NUMBER (R_RL78_OPxor, 0x92)
|
||||
RELOC_NUMBER (R_RL78_OPnot, 0x93)
|
||||
RELOC_NUMBER (R_RL78_OPmod, 0x94)
|
||||
RELOC_NUMBER (R_RL78_OPromtop, 0x95)
|
||||
RELOC_NUMBER (R_RL78_OPramtop, 0x96)
|
||||
|
||||
END_RELOC_NUMBERS (R_RL78_max)
|
||||
|
||||
#define EF_RL78_CPU_RL78 0x00000079 /* FIXME: correct value? */
|
||||
#define EF_RL78_CPU_MASK 0x0000007F /* specific cpu bits. */
|
||||
#define EF_RL78_ALL_FLAGS (EF_RL78_CPU_MASK)
|
||||
|
||||
/* Values for the e_flags field in the ELF header. */
|
||||
#define E_FLAG_RL78_64BIT_DOUBLES (1 << 0)
|
||||
#define E_FLAG_RL78_DSP (1 << 1) /* Defined in the RL78 CPU Object file specification, but not explained. */
|
||||
|
||||
/* These define the addend field of R_RL78_RH_RELAX relocations. */
|
||||
#define RL78_RELAXA_IMM6 0x00000010 /* Imm8/16/24/32 at bit offset 6. */
|
||||
#define RL78_RELAXA_IMM12 0x00000020 /* Imm8/16/24/32 at bit offset 12. */
|
||||
#define RL78_RELAXA_DSP4 0x00000040 /* Dsp0/8/16 at bit offset 4. */
|
||||
#define RL78_RELAXA_DSP6 0x00000080 /* Dsp0/8/16 at bit offset 6. */
|
||||
#define RL78_RELAXA_DSP14 0x00000100 /* Dsp0/8/16 at bit offset 14. */
|
||||
#define RL78_RELAXA_BRA 0x00000200 /* Any type of branch (must be decoded). */
|
||||
#define RL78_RELAXA_RNUM 0x0000000f /* Number of associated relocations. */
|
||||
/* These mark the place where alignment is requested, and the place where the filler bytes end. */
|
||||
#define RL78_RELAXA_ALIGN 0x10000000 /* Start alignment; the remaining bits are the alignment value. */
|
||||
#define RL78_RELAXA_ELIGN 0x20000000 /* End alignment; the remaining bits are the alignment value. */
|
||||
#define RL78_RELAXA_ANUM 0x00ffffff /* Alignment amount, in bytes (i.e. .balign). */
|
||||
|
||||
#endif /* _ELF_RL78_H */
|
||||
|
|
@ -1,3 +1,7 @@
|
|||
2011-11-01 DJ Delorie <dj@redhat.com>
|
||||
|
||||
* rl78.h: New file.
|
||||
|
||||
2011-10-24 Maciej W. Rozycki <macro@codesourcery.com>
|
||||
|
||||
* mips.h: Fix a typo in description.
|
||||
|
|
|
|||
|
|
@ -0,0 +1,168 @@
|
|||
/* Opcode decoder for the Renesas RL78
|
||||
Copyright 2011
|
||||
Free Software Foundation, Inc.
|
||||
Written by DJ Delorie <dj@redhat.com>
|
||||
|
||||
This file is part of GDB, the GNU Debugger and GAS, the GNU Assembler.
|
||||
|
||||
This program is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
This program is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program; if not, write to the Free Software
|
||||
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
|
||||
02110-1301, USA. */
|
||||
|
||||
/* The RL78 decoder in libopcodes is used by the simulator, gdb's
|
||||
analyzer, and the disassembler. Given an opcode data source, it
|
||||
decodes the next opcode into the following structures. */
|
||||
|
||||
#ifndef RL78_OPCODES_H_INCLUDED
|
||||
#define RL78_OPCODES_H_INCLUDED
|
||||
|
||||
/* For the purposes of these structures, the RL78 registers are as
|
||||
follows, despite most of these being memory-mapped and
|
||||
bank-switched: */
|
||||
typedef enum {
|
||||
RL78_Reg_None,
|
||||
/* The order of these matches the encodings. */
|
||||
RL78_Reg_X,
|
||||
RL78_Reg_A,
|
||||
RL78_Reg_C,
|
||||
RL78_Reg_B,
|
||||
RL78_Reg_E,
|
||||
RL78_Reg_D,
|
||||
RL78_Reg_L,
|
||||
RL78_Reg_H,
|
||||
/* The order of these matches the encodings. */
|
||||
RL78_Reg_AX,
|
||||
RL78_Reg_BC,
|
||||
RL78_Reg_DE,
|
||||
RL78_Reg_HL,
|
||||
/* Unordered. */
|
||||
RL78_Reg_SP,
|
||||
RL78_Reg_PSW,
|
||||
RL78_Reg_CS,
|
||||
RL78_Reg_ES,
|
||||
RL78_Reg_PMC,
|
||||
RL78_Reg_MEM
|
||||
} RL78_Register;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
RL78_Byte = 0,
|
||||
RL78_Word
|
||||
} RL78_Size;
|
||||
|
||||
typedef enum {
|
||||
RL78_Condition_T,
|
||||
RL78_Condition_F,
|
||||
RL78_Condition_C,
|
||||
RL78_Condition_NC,
|
||||
RL78_Condition_H,
|
||||
RL78_Condition_NH,
|
||||
RL78_Condition_Z,
|
||||
RL78_Condition_NZ
|
||||
} RL78_Condition;
|
||||
|
||||
typedef enum {
|
||||
RL78_Operand_None = 0,
|
||||
RL78_Operand_Immediate, /* #addend */
|
||||
RL78_Operand_Register, /* reg */
|
||||
RL78_Operand_Indirect, /* [reg + reg2 + addend] */
|
||||
RL78_Operand_Bit, /* reg.bit */
|
||||
RL78_Operand_BitIndirect, /* [reg+reg2+addend].bit */
|
||||
RL78_Operand_PreDec, /* [--reg] = push */
|
||||
RL78_Operand_PostInc /* [reg++] = pop */
|
||||
} RL78_Operand_Type;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
RLO_unknown,
|
||||
RLO_add, /* d += s */
|
||||
RLO_addc, /* d += s + CY */
|
||||
RLO_and, /* d &= s (byte, word, bit) */
|
||||
RLO_branch, /* pc = d */
|
||||
RLO_branch_cond, /* pc = d if cond(src) */
|
||||
RLO_branch_cond_clear, /* pc = d if cond(src), and clear(src) */
|
||||
RLO_break, /* BRK */
|
||||
RLO_call, /* call */
|
||||
RLO_cmp, /* cmp d, s */
|
||||
RLO_divhu, /* DIVHU */
|
||||
RLO_divwu, /* DIVWU */
|
||||
RLO_halt, /* HALT */
|
||||
RLO_mov, /* d = s */
|
||||
RLO_mach, /* MACH */
|
||||
RLO_machu, /* MACHU */
|
||||
RLO_mulu, /* MULU */
|
||||
RLO_mulh, /* MULH */
|
||||
RLO_mulhu, /* MULHU */
|
||||
RLO_nop, /* NOP */
|
||||
RLO_or, /* d |= s */
|
||||
RLO_ret, /* RET */
|
||||
RLO_reti, /* RETI */
|
||||
RLO_rol, /* d <<= s, MSB to LSB and CY */
|
||||
RLO_rolc, /* d <<= s, MSB to CY, CY, to LSB */
|
||||
RLO_ror, /* d >>= s, LSB to MSB and CY */
|
||||
RLO_rorc, /* d >>= s, LSB to CY, CY, to MSB */
|
||||
RLO_sar, /* d >>= s, signed */
|
||||
RLO_sel, /* rb = s */
|
||||
RLO_shr, /* d >>= s, unsigned */
|
||||
RLO_shl, /* d <<= s */
|
||||
RLO_skip, /* skip next insn is cond(s) */
|
||||
RLO_stop, /* STOP */
|
||||
RLO_sub, /* d -= s */
|
||||
RLO_subc, /* d -= s - CY */
|
||||
RLO_xch, /* swap d, s */
|
||||
RLO_xor, /* d ^= s */
|
||||
} RL78_Opcode_ID;
|
||||
|
||||
typedef struct {
|
||||
RL78_Operand_Type type;
|
||||
int addend;
|
||||
RL78_Register reg : 8;
|
||||
RL78_Register reg2 : 8;
|
||||
unsigned char bit_number : 4;
|
||||
unsigned char condition : 3;
|
||||
unsigned char use_es : 1;
|
||||
} RL78_Opcode_Operand;
|
||||
|
||||
/* PSW flag bits */
|
||||
#define RL78_PSW_IE 0x80
|
||||
#define RL78_PSW_Z 0x40
|
||||
#define RL78_PSW_RBS1 0x20
|
||||
#define RL78_PSW_AC 0x10
|
||||
#define RL78_PSW_RBS0 0x08
|
||||
#define RL78_PSW_ISP1 0x04
|
||||
#define RL78_PSW_ISP0 0x02
|
||||
#define RL78_PSW_CY 0x01
|
||||
|
||||
#define RL78_SFR_SP 0xffff8
|
||||
#define RL78_SFR_PSW 0xffffa
|
||||
#define RL78_SFR_CS 0xffffc
|
||||
#define RL78_SFR_ES 0xffffd
|
||||
#define RL78_SFR_PMC 0xffffe
|
||||
#define RL78_SFR_MEM 0xfffff
|
||||
|
||||
typedef struct
|
||||
{
|
||||
int lineno;
|
||||
RL78_Opcode_ID id:24;
|
||||
unsigned flags:8; /* PSW mask, for side effects only */
|
||||
int n_bytes;
|
||||
char * syntax;
|
||||
RL78_Size size;
|
||||
/* By convention, these are destination, source. */
|
||||
RL78_Opcode_Operand op[2];
|
||||
} RL78_Opcode_Decoded;
|
||||
|
||||
int rl78_decode_opcode (unsigned long, RL78_Opcode_Decoded *, int (*)(void *), void *);
|
||||
|
||||
#endif
|
||||
Loading…
Reference in New Issue