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Store entire context for or1k 

- Store the exception program counter (from EPCR) and exception status
  register (from ESR) also during the exception. A runtime system may
  replace them thereby to implement a thread switch.

    * or1k/exception-asm.S: Store missing state
This commit is contained in:
Jeff Johnston 2015-05-26 15:23:39 -04:00 committed by Corinna Vinschen
parent a6342974b0
commit b46d3b5536
2 changed files with 14 additions and 0 deletions
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4
libgloss/ChangeLog
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@ -1,3 +1,7 @@
2015-05-26 Stefan Wallentowitz <stefan.wallentowitz@tum.de>
* or1k/exception-asm.S: Store missing state
2015-05-26 Stefan Wallentowitz <stefan.wallentowitz@tum.de>
* or1k/crt0.S: Fix exception stack frame

10
libgloss/or1k/exceptions-asm.S
View File

@ -73,6 +73,10 @@ _or1k_exception_handler:
l.sw GPR_BUF_OFFSET(29)(r1),r29
l.sw GPR_BUF_OFFSET(30)(r1),r30
l.sw GPR_BUF_OFFSET(31)(r1),r31
l.mfspr r14,r0,OR1K_SPR_SYS_EPCR_BASE
l.sw 0x80(r1),r14
l.mfspr r14,r0,OR1K_SPR_SYS_ESR_BASE
l.sw 0x84(r1),r14
/* Replace impure pointer for exception */
l.movhi r20,hi(_or1k_exception_impure_ptr)
@ -156,6 +160,12 @@ _or1k_exception_handler:
l.sw 0(r21),r20
/* Restore state */
l.lwz r2,0x80(r1)
l.mtspr r0,r2,OR1K_SPR_SYS_EPCR_BASE
l.lwz r2,0x84(r1)
l.mtspr r0,r2,OR1K_SPR_SYS_ESR_BASE
l.lwz r2,GPR_BUF_OFFSET(2)(r1)
l.lwz r3,GPR_BUF_OFFSET(3)(r1)
l.lwz r4,GPR_BUF_OFFSET(4)(r1)