* newlib/libc/include/machine/setjmp.h: Add FPU support.
* newlib/libc/machine/nds32/setjmp.S: Add FPU support.
This commit is contained in:
Corinna Vinschen
parent
d4ef8a6368
commit
f5ce72dffc
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@ -1,3 +1,8 @@
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2014-12-15 Nick Hung <nick@andestech.com>
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* newlib/libc/include/machine/setjmp.h: Add FPU support.
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* newlib/libc/machine/nds32/setjmp.S: Add FPU support.
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2014-12-15 Nick Hung <nick@andestech.com>
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* configure.host: Add libm nds32 machine directory.
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@ -61,11 +61,18 @@ _BEGIN_STD_C
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#endif
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#ifdef __nds32__
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/* Only 17 words are currently needed.
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Preserve one word slot if we need to expand.
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Check newlib/libc/machine/nds32/setjmp.S for more information. */
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/* 17 words for GPRs,
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1 word for $fpcfg.freg and 30 words for FPUs
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Reserved 2 words for aligement-adjustment. When storeing double-precision
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floating-point register into memory, the address has to be
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double-word-aligned.
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Check libc/machine/nds32/setjmp.S for more information. */
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#if __NDS32_EXT_FPU_SP__ || __NDS32_EXT_FPU_DP__
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#define _JBLEN 50
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#else
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#define _JBLEN 18
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#endif
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#endif
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#if defined(__Z8001__) || defined(__Z8002__)
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/* 16 regs + pc */
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@ -51,7 +51,7 @@ The $r16 ~ $r19 are used to store D0/D1, keep them for backward-compatible.
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.global setjmp
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.type setjmp, @function
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setjmp:
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#ifdef __NDS32_REDUCED_REGS__
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#if __NDS32_REDUCED_REGS__
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smw.bim $r6, [$r0], $r10, #0b0000
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addi $r0, $r0, #32 /* Leave room to keep jum_buf all the same. */
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smw.bim $r31, [$r0], $r31, #0b1111
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@ -60,6 +60,46 @@ setjmp:
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smw.bim $r16, [$r0], $r19, #0b1111
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#endif
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#if __NDS32_EXT_FPU_SP__ || __NDS32_EXT_FPU_DP__
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/* Extract $fpcfg.freg (b[3:2]), then save into jmp_buf. */
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fmfcfg $r2
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slli $r2, $r2, #28
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srli $r2, $r2, #30
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swi.bi $r2, [$r0], #4
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/* Make sure $r0 is double-word-aligned. */
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addi $r0, $r0, #7
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bitci $r0, $r0, #7
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/* Case switch according to $fpcfg.freg */
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beqz $r2, .LCFG0_save /* Branch if $fpcfg.freg = 0b00. */
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xori $r15, $r2, #0b10
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beqz $r15, .LCFG2_save /* Branch $fpcfg.freg = 0b10. */
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srli $r2, $r2, #0b01
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beqz $r2, .LCFG1_save /* Branch if $fpcfg.freg = 0b01. */
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/* Fall-through if $fpcfg.freg = 0b11. */
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.LCFG3_save:
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fsdi.bi $fd31, [$r0], #8
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fsdi.bi $fd29, [$r0], #8
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fsdi.bi $fd27, [$r0], #8
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fsdi.bi $fd25, [$r0], #8
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fsdi.bi $fd23, [$r0], #8
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fsdi.bi $fd21, [$r0], #8
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fsdi.bi $fd19, [$r0], #8
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fsdi.bi $fd17, [$r0], #8
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.LCFG2_save:
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fsdi.bi $fd15, [$r0], #8
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fsdi.bi $fd13, [$r0], #8
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fsdi.bi $fd11, [$r0], #8
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fsdi.bi $fd9, [$r0], #8
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.LCFG1_save:
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fsdi.bi $fd7, [$r0], #8
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fsdi.bi $fd5, [$r0], #8
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.LCFG0_save:
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fsdi.bi $fd3, [$r0], #8
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#endif
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/* Set return value to zero. */
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movi $r0, 0
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ret
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@ -72,7 +112,7 @@ setjmp:
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.global longjmp
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.type longjmp, @function
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longjmp:
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#ifdef __NDS32_REDUCED_REGS__
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#if __NDS32_REDUCED_REGS__
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lmw.bim $r6, [$r0], $r10, #0b0000
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addi $r0, $r0, #32
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lmw.bim $r31, [$r0], $r31, #0b1111
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@ -80,6 +120,44 @@ longjmp:
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lmw.bim $r6, [$r0], $r14, #0b0000
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lmw.bim $r16, [$r0], $r19, #0b1111
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#endif
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#if __NDS32_EXT_FPU_SP__ || __NDS32_EXT_FPU_DP__
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/* Restore value of $fpcfg.freg (b[3:2]). */
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lwi.bi $r2, [$r0], #4
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/* Make sure $r0 is double-word-aligned. */
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addi $r0, $r0, #7
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bitci $r0, $r0, #7
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/* Case switch according to $fpcfg.freg */
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beqz $r2, .LCFG0_restore /* Branch if $fpcfg.freg = 0b00. */
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xori $r15, $r2, #0b10
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beqz $r15, .LCFG2_restore /* Branch $fpcfg.freg = 0b10. */
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srli $r2, $r2, #0b01
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beqz $r2, .LCFG1_restore /* Branch if $fpcfg.freg = 0b01. */
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/* Fall-through if $fpcfg.freg = 0b11. */
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.LCFG3_restore:
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fldi.bi $fd31, [$r0], #8
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fldi.bi $fd29, [$r0], #8
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fldi.bi $fd27, [$r0], #8
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fldi.bi $fd25, [$r0], #8
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fldi.bi $fd23, [$r0], #8
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fldi.bi $fd21, [$r0], #8
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fldi.bi $fd19, [$r0], #8
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fldi.bi $fd17, [$r0], #8
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.LCFG2_restore:
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fldi.bi $fd15, [$r0], #8
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fldi.bi $fd13, [$r0], #8
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fldi.bi $fd11, [$r0], #8
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fldi.bi $fd9, [$r0], #8
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.LCFG1_restore:
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fldi.bi $fd7, [$r0], #8
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fldi.bi $fd5, [$r0], #8
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.LCFG0_restore:
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fldi.bi $fd3, [$r0], #8
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#endif
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/* Set val as return value. If the value val is 0, 1 will be returned
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instead. */
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movi $r0, 1
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