From f6cab85f3a2b4a839b0caeaefc43543a2660dc7f Mon Sep 17 00:00:00 2001 From: "H.J. Lu" Date: Fri, 15 Jul 2005 13:49:53 +0000 Subject: [PATCH] gas/ 2007-07-15 H.J. Lu * gas/config/tc-i386.h (CpuVMX): New. (CpuUnknownFlags): Add CpuVMX. gas/testsuite/ 2007-07-15 H.J. Lu * gas/i386/i386.exp: Add vmx and x86-64-vmx. * gas/i386/vmx.d: New file. * gas/i386/vmx.s: Likewise. * gas/i386/x86-64-vmx.d: Likewise. * gas/i386/x86-64-vmx.s: Likewise. include/opcode/ 2007-07-15 H.J. Lu * i386.h (i386_optab): Support Intel VMX Instructions. opcodes/ 2007-07-15 H.J. Lu * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions. (VMX_Fixup): New. Fix up Intel VMX Instructions. (Em): New. (Gm): New. (VM): New. (dis386_twobyte): Updated entries 0x78 and 0x79. (twobyte_has_modrm): Likewise. (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9. (OP_G): Handle m_mode. --- include/opcode/ChangeLog | 4 ++++ include/opcode/i386.h | 14 ++++++++++++++ 2 files changed, 18 insertions(+) diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index 8690f078a..eee006808 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,3 +1,7 @@ +2007-07-15 H.J. Lu + + * i386.h (i386_optab): Support Intel VMX Instructions. + 2005-07-10 John David Anglin * hppa.h (pa_opcode): Don't set FLAG_STRICT in pa10 loads and stores. diff --git a/include/opcode/i386.h b/include/opcode/i386.h index 56266a8cc..9da718738 100644 --- a/include/opcode/i386.h +++ b/include/opcode/i386.h @@ -1347,6 +1347,20 @@ static const template i386_optab[] = /* Need to ensure only "mwait %eax,%ecx" is accepted. */ {"mwait", 2, 0x0f01, 0xc9, CpuPNI, NoSuf|ImmExt, { Reg32, Reg32, 0} }, +/* VMX instructions. */ +{"vmcall", 0, 0x0f01, 0xc1, CpuVMX, NoSuf|ImmExt, { 0, 0, 0} }, +{"vmclear", 1, 0x660fc7, 6, CpuVMX, NoSuf|IgnoreSize|Modrm|NoRex64, { LLongMem, 0, 0} }, +{"vmlaunch", 0, 0x0f01, 0xc2, CpuVMX, NoSuf|ImmExt, { 0, 0, 0} }, +{"vmresume", 0, 0x0f01, 0xc3, CpuVMX, NoSuf|ImmExt, { 0, 0, 0} }, +{"vmptrld", 1, 0x0fc7, 6, CpuVMX, NoSuf|IgnoreSize|Modrm|NoRex64, { LLongMem, 0, 0} }, +{"vmptrst", 1, 0x0fc7, 7, CpuVMX, NoSuf|IgnoreSize|Modrm|NoRex64, { LLongMem, 0, 0} }, +{"vmread", 2, 0x0f78, X, CpuVMX|CpuNo64, l_Suf|Modrm,{ Reg32, Reg32|LongMem, 0} }, +{"vmread", 2, 0x0f78, X, CpuVMX|Cpu64, q_Suf|Modrm|NoRex64,{ Reg64, Reg64|LLongMem, 0} }, +{"vmwrite", 2, 0x0f79, X, CpuVMX|CpuNo64, l_Suf|Modrm,{ Reg32|LongMem, Reg32, 0} }, +{"vmwrite", 2, 0x0f79, X, CpuVMX|Cpu64, q_Suf|Modrm|NoRex64,{ Reg64|LLongMem, Reg64, 0} }, +{"vmxoff", 0, 0x0f01, 0xc4, CpuVMX, NoSuf|ImmExt, { 0, 0, 0} }, +{"vmxon", 1, 0xf30fc7, 6, CpuVMX, NoSuf|IgnoreSize|Modrm|NoRex64, { LLongMem, 0, 0} }, + /* AMD 3DNow! instructions. */ {"prefetch", 1, 0x0f0d, 0, Cpu3dnow, NoSuf|IgnoreSize|Modrm, { ByteMem, 0, 0 } },