dcbf037e2b
* gdb/fileio.h: New file.
2003-06-10 14:23:05 +00:00
68afda5334
Add "attn", "lq" and "stq" power4 insns.
2003-06-10 07:44:11 +00:00
531297a749
include/opcode/
...
* h8300.h (IMM4_NS, IMM8_NS): New.
(h8_opcodes): Replace IMM4 with IMM4_NS in mov.b and mov.w entries.
Likewise IMM8 for mov.w and mov.l. Likewise IMM16U for mov.l.
gas/testsuite
* gas/h8300/h8sx_mov_imm.[sd]: New test.
* gas/h8300/h8300.exp: Run it.
2003-06-10 07:33:46 +00:00
8e0c2ab200
include/elf/
...
* h8.h (E_H8_MACH_H8300SXN): New flag.
bfd/
* archures.c (bfd_mach_h8300sxn): New architecture.
* bfd-in2.h: Regenerate.
* cpu-h8300.c (h8300_scan): Check for 'sxn'.
(h8300sxn_info_struct): New.
(h8300sx_info_struct): Link to it.
* elf32-h8300.c (elf32_h8_mach): Add h8300sxn case.
(elf32_h8_final_write_processing): Likewise.
gas/
* config/tc-h8300.c (h8300sxnmode): New.
(md_pseudo_table): Add .h8300sxn entry. Sync others with FSF version.
ld/
* configure.tgt (h8300*): Add h8300sxn emulations.
* Makefile.am (ALL_EMULATIONS): Add eh8300sxn.o and eh8300sxnelf.o.
(eh8300sxn.c, eh8300sxnelf.c): New rules.
* Makefile.in: Regenerate.
* emulparams/h8300sxnelf.sh, emulparams/h8300sxn.sh: New files.
2003-06-10 07:09:28 +00:00
2ec27e1180
2003-06-03 Michael Snyder <msnyder@redhat.com>
...
* h8sx.h (enum h8_model): Add AV_H8S to distinguish from H8H.
(ldc): Split ccr ops from exr ops (which are only available
on H8S or H8SX).
(stc): Ditto.
(andc, orc, xorc): Ditto.
(ldmac, stmac, clrmac, mac): Change access to AV_H8S.
2003-06-05 18:47:12 +00:00
2aea7f3e47
binutils/
...
* readelf.c (get_segment_type): Handle PT_GNU_STACK.
bfd/
* elf.c (_bfd_elf_print_private_bfd_data): Handle PT_GNU_STACK.
(bfd_section_from_phdr): Likewise.
(map_sections_to_segments): Create PT_GNU_STACK segment header.
(get_program_header_size): Count with PT_GNU_STACK.
* elf-bfd.h (struct elf_obj_tdata): Add stack_flags.
* elflink.h (bfd_elfNN_size_dynamic_sections): Set stack_flags.
include/
* bfdlink.h (struct bfd_link_info): Add execstack and noexecstack.
* elf/common.h (PT_GNU_STACK): Define.
ld/
* ldgram.y (phdr_type): Grok PT_GNU_STACK.
* emultempl/elf32.em (gld${EMULATION_NAME}_handle_option): Add
-z execstack and -z noexecstack.
(gld${EMULATION_NAME}_list_options): Likewise.
* scripttempl/elf.sc: If not -r, discard .note.GNU-stack section.
2003-06-03 22:27:23 +00:00
ba64818d65
2003-06-03 Michael Snyder <msnyder@redhat.com>
...
and Bernd Schmidt <bernds@redhat.com>
and Alexandre Oliva <aoliva@redhat.com>
* h8300.h: Add support for h8300sx instruction set.
2003-06-03 21:23:21 +00:00
15824b7c54
bfd/
...
2003-06-03 H.J. Lu <hongjiu.lu@intel.com>
* elflink.h (elf_link_input_bfd): Call linker error_handler
for discarded definitions.
include/
2003-06-03 H.J. Lu <hongjiu.lu@intel.com>
* bfdlink.h (LD_DEFINITION_IN_DISCARDED_SECTION): New.
ld/
2003-06-03 H.J. Lu <hongjiu.lu@intel.com>
* ldmisc.c: Include "bfdlink.h".
(error_handler): Handle LD_DEFINITION_IN_DISCARDED_SECTION
and -LD_DEFINITION_IN_DISCARDED_SECTION.
* Makefile.am: Rebuild dependency.
* Makefile.in: Regenerated.
ld/testsuite/
2003-06-03 H.J. Lu <hongjiu.lu@intel.com>
* ld-discard/extern.d: Updated.
* ld-discard/start.d: Likewise.
* ld-discard/static.d: Likewise.
2003-06-03 18:15:03 +00:00
283857c8db
Add pc-relative 32-bit reloc to v850 port. Fixes ld-elf/merge test failure.
2003-06-03 16:24:03 +00:00
ad767835c9
bfd/
...
* elflink.h (elf_link_add_object_symbols): Use !info->executable
instead of info->shared where appropriate.
(bfd_elfNN_size_dynamic_sections, elf_link_output_extsym): Likewise.
* elflink.c (_bfd_elf_create_got_section): Likewise.
(_bfd_elf_link_create_dynamic_sections): Likewise.
(_bfd_elf_link_assign_sym_version): Likewise.
* elf32-i386.c (elf_i386_size_dynamic_sections): Create .interp section
and DT_DEBUG dynamic tag even for position independent executables.
* elf32-ppc.c (ppc_elf_size_dynamic_sections): Likewise.
* elf32-s390.c (elf_s390_size_dynamic_sections: Likewise.
* elf64-ppc.c (ppc64_elf_size_dynamic_sections: Likewise.
* elf64-s390.c (elf_s390_size_dynamic_sections: Likewise.
* elf64-x86-64.c (elf64_x86_64_size_dynamic_sections: Likewise.
* elfxx-ia64.c (elfNN_ia64_size_dynamic_sections: Likewise.
* elf32-sparc.c (elf32_sparc_size_dynamic_sections: Likewise.
* elf64-alpha.c (elf64_alpha_size_dynamic_sections: Likewise.
* elf64-sparc.c (sparc64_elf_size_dynamic_sections: Likewise.
include/
* bfdlink.h (struct bfd_link_info): Add pie and executable
bits.
ld/
* lexsup.c (OPTION_PIE): Define.
(ld_options): Add -pie and --pic-executable options.
(parse_args): Handle OPTION_PIE.
* ldmain.c (main): Initialize link_info.pie and
link_info.executable.
* genscripts.sh: Generate PIE scripts.
* ld.texinfo: Document -pie and --pic-executable options.
* emultempl/elf32.em (gld${EMULATION_NAME}_after_open):
(gld${EMULATION_NAME}_place_orphan): Likewise.
(gld${EMULATION_NAME}_get_script): Include PIE scripts.
* scripttempl/elf.sc: In PIE scripts set . the same way as in
shared scripts.
* emulparams/elf_i386.sh (GENERATE_PIE_SCRIPT): Set to yes.
* emulparams/elf64_ia64.sh (GENERATE_PIE_SCRIPT): Likewise.
* emulparams/elf32ppc.sh (GENERATE_PIE_SCRIPT): Likewise.
* emulparams/elf64ppc.sh (GENERATE_PIE_SCRIPT): Likewise.
* emulparams/elf_x86_64.sh (GENERATE_PIE_SCRIPT): Likewise.
* emulparams/elf_s390.sh (GENERATE_PIE_SCRIPT): Likewise.
* emulparams/elf32_sparc.sh (GENERATE_PIE_SCRIPT): Likewise.
* emulparams/elf64_sparc.sh (GENERATE_PIE_SCRIPT): Likewise.
* emulparams/elf64alpha.sh (GENERATE_PIE_SCRIPT): Likewise.
* emulparams/elf64_s390.sh (GENERATE_PIE_SCRIPT): Likewise.
* emulparams/elf_i386.sh (GENERATE_PIE_SCRIPT): Likewise.
2003-05-30 15:50:11 +00:00
a82fd8b94e
2003-05-23 Jason Eckhardt <jle@rice.edu>
...
gas:
* config/tc-i860.c (target_xp): Declare variable.
(OPTION_XP): Declare macro.
(md_longopts): Add option -mxp.
(md_parse_option): Set target_xp.
(md_show_usage): Add -mxp usage.
(i860_process_insn): Recognize XP registers bear, ccr, p0-p3.
(md_assemble): Don't try expansions if XP_ONLY is set.
* doc/c-i860.texi: Document -mxp option.
gas/testsuite:
* gas/i860/xp.s: New file.
* gas/i860/xp.d: New file.
include/opcode:
* i860.h (expand_type): Add XP_ONLY.
(scyc.b): New XP instruction.
(ldio.l): Likewise.
(ldio.s): Likewise.
(ldio.b): Likewise.
(ldint.l): Likewise.
(ldint.s): Likewise.
(ldint.b): Likewise.
(stio.l): Likewise.
(stio.s): Likewise.
(stio.b): Likewise.
(pfld.q): Likewise.
opcodes:
* i860-dis.c (crnames): Add bear, ccr, p0, p1, p2, p3.
(print_insn_i860): Grab 4 bits of the control register field
instead of 3.
2003-05-24 04:22:23 +00:00
40aa85f9c5
Fix typo "ink" instead of "link"
2003-05-21 09:09:37 +00:00
3a9c82d011
2003-05-20 Jason Eckhardt <jle@rice.edu>
...
opcode/i860.h (flush): Set lower 3 bits properly and use 'L'
for the immediate operand type instead of 'i'.
2003-05-21 05:06:49 +00:00
4c394c394e
2003-05-20 Jason Eckhardt <jle@rice.edu>
...
opcode/i860.h (fzchks): Both S and R bits must be set.
(pfzchks): Likewise.
(faddp): Likewise.
(pfaddp): Likewise.
(fix.ss): Remove (invalid instruction).
(pfix.ss): Likewise.
(ftrunc.ss): Likewise.
(pftrunc.ss): Likewise.
2003-05-21 02:06:40 +00:00
b0f5999383
.
2003-05-21 00:55:28 +00:00
98e6de0772
2003-05-15 Roland McGrath <roland@redhat.com>
...
* common.h (NT_AUXV, AT_*): New macros.
* external.h (Elf32_External_Auxv, Elf64_External_Auxv): New types.
* internal.h (Elf_Internal_Auxv): New type.
2003-05-21 00:55:15 +00:00
de54768d72
2003-05-18 Jason Eckhardt <jle@rice.edu>
...
gas:
* config/tc-i860.c (i860_process_insn): Initialize fc after
each opcode mismatch.
include/opcode:
* i860.h (form, pform): Add missing .dd suffix.
opcodes:
* i860-dis.c (print_insn_i860): Instruction shrd has a dual bit,
print it.
bfd:
* elf32-i860.c (elf32_i860_relocate_highadj): Simplify calculation.
2003-05-18 21:24:32 +00:00
9cf346e11a
2003-05-14 Michael Snyder <msnyder@redhat.com>
...
From Bernd Schmidt <bernds@redhat.com>
* h8.h (E_H8_MACH_H8300SX): New.
2003-05-16 23:40:08 +00:00
ac5e8cb29c
libiberty/ChangeLog:
...
2003-05-14 Jim Blandy <jimb@redhat.com>
* hex.c (_hex_value): Make this unsigned.
(hex_value): Update documentation for new return type. hex_value
now expands to an unsigned int expression, to avoid unexpected
sign extension when we store it in a bfd_vma, which is larger than
int on some platforms.
* functions.texi: Regenerated.
include/ChangeLog:
2003-05-14 Jim Blandy <jimb@redhat.com>
* libiberty.h (hex_value): Make the value an unsigned int, to
avoid unexpected sign-extension when cast to unsigned types larger
than int --- like bfd_vma, on some platforms.
(_hex_value): Update declaration.
2003-05-15 19:08:25 +00:00
e655bfb1c0
* m68hc11.h (M68HC12_BANK_VIRT): Define to 0x010000
2003-05-13 19:28:14 +00:00
8bdd7abed5
* xtensa-isa-internal.h (xtensa_isa_module_struct): Remove const on
...
gen_num_opcodes_fn return type.
2003-05-09 11:36:09 +00:00
964e8f75bd
s/burtle/iterative
2003-05-07 20:30:13 +00:00
4c8abaa353
Index: gdb/ChangeLog
...
2003-05-07 Andrew Cagney <cagney@redhat.com>
* d10v-tdep.c (remote_d10v_translate_xfer_address): Add
"regcache".
(d10v_print_registers_info): Update.
(d10v_dmap_register, d10v_imap_register): Delete functions.
(struct gdbarch_tdep): Add "regcache" parameter to "dmap_register"
and "imap_register".
(d10v_ts2_dmap_register, d10v_ts2_imap_register): Add "regcache".
(d10v_ts3_dmap_register, d10v_ts3_imap_register): Add "regcache".
* arch-utils.c (generic_remote_translate_xfer_address): Add
"regcache" and "gdbarch" parameters.
* gdbarch.sh (REMOTE_TRANSLATE_XFER_ADDRESS): Add "regcache"
parameter. Change class to multi-arch.
* gdbarch.h, gdbarch.c: Re-generate.
* remote.c (remote_xfer_memory): Use
gdbarch_remote_translate_xfer_address.
Index: include/gdb/ChangeLog
2003-05-07 Andrew Cagney <cagney@redhat.com>
* sim-d10v.h (sim_d10v_translate_addr): Add regcache parameter.
(sim_d10v_translate_imap_addr): Add regcache parameter.
(sim_d10v_translate_dmap_addr): Ditto.
Index: sim/d10v/ChangeLog
2003-05-07 Andrew Cagney <cagney@redhat.com>
* interp.c (sim_d10v_translate_addr): Add "regcache" parameter.
(sim_d10v_translate_imap_addr): Ditto.
(sim_d10v_translate_dmap_addr): Ditto.
(xfer_mem): Pass NULL regcache to sim_d10v_translate_addr.
(dmem_addr): Pass NULL regcache to sim_d10v_translate_dmap_addr.
(dmap_register, imap_register): Add "regcache" parameter.
(imem_addr): Pass NULL regcache to sim_d10v_translate_imap_addr.
(sim_fetch_register): Pass NULL regcache to imap_register and
dmap_register.
2003-05-07 19:21:13 +00:00
f996c00b60
libiberty/
...
* hashtab.c (burtle_hash): New fn.
* configure.in: Add AC_C_BIGENDIAN_CROSS.
* aclocal.m4: Include accross.m4.
* configure, config.in: Regenerate.
include/
* hashtab.h (burtle_hash): Prototype.
(burtle_hash_object): New macro.
2003-05-07 18:06:23 +00:00
aa41823ffc
bfd/
...
2003-04-28 H.J. Lu <hjl@gnu.org>
* elfxx-ia64.c (elfNN_ia64_relax_section): Relax ldxmov during
the relax finalize pass.
* section.c (struct sec): Add need_finalize_relax and remove
flag11.
(STD_SECTION): Update struct sec initializer.
* bfd-in2.h: Regenerated.
include/
2003-04-28 H.J. Lu <hjl@gnu.org>
* bfdlink.h (bfd_link_info): Add relax_finalizing.
ld/
2003-04-28 H.J. Lu <hjl@gnu.org>
* ldlang.c (lang_process): Add the relax finalize pass.
* ldmain.c (main): Initialize link_info.relax_finalizing to
FALSE.
2003-04-29 01:53:45 +00:00
71853f09cc
Add support for h8300hn and h8300sn
2003-04-24 12:36:08 +00:00
480fa852f4
include/
...
* bfdlink.h (bfd_link_callbacks): Add error_handler.
ld/
* ldmain.c (link_callbacks): Initialize error_handler.
* ldmisc.c (error_handler): New function.
* ldmisc.h (error_handler): New prototype.
2003-04-24 01:43:33 +00:00
93749c21f1
bfd:
...
* archures.c (enum bfd_architecture): Amend comment to refer to SuperH.
* cpu-sh.c: Likewise.
* elf32-sh.c: Likewise.
* reloc.c (bfd_reloc_code_real): Likewise.
* elf32-sh64-com.c: Change comment to refer to SuperH.
* elf32-sh64.c: Likewise.
* elf64-sh64.c: Likewise.
* bfd-in2.h (enum bfd_architecture): Regenerate.
binutils:
* readelf.c (get_machine_name) <EM_SH>: Amend return value
to refer to SuperH.
gas:
* config/tc-sh.c: Amend comment to refer to SuperH.
* config/tc-sh.h: Likewise.
(LISTING_HEADER): Amend to refer to SuperH.
* config/tc-sh64.c: Change comment to refer to SuperH.
* config/tc-sh64.h (LISTING_HEADER): Change to refer to SuperH.
* doc/as.texinfo [SH, GENERIC]: Amend / Change to refer to SuperH.
* doc/c-sh.texi: Amend to refer to SuperH.
Add SuperH architecture documentation references.
* doc/c-sh64.texi: Change to refer to SuperH.
include/elf:
* common.h (EM_SH): Amend comment to refer to SuperH.
ld/testsuite:
* ld-sh/sh64/crange3-cmpct.rd (Machine): Change to refer to SuperH.
* ld-sh/sh64/crange3-media.rd (Machine): Likewise.
2003-04-23 21:09:04 +00:00
afef487c7d
Replace references to Mitsubishi M32R with references to Renesas M32R.
2003-04-22 16:21:18 +00:00
ded6339b7e
Replace occurrances of 'Hitachi' with 'Renesas'.
2003-04-15 08:51:53 +00:00
01620aa250
2003-04-07 Michael Snyder <msnyder@redhat.com>
...
* h8300.h (ldc/stc): Fix up src/dst swaps.
2003-04-13 16:50:31 +00:00
774d9e8282
* mips.h: Correct comment typo.
2003-04-09 00:12:24 +00:00
5557a0dace
Namespace cleanup for the tic4x target. Replace s/c4x/tic4x/ and s/c3x/tic3x/. 2003 copyright update
2003-04-04 08:15:15 +00:00
15fd016389
* xtensa-config.h: Remove comment indicating that this is a
...
generated file.
2003-04-02 16:55:26 +00:00
5340a2ed6d
Add Xtensa port
2003-04-01 15:50:31 +00:00
4663241541
Fixes for iWMMXt contribution.
2003-04-01 13:08:06 +00:00
82935b4237
Add iWMMXt support to ARM simulator
2003-03-27 17:13:33 +00:00
b2b9de805f
Add iWMMXt support
2003-03-25 20:56:01 +00:00
a13b67a6d6
* s390.h (s390_opcode_arch_val): Rename to s390_opcode_mode_val.
...
(S390_OPCODE_ESAME): Rename to S390_OPCODE_ZARCH.
(s390_opcode): Remove architecture. Add modes and min_cpu.
2003-03-21 13:26:21 +00:00
50b9d1a8f1
Add Cirrus Maverick support to arm simulator
2003-03-20 12:25:07 +00:00
259db89238
merge from gcc
2003-03-17 23:09:54 +00:00
db14b4abb7
merge from gcc
2003-03-17 18:01:05 +00:00
c745f853be
(O_SYS_CMDLINE): New pseudo opcode for command line processing.
2003-03-17 10:34:29 +00:00
401d0b9129
Remove redundant defintions of BYTES_IN_WORD and add conditional defintion in
...
aout64.h.
2003-03-06 16:45:42 +00:00
1def00e433
Fix sh-elf linker relaxation:
...
gcc:
* config/sh/sh.h (EXTRA_SPECS): Add subtarget_asm_relax_spec and
subtarget_asm_isa_spec.
(SUBTARGET_ASM_RELAX_SPEC, SUBTARGET_ASM_ISA_SPEC): Define.
(ASM_SPEC): Define as SH_ASM_SPEC.
(SH_ASM_SPEC): New; take the role of ASM_SPEC, but safe from svr4.h.
Use subtarget_asm_relax_spec and subtarget_asm_isa_spec.
* config/sh/elf.h (ASM_SPEC): Use SH_ASM_SPEC.
(SUBTARGET_ASM_ISA_SPEC): Undef / define.
gcc/testsuite:
gcc.dg/sh-relax.c: New test.
include/elf:
* sh.h (EF_SH_MERGE_MACH): Make sure SH2E & SH3/SH3E merge to SH3E,
and SH2E & SH4 merge to SH4, not SH2E.
gas:
* config/tc-sh.c (sh_dsp): Replace with preset_target_arch.
(md_begin): Use preset_target_arch.
(md_longopts): Make isa option unconditional.
(md_parse_option): Make OPTION_DSP and OPTION_ISA sh4 / any
set preset_target_arch.
(md_apply_fix3): If BFD_ASSEMBLER, adjust SWITCH_TABLE fixups
by -S_GET_VALUE (fixP->fx_subsy).
(tc_gen_reloc): For SWITCH_TABLE fixups, the symbol is fixp->fx_subsy,
and the addend is 0.
Adjust addend of R_SH_IND12W relocations by fixp->fx_offset - 4.
* config/tc-sh.h (TC_FORCE_RELOCATION_SUB_LOCAL): Define.
bfd:
elf32-sh.c (sh_elf_howto_tab): Make R_SH_IND12W into an ordinary
relocation (no special function), and make it non-partial_inplace.
(sh_elf_relax_section): When creating a bsr, use a consistent value
no matter if the symbol is extern or not; set addend to -4.
Don't swap load / non-load instructions for SH4.
(sh_elf_relax_delete_bytes): In R_SH_IND12W case, check the offset
rather than if the symbol is external to determine if adjusting the
offset makes sense. Adjust the addend too if appropriate.
(sh_elf_relocate_section): In R_SH_IND12W, don't fiddle with the
relocation.
2003-03-03 21:03:58 +00:00
f31d07a962
2003-02-27 Andrew Cagney <cagney@redhat.com>
...
* remote-sim.h (sim_open, sim_load, sim_create_inferior): Rename
_bfd to bfd.
2003-02-27 23:13:32 +00:00
7d82e7bf32
merge from gcc
2003-02-27 21:01:01 +00:00
d05ef21d4f
Add SHT_IA_64_LOPSREG, SHT_IA_64_HIPSREG and SHT_IA_64_PRIORITY_INIT.
...
Add code to display these values in readelf.
2003-02-21 12:17:51 +00:00
a55f9cd4fa
(ldmac, stmac): Replace MACREG with MS32 and MD32.
2003-02-21 11:36:59 +00:00
f8bcdf079f
merge from gcc
2003-02-21 01:35:25 +00:00
Corinna Vinschen