4f96c36336
2003-07-18 Michael Snyder <msnyder@redhat.com>
...
* include/opcode/h8sx.h (DO_MOVA1, DO_MOVA2): Reformatting.
2003-07-29 21:05:31 +00:00
e4bf124e03
2003-07-28 Eric Christopher <echristo@redhat.com>
...
* elf32-ppc.c (R_PPC_RELAX32): New relocation.
(ppc_elf_install_value): New function.
(ppc_elf_sort_rela): Remove.
(ppc_elf_relax_section): Rewrite. Remove old relaxation
and replace with out of range branch stubs.
(ppc_elf_relocate_section): Handle R_PPC_RELAX32.
2003-07-28 Eric Christopher <echristo@redhat.com>
* ppc.h (R_PPC_RELAX32): New. Fake relocation.
2003-07-29 06:42:51 +00:00
206ac17473
bfd/
...
2003-07-25 H.J. Lu <hongjiu.lu@intel.com>
* elf-bfd.h (bfd_elf_special_section): New.
(elf_backend_data): Add special_sections, a pointer to
bfd_elf_special_section.
(elf_section_type). New.
(elf_section_flags): New.
(_bfd_elf_get_sec_type_attr): New.
* elf.c (_bfd_elf_make_section_from_shdr): Always use the
real section type/flags.
(special_sections): New.
(get_special_section): New.
(_bfd_elf_get_sec_type_attr): New.
(_bfd_elf_new_section_hook): Check special_section to set
elf_section_type and elf_section_flags.
(elf_fake_sections): Don't use section name to set ELF section
data.
* elf32-m32r.c (m32r_elf_special_sections): New.
(elf_backend_special_sections): Defined.
* elf32-m68hc11.c (elf32_m68hc11_special_sections): New.
(elf_backend_special_sections): Defined.
* elf32-mcore.c (mcore_elf_special_sections): New.
(elf_backend_special_sections): Defined.
* elf32-ppc.c (ppc_elf_special_sections): New.
(elf_backend_special_sections): Defined.
* elf32-sh64.c (sh64_elf_special_sections): New.
(elf_backend_special_sections): Defined.
* elf32-v850.c (v850_elf_special_sections): New.
(elf_backend_special_sections): Defined.
* elf32-xtensa.c (elf_xtensa_special_sections): New.
(elf_backend_special_sections): Defined.
* elf64-alpha.c (elf64_alpha_special_sections): New.
(elf_backend_special_sections): Defined.
* elf64-hppa.c (elf64_hppa_special_sections): New.
(elf_backend_special_sections): Defined.
* elf64-ppc.c (ppc64_elf_special_sections): New.
(elf_backend_special_sections): Defined.
* elf64-sh64.c (sh64_elf64_special_sections): New.
(elf_backend_special_sections): Defined.
* elfxx-ia64.c (elfNN_ia64_special_sections): New.
(elf_backend_special_sections): Defined.
* elfxx-mips.c (_bfd_mips_elf_special_sections): New.
* elfxx-mips.h (_bfd_mips_elf_special_sections): New.
(elf_backend_special_sections): Defined.
* elfxx-target.h (elf_backend_special_sections): New. Default
to NULL.
(elfNN_bed): Initialize special_sections.
* section.c (bfd_abs_section): Remove const.
(bfd_und_section): Likewise.
(bfd_com_section): Likewise.
(bfd_ind_section): Likewise.
gas/
2003-07-25 H.J. Lu <hongjiu.lu@intel.com>
* config/obj-elf.c (special_sections): Removed.
(obj_elf_change_section): Call _bfd_elf_get_sec_type_attr. Set
elf_section_type and elf_section_flags.
(elf_frob_file): Set SHT_GROUP.
* config/obj-elf.h (obj_sec_set_private_data): New.
* config/tc-alpha.h (ELF_TC_SPECIAL_SECTIONS): Removed.
* config/tc-ia64.h: Likewise.
* config/tc-m32r.h: Likewise.
* config/tc-m68hc11.h: Likewise.
* config/tc-mcore.h: Likewise.
* config/tc-mips.h: Likewise.
* config/tc-ppc.h: Likewise.
* config/tc-sh64.h: Likewise.
* config/tc-v850.h: Likewise.
* config/tc-xtensa.h: Likewise.
* config/tc-v850.h (SHF_V850_GPREL): Removed.
(SHF_V850_EPREL): Likewise.
(SHF_V850_R0REL): Likewise.
* subsegs.c (subseg_get): Call obj_sec_set_private_data if it
is defined.
include/elf/
2003-07-25 H.J. Lu <hongjiu.lu@intel.com>
* v850.h (SHF_V850_GPREL): New.
(SHF_V850_EPREL): Likewise.
(SHF_V850_R0REL): Likewise.
2003-07-25 14:35:54 +00:00
19c6e1624b
(IMAGE_FILE_NET_RUN_FROM_SWAP): Define.
...
(IMAGE_FILE_MACHINE_WCEMIPSV2): Define.
(IMAGE_FILE_MACHINE_SH3DSP): Define.
(IMAGE_FILE_MACHINE_SH3E): Define.
(IMAGE_FILE_MACHINE_SH5): Define.
(IMAGE_FILE_MACHINE_AM33): Define.
(IMAGE_FILE_MACHINE_POWERPCFP): Define.
(IMAGE_FILE_MACHINE_AXP64): Define.
(IMAGE_FILE_MACHINE_TRICORE): Define.
(IMAGE_FILE_MACHINE_CEF): Define.
(IMAGE_FILE_MACHINE_EBC): Define.
(IMAGE_FILE_MACHINE_AMD64): Define.
(IMAGE_FILE_MACHINE_M32R): Define.
(IMAGE_FILE_MACHINE_CEE): Define.
2003-07-17 14:37:17 +00:00
f0dcabe35a
include/opcode/
...
* mips.h (CPU_RM7000): New macro.
(OPCODE_IS_MEMBER): Match CPU_RM7000 against 4650 insns.
bfd/
* archures.c (bfd_mach_mips7000): New.
* bfd-in2.h: Regenerated.
* cpu-mips.c (arch_info_struct): Add an entry for mips:7000.
* elfxx-mips.c (mips_set_isa_flags): Handle bfd_mach_mips7000.
(mips_mach_extensions): Add an entry for it.
opcodes/
* mips-dis.c (mips_arch_choices): Add rm7000 and rm9000 entries.
gas/
* config/tc-mips.c (hilo_interlocks): True for CPU_RM7000.
(mips_cpu_info_table): Add rm7000 and rm9000 entries.
gas/testsuite/
* gas/mips/rm7000.[sd]: New test.
* gas/mips/mips.exp: Run it.
2003-07-15 07:50:34 +00:00
7a90ec1ad1
2003-07-14 Christian Groessler <chris@groessler.org>
...
* i860.h (AOUTSZ): Define properly for i860 coff.
2003-07-15 01:15:08 +00:00
d53f60a1e4
* xtensa-config.h: Undef all macros before defining them.
2003-07-10 05:11:16 +00:00
2e04a3cc93
2001-05-16 Alexandre Oliva <aoliva@redhat.com>
...
* mn10300.h: Introduce GOTPC16, GOTOFF24, GOTOFF16 and
PLT16, and rename GOTPC to GOTPC32 and GOTOFF to GOTOFF32.
Renumbered all relocs.
2001-04-12 Alexandre Oliva <aoliva@redhat.com>
* mn10300.h (R_MN10300_GOTPC, R_MN10300_GOTOFF,
R_MN10300_PLT32, R_MN10300_GOT32, R_MN10300_GOT24,
R_MN10300_GOT16, R_MN10300_COPY, R_MN10300_GLOB_DAT,
R_MN10300_JMP_SLOT, R_MN10300_RELATIVE): New relocs.
2003-07-10 03:19:40 +00:00
7da2b670a4
2000-04-01 Alexandre Oliva <aoliva@cygnus.com>
...
* mn10300.h (AM33_2): Renamed from AM33.
2000-03-31 Alexandre Oliva <aoliva@cygnus.com>
* mn10300.h (AM332, FMT_D3): Defined.
(MN10300_OPERAND_FSREG, MN10300_OPERAND_FDREG): Likewise.
(MN10300_OPERAND_FPCR): Likewise.
2003-07-10 02:49:07 +00:00
791bd18069
2000-04-01 Alexandre Oliva <aoliva@cygnus.com>
...
* mn10300.h (E_MN10300_MACH_AM33_2): Renamed from
E_MN10300_MACH_AM332.
2000-03-31 Alexandre Oliva <aoliva@cygnus.com>
* mn10300.h (E_MN10300_MACH_AM332): Defined.
2003-07-10 02:49:00 +00:00
62568abba2
2003-07-06 H.J. Lu <hongjiu.lu@intel.com>
...
* demangle.h: Support C++.
2003-07-06 21:44:55 +00:00
d1ba63e143
merge from gcc
2003-07-01 21:17:41 +00:00
5ed85bb96e
* s390.h (s390_opcode_cpu_val): Add enum for cpu type z990.
2003-07-01 14:46:57 +00:00
591a16af6e
* s390.h (elf_s390_reloc_type): Add long displacement relocations
...
R_390_20, R_390_GOT20, R_390_GOTPLT20 and R_390_TLS_GOTIE20.
2003-07-01 14:46:26 +00:00
88112d1d65
merge from gcc
2003-07-01 01:12:46 +00:00
dcc3c258a9
* xtensa-config.h (XCHAL_HAVE_CONST16, XCHAL_HAVE_ABS,
...
XCHAL_HAVE_ADDX, XCHAL_HAVE_L32R): Define.
2003-06-30 21:56:32 +00:00
3fbdb70ec6
* xcoff.h (struct __rtinit ): Convert to ISO C90 prototypes.
...
* ecoff.h: Convert to ISO C90 prototypes. Replace PTR by void *.
2003-06-29 13:52:02 +00:00
0c03b46350
* mmix.h: Convert to ISO C90 prototypes.
...
* mips.h: Likewise.
* reloc-macros.h (START_RELOC_NUMBERS): Convert to ISO C90
prototype.
(RELOC_NUMBER): Remove !__STDC__ code.
2003-06-29 13:51:25 +00:00
a7a57ebcaf
include/opcode/
...
* h8300.h (IMM2_NS, IMM8_NS, IMM16_NS): Remove.
(IMM8U, IMM8U_NS): Define.
(h8_opcodes): Use IMM8U_NS for mov.[wl] #xx:8,@yy.
gas/
* config/tc-h8300.c (get_specific): Allow ':8' to be used for
unsigned 8-bit operands.
gas/testsuite/
* gas/h8300/h8sx_mov_imm.[sd]: Add tests for mov.[wl] #xx:8,@yy.
2003-06-25 15:31:57 +00:00
7eabbf53ff
* include/opcode/h8300.h (h8_opcodes): Fix the mov.l @(dd:32,ERs),ERd
...
and mov.l ERs,@(dd:32,ERd) entries.
2003-06-25 15:19:40 +00:00
3d1ebe9b19
Correct spelling of "relocatable".
2003-06-25 06:40:17 +00:00
203515ee13
gas/
...
2003-06-23 H.J. Lu <hongjiu.lu@intel.com>
* gas/config/tc-i386.c (md_assemble): Support Intel Precott New
Instructions.
* gas/config/tc-i386.h (CpuPNI): New.
(CpuUnknownFlags): Add CpuPNI.
gas/testsuite/
2003-06-23 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Add prescott.
* gas/i386/prescott.d: New file.
* gas/i386/prescott.s: Likewise.
include/opcode/
2003-06-23 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (i386_optab): Support Intel Precott New Instructions.
opcodes/
2003-06-23 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (PNI_Fixup): New. Fix up "mwait" and "monitor" in
Intel Precott New Instructions.
(PREGRP27): New. Added for "addsubpd" and "addsubps".
(PREGRP28): New. Added for "haddpd" and "haddps".
(PREGRP29): New. Added for "hsubpd" and "hsubps".
(PREGRP30): New. Added for "movsldup" and "movddup".
(PREGRP31): New. Added for "movshdup" and "movhpd".
(PREGRP32): New. Added for "lddqu".
(dis386_twobyte): Use PREGRP30 to replace the "movlpX" entry.
Use PREGRP31 to replace the "movhpX" entry. Use PREGRP28 for
entry 0x7c. Use PREGRP29 for entry 0x7d. Use PREGRP27 for
entry 0xd0. Use PREGRP32 for entry 0xf0.
(twobyte_has_modrm): Updated.
(twobyte_uses_SSE_prefix): Likewise.
(grps): Use PNI_Fixup in the "sidtQ" entry.
(prefix_user_table): Add PREGRP27, PREGRP28, PREGRP29, PREGRP30,
PREGRP31 and PREGRP32.
(float_mem): Use "fisttp{l||l|}" in entry 1 in opcode 0xdb.
Use "fisttpll" in entry 1 in opcode 0xdd.
Use "fisttp" in entry 1 in opcode 0xdf.
2003-06-23 20:15:33 +00:00
0f51128880
merge from gcc
2003-06-22 16:35:51 +00:00
0543b9a2c7
merge from gcc
2003-06-22 00:06:06 +00:00
a49a74108c
Fix typo.
2003-06-19 02:56:24 +00:00
c89701c687
merge from gcc
2003-06-17 16:31:07 +00:00
024e36bd8b
(GNU_ABI_TAG_NETBSD): New tag.
...
(GNU_ABI_TAG_FREEBSD): New tag.
2003-06-13 13:07:51 +00:00
dcbf037e2b
* gdb/fileio.h: New file.
2003-06-10 14:23:05 +00:00
68afda5334
Add "attn", "lq" and "stq" power4 insns.
2003-06-10 07:44:11 +00:00
531297a749
include/opcode/
...
* h8300.h (IMM4_NS, IMM8_NS): New.
(h8_opcodes): Replace IMM4 with IMM4_NS in mov.b and mov.w entries.
Likewise IMM8 for mov.w and mov.l. Likewise IMM16U for mov.l.
gas/testsuite
* gas/h8300/h8sx_mov_imm.[sd]: New test.
* gas/h8300/h8300.exp: Run it.
2003-06-10 07:33:46 +00:00
8e0c2ab200
include/elf/
...
* h8.h (E_H8_MACH_H8300SXN): New flag.
bfd/
* archures.c (bfd_mach_h8300sxn): New architecture.
* bfd-in2.h: Regenerate.
* cpu-h8300.c (h8300_scan): Check for 'sxn'.
(h8300sxn_info_struct): New.
(h8300sx_info_struct): Link to it.
* elf32-h8300.c (elf32_h8_mach): Add h8300sxn case.
(elf32_h8_final_write_processing): Likewise.
gas/
* config/tc-h8300.c (h8300sxnmode): New.
(md_pseudo_table): Add .h8300sxn entry. Sync others with FSF version.
ld/
* configure.tgt (h8300*): Add h8300sxn emulations.
* Makefile.am (ALL_EMULATIONS): Add eh8300sxn.o and eh8300sxnelf.o.
(eh8300sxn.c, eh8300sxnelf.c): New rules.
* Makefile.in: Regenerate.
* emulparams/h8300sxnelf.sh, emulparams/h8300sxn.sh: New files.
2003-06-10 07:09:28 +00:00
2ec27e1180
2003-06-03 Michael Snyder <msnyder@redhat.com>
...
* h8sx.h (enum h8_model): Add AV_H8S to distinguish from H8H.
(ldc): Split ccr ops from exr ops (which are only available
on H8S or H8SX).
(stc): Ditto.
(andc, orc, xorc): Ditto.
(ldmac, stmac, clrmac, mac): Change access to AV_H8S.
2003-06-05 18:47:12 +00:00
2aea7f3e47
binutils/
...
* readelf.c (get_segment_type): Handle PT_GNU_STACK.
bfd/
* elf.c (_bfd_elf_print_private_bfd_data): Handle PT_GNU_STACK.
(bfd_section_from_phdr): Likewise.
(map_sections_to_segments): Create PT_GNU_STACK segment header.
(get_program_header_size): Count with PT_GNU_STACK.
* elf-bfd.h (struct elf_obj_tdata): Add stack_flags.
* elflink.h (bfd_elfNN_size_dynamic_sections): Set stack_flags.
include/
* bfdlink.h (struct bfd_link_info): Add execstack and noexecstack.
* elf/common.h (PT_GNU_STACK): Define.
ld/
* ldgram.y (phdr_type): Grok PT_GNU_STACK.
* emultempl/elf32.em (gld${EMULATION_NAME}_handle_option): Add
-z execstack and -z noexecstack.
(gld${EMULATION_NAME}_list_options): Likewise.
* scripttempl/elf.sc: If not -r, discard .note.GNU-stack section.
2003-06-03 22:27:23 +00:00
ba64818d65
2003-06-03 Michael Snyder <msnyder@redhat.com>
...
and Bernd Schmidt <bernds@redhat.com>
and Alexandre Oliva <aoliva@redhat.com>
* h8300.h: Add support for h8300sx instruction set.
2003-06-03 21:23:21 +00:00
15824b7c54
bfd/
...
2003-06-03 H.J. Lu <hongjiu.lu@intel.com>
* elflink.h (elf_link_input_bfd): Call linker error_handler
for discarded definitions.
include/
2003-06-03 H.J. Lu <hongjiu.lu@intel.com>
* bfdlink.h (LD_DEFINITION_IN_DISCARDED_SECTION): New.
ld/
2003-06-03 H.J. Lu <hongjiu.lu@intel.com>
* ldmisc.c: Include "bfdlink.h".
(error_handler): Handle LD_DEFINITION_IN_DISCARDED_SECTION
and -LD_DEFINITION_IN_DISCARDED_SECTION.
* Makefile.am: Rebuild dependency.
* Makefile.in: Regenerated.
ld/testsuite/
2003-06-03 H.J. Lu <hongjiu.lu@intel.com>
* ld-discard/extern.d: Updated.
* ld-discard/start.d: Likewise.
* ld-discard/static.d: Likewise.
2003-06-03 18:15:03 +00:00
283857c8db
Add pc-relative 32-bit reloc to v850 port. Fixes ld-elf/merge test failure.
2003-06-03 16:24:03 +00:00
ad767835c9
bfd/
...
* elflink.h (elf_link_add_object_symbols): Use !info->executable
instead of info->shared where appropriate.
(bfd_elfNN_size_dynamic_sections, elf_link_output_extsym): Likewise.
* elflink.c (_bfd_elf_create_got_section): Likewise.
(_bfd_elf_link_create_dynamic_sections): Likewise.
(_bfd_elf_link_assign_sym_version): Likewise.
* elf32-i386.c (elf_i386_size_dynamic_sections): Create .interp section
and DT_DEBUG dynamic tag even for position independent executables.
* elf32-ppc.c (ppc_elf_size_dynamic_sections): Likewise.
* elf32-s390.c (elf_s390_size_dynamic_sections: Likewise.
* elf64-ppc.c (ppc64_elf_size_dynamic_sections: Likewise.
* elf64-s390.c (elf_s390_size_dynamic_sections: Likewise.
* elf64-x86-64.c (elf64_x86_64_size_dynamic_sections: Likewise.
* elfxx-ia64.c (elfNN_ia64_size_dynamic_sections: Likewise.
* elf32-sparc.c (elf32_sparc_size_dynamic_sections: Likewise.
* elf64-alpha.c (elf64_alpha_size_dynamic_sections: Likewise.
* elf64-sparc.c (sparc64_elf_size_dynamic_sections: Likewise.
include/
* bfdlink.h (struct bfd_link_info): Add pie and executable
bits.
ld/
* lexsup.c (OPTION_PIE): Define.
(ld_options): Add -pie and --pic-executable options.
(parse_args): Handle OPTION_PIE.
* ldmain.c (main): Initialize link_info.pie and
link_info.executable.
* genscripts.sh: Generate PIE scripts.
* ld.texinfo: Document -pie and --pic-executable options.
* emultempl/elf32.em (gld${EMULATION_NAME}_after_open):
(gld${EMULATION_NAME}_place_orphan): Likewise.
(gld${EMULATION_NAME}_get_script): Include PIE scripts.
* scripttempl/elf.sc: In PIE scripts set . the same way as in
shared scripts.
* emulparams/elf_i386.sh (GENERATE_PIE_SCRIPT): Set to yes.
* emulparams/elf64_ia64.sh (GENERATE_PIE_SCRIPT): Likewise.
* emulparams/elf32ppc.sh (GENERATE_PIE_SCRIPT): Likewise.
* emulparams/elf64ppc.sh (GENERATE_PIE_SCRIPT): Likewise.
* emulparams/elf_x86_64.sh (GENERATE_PIE_SCRIPT): Likewise.
* emulparams/elf_s390.sh (GENERATE_PIE_SCRIPT): Likewise.
* emulparams/elf32_sparc.sh (GENERATE_PIE_SCRIPT): Likewise.
* emulparams/elf64_sparc.sh (GENERATE_PIE_SCRIPT): Likewise.
* emulparams/elf64alpha.sh (GENERATE_PIE_SCRIPT): Likewise.
* emulparams/elf64_s390.sh (GENERATE_PIE_SCRIPT): Likewise.
* emulparams/elf_i386.sh (GENERATE_PIE_SCRIPT): Likewise.
2003-05-30 15:50:11 +00:00
a82fd8b94e
2003-05-23 Jason Eckhardt <jle@rice.edu>
...
gas:
* config/tc-i860.c (target_xp): Declare variable.
(OPTION_XP): Declare macro.
(md_longopts): Add option -mxp.
(md_parse_option): Set target_xp.
(md_show_usage): Add -mxp usage.
(i860_process_insn): Recognize XP registers bear, ccr, p0-p3.
(md_assemble): Don't try expansions if XP_ONLY is set.
* doc/c-i860.texi: Document -mxp option.
gas/testsuite:
* gas/i860/xp.s: New file.
* gas/i860/xp.d: New file.
include/opcode:
* i860.h (expand_type): Add XP_ONLY.
(scyc.b): New XP instruction.
(ldio.l): Likewise.
(ldio.s): Likewise.
(ldio.b): Likewise.
(ldint.l): Likewise.
(ldint.s): Likewise.
(ldint.b): Likewise.
(stio.l): Likewise.
(stio.s): Likewise.
(stio.b): Likewise.
(pfld.q): Likewise.
opcodes:
* i860-dis.c (crnames): Add bear, ccr, p0, p1, p2, p3.
(print_insn_i860): Grab 4 bits of the control register field
instead of 3.
2003-05-24 04:22:23 +00:00
40aa85f9c5
Fix typo "ink" instead of "link"
2003-05-21 09:09:37 +00:00
3a9c82d011
2003-05-20 Jason Eckhardt <jle@rice.edu>
...
opcode/i860.h (flush): Set lower 3 bits properly and use 'L'
for the immediate operand type instead of 'i'.
2003-05-21 05:06:49 +00:00
4c394c394e
2003-05-20 Jason Eckhardt <jle@rice.edu>
...
opcode/i860.h (fzchks): Both S and R bits must be set.
(pfzchks): Likewise.
(faddp): Likewise.
(pfaddp): Likewise.
(fix.ss): Remove (invalid instruction).
(pfix.ss): Likewise.
(ftrunc.ss): Likewise.
(pftrunc.ss): Likewise.
2003-05-21 02:06:40 +00:00
b0f5999383
.
2003-05-21 00:55:28 +00:00
98e6de0772
2003-05-15 Roland McGrath <roland@redhat.com>
...
* common.h (NT_AUXV, AT_*): New macros.
* external.h (Elf32_External_Auxv, Elf64_External_Auxv): New types.
* internal.h (Elf_Internal_Auxv): New type.
2003-05-21 00:55:15 +00:00
de54768d72
2003-05-18 Jason Eckhardt <jle@rice.edu>
...
gas:
* config/tc-i860.c (i860_process_insn): Initialize fc after
each opcode mismatch.
include/opcode:
* i860.h (form, pform): Add missing .dd suffix.
opcodes:
* i860-dis.c (print_insn_i860): Instruction shrd has a dual bit,
print it.
bfd:
* elf32-i860.c (elf32_i860_relocate_highadj): Simplify calculation.
2003-05-18 21:24:32 +00:00
9cf346e11a
2003-05-14 Michael Snyder <msnyder@redhat.com>
...
From Bernd Schmidt <bernds@redhat.com>
* h8.h (E_H8_MACH_H8300SX): New.
2003-05-16 23:40:08 +00:00
ac5e8cb29c
libiberty/ChangeLog:
...
2003-05-14 Jim Blandy <jimb@redhat.com>
* hex.c (_hex_value): Make this unsigned.
(hex_value): Update documentation for new return type. hex_value
now expands to an unsigned int expression, to avoid unexpected
sign extension when we store it in a bfd_vma, which is larger than
int on some platforms.
* functions.texi: Regenerated.
include/ChangeLog:
2003-05-14 Jim Blandy <jimb@redhat.com>
* libiberty.h (hex_value): Make the value an unsigned int, to
avoid unexpected sign-extension when cast to unsigned types larger
than int --- like bfd_vma, on some platforms.
(_hex_value): Update declaration.
2003-05-15 19:08:25 +00:00
e655bfb1c0
* m68hc11.h (M68HC12_BANK_VIRT): Define to 0x010000
2003-05-13 19:28:14 +00:00
8bdd7abed5
* xtensa-isa-internal.h (xtensa_isa_module_struct): Remove const on
...
gen_num_opcodes_fn return type.
2003-05-09 11:36:09 +00:00
964e8f75bd
s/burtle/iterative
2003-05-07 20:30:13 +00:00
4c8abaa353
Index: gdb/ChangeLog
...
2003-05-07 Andrew Cagney <cagney@redhat.com>
* d10v-tdep.c (remote_d10v_translate_xfer_address): Add
"regcache".
(d10v_print_registers_info): Update.
(d10v_dmap_register, d10v_imap_register): Delete functions.
(struct gdbarch_tdep): Add "regcache" parameter to "dmap_register"
and "imap_register".
(d10v_ts2_dmap_register, d10v_ts2_imap_register): Add "regcache".
(d10v_ts3_dmap_register, d10v_ts3_imap_register): Add "regcache".
* arch-utils.c (generic_remote_translate_xfer_address): Add
"regcache" and "gdbarch" parameters.
* gdbarch.sh (REMOTE_TRANSLATE_XFER_ADDRESS): Add "regcache"
parameter. Change class to multi-arch.
* gdbarch.h, gdbarch.c: Re-generate.
* remote.c (remote_xfer_memory): Use
gdbarch_remote_translate_xfer_address.
Index: include/gdb/ChangeLog
2003-05-07 Andrew Cagney <cagney@redhat.com>
* sim-d10v.h (sim_d10v_translate_addr): Add regcache parameter.
(sim_d10v_translate_imap_addr): Add regcache parameter.
(sim_d10v_translate_dmap_addr): Ditto.
Index: sim/d10v/ChangeLog
2003-05-07 Andrew Cagney <cagney@redhat.com>
* interp.c (sim_d10v_translate_addr): Add "regcache" parameter.
(sim_d10v_translate_imap_addr): Ditto.
(sim_d10v_translate_dmap_addr): Ditto.
(xfer_mem): Pass NULL regcache to sim_d10v_translate_addr.
(dmem_addr): Pass NULL regcache to sim_d10v_translate_dmap_addr.
(dmap_register, imap_register): Add "regcache" parameter.
(imem_addr): Pass NULL regcache to sim_d10v_translate_imap_addr.
(sim_fetch_register): Pass NULL regcache to imap_register and
dmap_register.
2003-05-07 19:21:13 +00:00
Michael Snyder