2004-06-14 Chris Demetriou <cgd@broadcom.com>
* elf32-mips.c (elf_mips_gnu_pcrel32): Add (undoing 2004-04-24
removal) with updated comment.
(bfd_elf32_bfd_reloc_type_lookup): Add back case for
BFD_RELOC_32_PCREL.
(mips_elf32_rtype_to_howto): Add back case for R_MIPS_PC32.
* elfxx-mips.c (mips_elf_calculate_relocation): Likewise.
[ include/elf/ChangeLog ]
2004-06-14 Chris Demetriou <cgd@broadcom.com>
* mips.h (R_MIPS_PC32): Add back (undoing removal on 2004-04-24),
with an updated comment.
bfd:
* Makefile.am: Regenerate dependencies.
* Makefile.in: Regenerate.
* archures.c: Add bfd_mach_sh3_nommu .
* bfd-in2.h: Regenerate.
* cpu-sh.c: Add sh3-nommu architecture.
(bfd_to_arch_table): Create new table.
(sh_get_arch_from_bfd_mach): Create new function.
(sh_get_arch_up_from_bfd_mach): Create new function.
(sh_merge_bfd_arch): Create new function.
* elf32-sh.c (sh_ef_bfd_table): Add table.
(sh_elf_check_relocs): Replace switch statement with
use of sh_ef_bfd_table .
(sh_elf_get_flags_from_mach): Add new function.
(sh_find_elf_flags): Likewise.
(sh_elf_copy_private_data): Replace most of non-elf contents
with a call to sh_merge_bfd_arch() .
gas:
* Makefile.am: Regenerate dependecies.
* Makefile.in: Regenerate.
* config/tc-sh.c (valid_arch): Make unsigned.
(preset_target_arch): Likewise.
(md_begin): Use new architecture flags system.
(get_specific): Likewise.
(assemble_ppi): Likewise.
(md_assemble): Likewise. Also fix error check for bad opcodes.
(md_parse_option): Likewise. Also generate -isa values according
to the table in bfd/cpu-sh.c instead of just constants. Also
allow <arch>-up ISA variants.
(sh_elf_final_processing): Replace if-else chain with a call to
sh_find_elf_flags().
* testsuite/gas/sh/arch: New directory.
* testsuite/gas/sh/arch/arch.exp: New test script.
* testsuite/gas/sh/arch/arch_expected.txt: New file.
* testsuite/gas/sh/arch/sh.s: New file.
* testsuite/gas/sh/arch/sh2.s: New file.
* testsuite/gas/sh/arch/sh-dsp.s: New file.
* testsuite/gas/sh/arch/sh2e.s: New file.
* testsuite/gas/sh/arch/sh3-nommu.s: New file.
* testsuite/gas/sh/arch/sh3.s: New file.
* testsuite/gas/sh/arch/sh3-dsp.s: New file.
* testsuite/gas/sh/arch/sh3e.s: New file.
* testsuite/gas/sh/arch/sh4-nommu-nofpu.s: New file.
* testsuite/gas/sh/arch/sh4-nofpu.s: New file.
* testsuite/gas/sh/arch/sh4.s: New file.
* testsuite/gas/sh/arch/sh4a-nofpu.s: New file.
* testsuite/gas/sh/arch/sh4al-dsp.s: New file.
* testsuite/gas/sh/arch/sh4a.s: New file.
include/elf:
* sh.h (EF_SH_HAS_DSP): Remove.
(EF_SH_HAS_FP): Remove.
(EF_SH_MERGE_MACH): Remove.
(EF_SH4_NOFPU): Convert to decimal.
(EF_SH4A_NOFPU): Likewise.
(EF_SH4_NOMMU_NOFPU): Likewise.
(EF_SH3_NOMMU): Add new macro.
(EF_SH_BFD_TABLE): Likewise.
(sh_find_elf_flags): Add prototype.
(sh_elf_get_flags_from_mach): Likewise.
opcodes:
* sh-dis.c (target_arch): Make unsigned.
(print_insn_sh): Replace (most of) switch with a call to
sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
* sh-opc.h: Redefine architecture flags values.
Add sh3-nommu architecture.
Reorganise <arch>_up macros so they make more visual sense.
(SH_MERGE_ARCH_SET): Define new macro.
(SH_VALID_BASE_ARCH_SET): Likewise.
(SH_VALID_MMU_ARCH_SET): Likewise.
(SH_VALID_CO_ARCH_SET): Likewise.
(SH_VALID_ARCH_SET): Likewise.
(SH_MERGE_ARCH_SET_VALID): Likewise.
(SH_ARCH_SET_HAS_FPU): Likewise.
(SH_ARCH_SET_HAS_DSP): Likewise.
(SH_ARCH_UNKNOWN_ARCH): Likewise.
(sh_get_arch_from_bfd_mach): Add prototype.
(sh_get_arch_up_from_bfd_mach): Likewise.
(sh_get_bfd_mach_from_arch_set): Likewise.
(sh_merge_bfd_arc): Likewise.
ld:
* testsuite/ld-sh/arch/arch.exp: New test script.
* testsuite/ld-sh/arch/arch_expected.txt: New file.
* testsuite/ld-sh/arch/sh.s: New file.
* testsuite/ld-sh/arch/sh2.s: New file.
* testsuite/ld-sh/arch/sh-dsp.s: New file.
* testsuite/ld-sh/arch/sh2e.s: New file.
* testsuite/ld-sh/arch/sh3-nommu.s: New file.
* testsuite/ld-sh/arch/sh3.s: New file.
* testsuite/ld-sh/arch/sh3-dsp.s: New file.
* testsuite/ld-sh/arch/sh3e.s: New file.
* testsuite/ld-sh/arch/sh4-nommu-nofpu.s: New file.
* testsuite/ld-sh/arch/sh4-nofpu.s: New file.
* testsuite/ld-sh/arch/sh4.s: New file.
* testsuite/ld-sh/arch/sh4a-nofpu.s: New file.
* testsuite/ld-sh/arch/sh4al-dsp.s: New file.
* testsuite/ld-sh/arch/sh4a.s: New file.
2004-04-23 Chris Demetriou <cgd@broadcom.com>
* coff-mips.c (mips_relhi_reloc, mips_rello_reloc)
(mips_switch_reloc, mips_read_relocs, mips_relax_section)
(mips_relax_pcrel16, PCREL16_EXPANSION_ADJUSTMENT): Remove.
(mips_relocate_hi): Remove now-unused 'adjust' and 'pcrel' arguments,
and update comments to reflect current usage.
(mips_howto_table): Remove entries for MIPS_R_RELHI, MIPS_R_RELLO,
and MIPS_R_SWITCH, as well as several empty entries. Update comment
for MIPS_R_PCREL16.
(mips_ecoff_swap_reloc_in, mips_ecoff_swap_reloc_out)
(mips_adjust_reloc_out, mips_bfd_reloc_type_lookup): Remove support
for MIPS_R_SWITCH, MIPS_R_RELLO, and MIPS_R_RELHI relocations.
(mips_adjust_reloc_in): Likewise, adjust maximum accepted relocation
type number to be MIPS_R_PCREL16.
(mips_relocate_section): Remove support for link-time relaxation
of branches used by embedded-PIC. Remove support for MIPS_R_SWITCH,
MIPS_R_RELLO, and MIPS_R_RELHI relocations.
(_bfd_ecoff_bfd_relax_section): Redefine to bfd_generic_relax_section.
* ecoff.c (ecoff_indirect_link_order): Remove support for link-time
relaxation of branches used by embedded-PIC.
* ecofflink.c (bfd_ecoff_debug_accumulate): Likewise.
* libecoff.h (struct ecoff_section_tdata): Remove embedded-PIC
related members, update comment.
* pe-mips.c: Remove disabled (commented-out and #if 0'd)
code related to embedded-PIC.
* elfxx-mips.c (_bfd_mips_elf_read_ecoff_info): Remove
initialization of now-removed 'adjust' member of
'struct ecoff_debug_info'.
[ include/coff/ChangeLog ]
2004-04-23 Chris Demetriou <cgd@broadcom.com>
* mips.h (MIPS_R_RELHI, MIPS_R_RELLO, MIPS_R_SWITCH): Remove
(MIPS_R_PCREL16): Update comment.
* ecoff.h (struct ecoff_value_adjust): Remove structure.
(struct ecoff_debug_info): Remove 'adjust' member.
(INVLPG_Fixup): New function.
(PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
* opcode/i386.h (i386_optab): Remove CpuNo64 from sysenter and
sysexit.
opcodes:
* sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
* sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
accordingly.
bfd:
* archures.c: Add bfd_mach_sh4_nommu_nofpu.
* cpu-sh.c: Ditto.
* elf32-sh.c: Ditto.
* bfd-in2.h: Regenerate.
include/elf:
* sh.h: Add EF_SH4_NOMMU_NOFPU.
gas:
* config/tc-sh.c (md_parse_option): Add -isa=sh4-nofpu and
-isa=sh4-nommu-nofpu options. Adjust help messages accordingly.
(sh_elf_final_processing): Output BFD type sh4_nofpu if that is
the most general type or the user specifically requested it.
(md_assemble): Add a new error message for when an instruction
is understood, but is not allowed due to an -isa option.
2003-12-04 H.J. Lu <hongjiu.lu@intel.com>
* elfxx-ia64.c (elfNN_ia64_relax_section): Use the
need_relax_finalize field in link_info instead of
relax_finalizing to check if the relax finalize pass is being
done.
include/
2003-12-04 H.J. Lu <hongjiu.lu@intel.com>
* bfdlink.h (bfd_link_info): Change relax_finalizing to
need_relax_finalize.
ld/
2003-12-04 H.J. Lu <hongjiu.lu@intel.com>
* emultempl/ia64elf.em (gld${EMULATION_NAME}_after_parse): Set
link_info.need_relax_finalize to TRUE.
* ldlang.c (lang_process): Use link_info.need_relax_finalize
instead of link_info.relax_finalizing.
* ldmain.c (main): Likewise.
