383 lines
11 KiB
ArmAsm
383 lines
11 KiB
ArmAsm
/* Copyright (c) 2010-2011, Linaro Limited
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions
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are met:
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* Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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* Neither the name of Linaro Limited nor the names of its
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contributors may be used to endorse or promote products derived
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from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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Written by Dave Gilbert <david.gilbert@linaro.org>
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This memchr routine is optimised on a Cortex-A9 and should work on
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all ARMv7 processors. It has a fast path for short sizes, and has
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an optimised path for large data sets; the worst case is finding the
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match early in a large data set. */
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/* Copyright (c) 2015 ARM Ltd.
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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* Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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* Neither the name of the Linaro nor the
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names of its contributors may be used to endorse or promote products
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derived from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
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@ 2011-02-07 david.gilbert@linaro.org
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@ Extracted from local git a5b438d861
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@ 2011-07-14 david.gilbert@linaro.org
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@ Import endianness fix from local git ea786f1b
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@ 2011-10-11 david.gilbert@linaro.org
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@ Import from cortex-strings bzr rev 63
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@ Flip to ldrd (as suggested by Greta Yorsh)
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@ Make conditional on CPU type
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@ tidy
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@ This code requires armv6t2 or later. Uses Thumb2.
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.syntax unified
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#include "acle-compat.h"
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@ NOTE: This ifdef MUST match the one in memchr-stub.c
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#if defined (__ARM_NEON__) || defined (__ARM_NEON)
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.arch armv7-a
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.fpu neon
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/* Arguments */
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#define srcin r0
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#define chrin r1
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#define cntin r2
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/* Retval */
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#define result r0 /* Live range does not overlap with srcin */
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/* Working registers */
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#define src r1 /* Live range does not overlap with chrin */
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#define tmp r3
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#define synd r0 /* No overlap with srcin or result */
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#define soff r12
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/* Working NEON registers */
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#define vrepchr q0
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#define vdata0 q1
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#define vdata0_0 d2 /* Lower half of vdata0 */
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#define vdata0_1 d3 /* Upper half of vdata0 */
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#define vdata1 q2
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#define vdata1_0 d4 /* Lower half of vhas_chr0 */
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#define vdata1_1 d5 /* Upper half of vhas_chr0 */
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#define vrepmask q3
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#define vrepmask0 d6
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#define vrepmask1 d7
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#define vend q4
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#define vend0 d8
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#define vend1 d9
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/*
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* Core algorithm:
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*
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* For each 32-byte chunk we calculate a 32-bit syndrome value, with one bit per
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* byte. Each bit is set if the relevant byte matched the requested character
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* and cleared otherwise. Since the bits in the syndrome reflect exactly the
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* order in which things occur in the original string, counting trailing zeros
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* allows to identify exactly which byte has matched.
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*/
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.text
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.thumb_func
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.align 4
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.p2align 4,,15
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.global memchr
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.type memchr,%function
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memchr:
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.cfi_sections .debug_frame
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.cfi_startproc
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/* Use a simple loop if there are less than 8 bytes to search. */
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cmp cntin, #7
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bhi .Llargestr
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and chrin, chrin, #0xff
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.Lsmallstr:
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subs cntin, cntin, #1
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blo .Lnotfound /* Return not found if reached end. */
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ldrb tmp, [srcin], #1
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cmp tmp, chrin
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bne .Lsmallstr /* Loop again if not found. */
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/* Otherwise fixup address and return. */
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sub result, result, #1
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bx lr
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.Llargestr:
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vdup.8 vrepchr, chrin /* Duplicate char across all lanes. */
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/*
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* Magic constant 0x8040201008040201 allows us to identify which lane
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* matches the requested byte.
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*/
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movw tmp, #0x0201
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movt tmp, #0x0804
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lsl soff, tmp, #4
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vmov vrepmask0, tmp, soff
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vmov vrepmask1, tmp, soff
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/* Work with aligned 32-byte chunks */
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bic src, srcin, #31
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ands soff, srcin, #31
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beq .Lloopintro /* Go straight to main loop if it's aligned. */
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/*
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* Input string is not 32-byte aligned. We calculate the syndrome
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* value for the aligned 32 bytes block containing the first bytes
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* and mask the irrelevant part.
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*/
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vld1.8 {vdata0, vdata1}, [src:256]!
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sub tmp, soff, #32
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adds cntin, cntin, tmp
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vceq.i8 vdata0, vdata0, vrepchr
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vceq.i8 vdata1, vdata1, vrepchr
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vand vdata0, vdata0, vrepmask
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vand vdata1, vdata1, vrepmask
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vpadd.i8 vdata0_0, vdata0_0, vdata0_1
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vpadd.i8 vdata1_0, vdata1_0, vdata1_1
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vpadd.i8 vdata0_0, vdata0_0, vdata1_0
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vpadd.i8 vdata0_0, vdata0_0, vdata0_0
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vmov synd, vdata0_0[0]
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/* Clear the soff lower bits */
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lsr synd, synd, soff
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lsl synd, synd, soff
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/* The first block can also be the last */
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bls .Lmasklast
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/* Have we found something already? */
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cbnz synd, .Ltail
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.Lloopintro:
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vpush {vend}
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/* 264/265 correspond to d8/d9 for q4 */
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.cfi_adjust_cfa_offset 16
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.cfi_rel_offset 264, 0
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.cfi_rel_offset 265, 8
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.p2align 3,,7
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.Lloop:
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vld1.8 {vdata0, vdata1}, [src:256]!
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subs cntin, cntin, #32
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vceq.i8 vdata0, vdata0, vrepchr
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vceq.i8 vdata1, vdata1, vrepchr
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/* If we're out of data we finish regardless of the result. */
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bls .Lend
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/* Use a fast check for the termination condition. */
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vorr vend, vdata0, vdata1
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vorr vend0, vend0, vend1
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vmov synd, tmp, vend0
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orrs synd, synd, tmp
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/* We're not out of data, loop if we haven't found the character. */
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beq .Lloop
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.Lend:
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vpop {vend}
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.cfi_adjust_cfa_offset -16
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.cfi_restore 264
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.cfi_restore 265
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/* Termination condition found, let's calculate the syndrome value. */
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vand vdata0, vdata0, vrepmask
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vand vdata1, vdata1, vrepmask
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vpadd.i8 vdata0_0, vdata0_0, vdata0_1
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vpadd.i8 vdata1_0, vdata1_0, vdata1_1
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vpadd.i8 vdata0_0, vdata0_0, vdata1_0
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vpadd.i8 vdata0_0, vdata0_0, vdata0_0
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vmov synd, vdata0_0[0]
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cbz synd, .Lnotfound
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bhi .Ltail
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.Lmasklast:
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/* Clear the (-cntin) upper bits to avoid out-of-bounds matches. */
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neg cntin, cntin
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lsl synd, synd, cntin
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lsrs synd, synd, cntin
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it eq
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moveq src, #0 /* If no match, set src to 0 so the retval is 0. */
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.Ltail:
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/* Count the trailing zeros using bit reversing */
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rbit synd, synd
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/* Compensate the last post-increment */
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sub src, src, #32
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/* Count the leading zeros */
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clz synd, synd
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/* Compute the potential result and return */
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add result, src, synd
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bx lr
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.Lnotfound:
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/* Set result to NULL if not found and return */
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mov result, #0
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bx lr
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.cfi_endproc
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.size memchr, . - memchr
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#elif __ARM_ARCH_ISA_THUMB >= 2 && defined (__ARM_FEATURE_DSP)
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#if __ARM_ARCH_PROFILE == 'M'
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.arch armv7e-m
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#else
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.arch armv6t2
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#endif
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@ this lets us check a flag in a 00/ff byte easily in either endianness
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#ifdef __ARMEB__
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#define CHARTSTMASK(c) 1<<(31-(c*8))
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#else
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#define CHARTSTMASK(c) 1<<(c*8)
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#endif
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.text
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.thumb
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@ ---------------------------------------------------------------------------
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.thumb_func
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.align 2
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.p2align 4,,15
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.global memchr
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.type memchr,%function
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memchr:
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@ r0 = start of memory to scan
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@ r1 = character to look for
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@ r2 = length
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@ returns r0 = pointer to character or NULL if not found
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and r1,r1,#0xff @ Don't trust the caller to pass a char
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cmp r2,#16 @ If short don't bother with anything clever
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blt 20f
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tst r0, #7 @ If it's already aligned skip the next bit
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beq 10f
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@ Work up to an aligned point
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5:
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ldrb r3, [r0],#1
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subs r2, r2, #1
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cmp r3, r1
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beq 50f @ If it matches exit found
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tst r0, #7
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cbz r2, 40f @ If we run off the end, exit not found
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bne 5b @ If not aligned yet then do next byte
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10:
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@ We are aligned, we know we have at least 8 bytes to work with
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push {r4,r5,r6,r7}
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orr r1, r1, r1, lsl #8 @ expand the match word across all bytes
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orr r1, r1, r1, lsl #16
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bic r4, r2, #7 @ Number of double words to work with * 8
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mvns r7, #0 @ all F's
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movs r3, #0
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15:
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ldrd r5,r6,[r0],#8
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subs r4, r4, #8
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eor r5,r5, r1 @ r5,r6 have 00's where bytes match the target
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eor r6,r6, r1
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uadd8 r5, r5, r7 @ Par add 0xff - sets GE bits for bytes!=0
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sel r5, r3, r7 @ bytes are 00 for none-00 bytes,
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@ or ff for 00 bytes - NOTE INVERSION
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uadd8 r6, r6, r7 @ Par add 0xff - sets GE bits for bytes!=0
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sel r6, r5, r7 @ chained....bytes are 00 for none-00 bytes
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@ or ff for 00 bytes - NOTE INVERSION
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cbnz r6, 60f
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bne 15b @ (Flags from the subs above)
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pop {r4,r5,r6,r7}
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and r1,r1,#0xff @ r1 back to a single character
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and r2,r2,#7 @ Leave the count remaining as the number
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@ after the double words have been done
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20:
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cbz r2, 40f @ 0 length or hit the end already then not found
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21: @ Post aligned section, or just a short call
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ldrb r3,[r0],#1
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subs r2,r2,#1
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eor r3,r3,r1 @ r3 = 0 if match - doesn't break flags from sub
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cbz r3, 50f
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bne 21b @ on r2 flags
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40:
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movs r0,#0 @ not found
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bx lr
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50:
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subs r0,r0,#1 @ found
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bx lr
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60: @ We're here because the fast path found a hit
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@ now we have to track down exactly which word it was
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@ r0 points to the start of the double word after the one tested
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@ r5 has the 00/ff pattern for the first word, r6 has the chained value
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cmp r5, #0
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itte eq
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moveq r5, r6 @ the end is in the 2nd word
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subeq r0,r0,#3 @ Points to 2nd byte of 2nd word
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subne r0,r0,#7 @ or 2nd byte of 1st word
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@ r0 currently points to the 2nd byte of the word containing the hit
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tst r5, # CHARTSTMASK(0) @ 1st character
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bne 61f
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adds r0,r0,#1
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tst r5, # CHARTSTMASK(1) @ 2nd character
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ittt eq
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addeq r0,r0,#1
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tsteq r5, # (3<<15) @ 2nd & 3rd character
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@ If not the 3rd must be the last one
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addeq r0,r0,#1
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61:
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pop {r4,r5,r6,r7}
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subs r0,r0,#1
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bx lr
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#else
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/* Defined in memchr-stub.c. */
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#endif
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