166 lines
4.1 KiB
ArmAsm
166 lines
4.1 KiB
ArmAsm
/*
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Copyright (c) 2015, Synopsys, Inc. All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1) Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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2) Redistributions in binary form must reproduce the above copyright notice,
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this list of conditions and the following disclaimer in the documentation
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and/or other materials provided with the distribution.
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3) Neither the name of the Synopsys, Inc., nor the names of its contributors
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may be used to endorse or promote products derived from this software
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without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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*/
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/* ABI interface file
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these are the stack mappings for the registers
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as stored in the ABI for ARC */
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.file "setjmp.S"
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ABIr13 = 0
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ABIr14 = ABIr13 + 4
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ABIr15 = ABIr14 + 4
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ABIr16 = ABIr15 + 4
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ABIr17 = ABIr16 + 4
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ABIr18 = ABIr17 + 4
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ABIr19 = ABIr18 + 4
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ABIr20 = ABIr19 + 4
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ABIr21 = ABIr20 + 4
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ABIr22 = ABIr21 + 4
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ABIr23 = ABIr22 + 4
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ABIr24 = ABIr23 + 4
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ABIr25 = ABIr24 + 4
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ABIr26 = ABIr25 + 4
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ABIr27 = ABIr26 + 4
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ABIr28 = ABIr27 + 4
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ABIr29 = ABIr28 + 4
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ABIr30 = ABIr29 + 4
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ABIr31 = ABIr30 + 4
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ABIlpc = ABIr31 + 4
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ABIlps = ABIlpc + 4
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ABIlpe = ABIlps + 4
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ABIflg = ABIlpe + 4
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ABImlo = ABIflg + 4
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ABImhi = ABImlo + 4
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.text
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.align 4
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.global setjmp
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.type setjmp,@function
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setjmp:
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st r13, [r0, ABIr13]
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st r14, [r0, ABIr14]
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st r15, [r0, ABIr15]
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st r16, [r0, ABIr16]
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st r17, [r0, ABIr17]
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st r18, [r0, ABIr18]
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st r19, [r0, ABIr19]
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st r20, [r0, ABIr20]
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st r21, [r0, ABIr21]
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st r22, [r0, ABIr22]
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st r23, [r0, ABIr23]
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st r24, [r0, ABIr24]
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st r25, [r0, ABIr25]
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st r26, [r0, ABIr26]
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st r27, [r0, ABIr27]
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st r28, [r0, ABIr28]
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st r29, [r0, ABIr29]
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st r30, [r0, ABIr30]
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st blink, [r0, ABIr31]
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st lp_count, [r0, ABIlpc]
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lr r2, [lp_start]
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lr r3, [lp_end]
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st r2, [r0, ABIlps]
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st r3, [r0, ABIlpe]
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#if (!defined (__A7__) && !defined (__EM__) && !defined (__HS__))
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; Till the configure changes are decided, and implemented, the code working on
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; mlo/mhi and using mul64 should be disabled.
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; st mlo, [r0, ABImlo]
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; st mhi, [r0, ABImhi]
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lr r2, [status32]
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st r2, [r0, ABIflg]
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#endif
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j.d [blink]
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mov r0,0
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.Lfe1:
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.size setjmp,.Lfe1-setjmp
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.align 4
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.global longjmp
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.type longjmp,@function
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longjmp:
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; load registers
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ld r13, [r0, ABIr13]
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ld r14, [r0, ABIr14]
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ld r15, [r0, ABIr15]
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ld r16, [r0, ABIr16]
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ld r17, [r0, ABIr17]
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ld r18, [r0, ABIr18]
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ld r19, [r0, ABIr19]
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ld r20, [r0, ABIr20]
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ld r21, [r0, ABIr21]
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ld r22, [r0, ABIr22]
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ld r23, [r0, ABIr23]
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ld r24, [r0, ABIr24]
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ld r25, [r0, ABIr25]
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ld r26, [r0, ABIr26]
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ld r27, [r0, ABIr27]
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ld r28, [r0, ABIr28]
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ld r3, [r0, ABIr29]
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mov r29, r3
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ld r3, [r0, ABIr30]
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mov r30, r3
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ld blink, [r0, ABIr31]
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ld r3, [r0, ABIlpc]
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mov lp_count, r3
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ld r2, [r0, ABIlps]
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ld r3, [r0, ABIlpe]
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sr r2, [lp_start]
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sr r3, [lp_end]
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#if (!defined (__A7__) && !defined (__EM__) && !defined (__HS__))
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ld r2, [r0, ABImlo]
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ld r3, [r0, ABImhi]
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; We do not support restoring of mulhi and mlo registers, yet.
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; mulu64 0,r2,1 ; restores mlo
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; mov 0,mlo ; force multiply to finish
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; sr r3, [mulhi]
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ld r2, [r0, ABIflg]
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flag r2 ; restore "status32" register
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#endif
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mov.f r1, r1 ; to avoid return 0 from longjmp
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mov.eq r1, 1
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j.d [blink]
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mov r0,r1
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.Lfe2:
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.size longjmp,.Lfe2-longjmp
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