current status - before debug session

This commit is contained in:
Sylvain PILLOT 2022-04-15 21:06:51 +02:00
parent 0e000d2f0c
commit a62f570458
8 changed files with 44 additions and 66 deletions

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@ -31,6 +31,7 @@ set(ASSETS_cg
assets-cg/fontmatrix.png
assets-cg/SlyVTT.png
assets-cg/Selection.png
assets-cg/fontFantasy.png
)
fxconv_declare_assets(${ASSETS} ${ASSETS_fx} ${ASSETS_cg} WITH_METADATA)

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@ -2,29 +2,29 @@
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assets-cg/fontFantasy.png Normal file

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@ -34,3 +34,11 @@ Selection.png:
profile: p8
name: Selection
fontFantasy.png:
type: font
charset: print
name: font_fantasy
grid.size: 8x8
grid.padding: 1
proportional: true

1
capture Executable file
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@ -0,0 +1 @@
fxlink -iw

1
send Executable file
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@ -0,0 +1 @@
fxlink -sw *.g3a

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@ -58,32 +58,22 @@ uint32_t initTimersTCNT[3];
uint32_t initTimersTCOR[3];
uint32_t newTimersTCNT[3];
uint32_t newTimersTCOR[3];
int initPphi;
int newPphi;
uint32_t initPphi;
uint32_t newPphi;
static int getPphi_sh7305(void)
// Return the value of Pphi_Freq as per the current overclocking configuration
uint32_t getPphi_sh7305(void)
{
/* The meaning of the PLL setting on SH7305 differs from the
documentation of SH7224; the value must not be doubled. */
int pll = CPG.FRQCR.STC + 1;
uint32_t fll_freq;
uint32_t pll_freq;
uint32_t per_freq;
fll_freq = (SH7305_CPG.FLLFRQ.FLF * 32768) / (1 << SH7305_CPG.FLLFRQ.SELXM);
pll_freq = fll_freq * (SH7305_CPG.FRQCR.STC + 1);
per_freq = pll_freq / (1 << (SH7305_CPG.FRQCR.P1FC + 1));
/* The FLL ratio is the value of the setting, halved if SELXM=1 */
int fll = CPG.FLLFRQ.FLF;
if(CPG.FLLFRQ.SELXM == 1) fll >>= 1;
/* On SH7724, the divider ratio is given by 1 / (setting + 1), but on
the SH7305 it is 1 / (2^setting + 1). */
int divb = CPG.FRQCR.BFC;
int divi = CPG.FRQCR.IFC;
int divp = CPG.FRQCR.P1FC;
/* Deduce the input frequency of divider 1 */
int base = 32768;
if(CPG.PLLCR.FLLE) base *= fll;
if(CPG.PLLCR.PLLE) base *= pll;
return (base >> (divp + 1));
return per_freq;
}
//We list all running timers and store this in a table (true/false)
@ -91,16 +81,9 @@ void listTimerStatus( void )
{
for(int k=0;k<3; k++)
{
if(k < 3)
{
tmu_t *T = &TMU[k];
runningTimers[k]= (!T->TCR.UNIE && !(*TSTR & (1 << k)));
}
// else
// {
// etmu_t *T = &ETMU[k-3];
// runningTimers[k]= (!T->TCR.UNIE && !T->TSTR);
// }
//runningTimers[k]= (!T->TCR.UNIE && !(*TSTR & (1 << k)));
runningTimers[k] = (T->TCNT!=0xffffffff || T->TCOR!=0xffffffff); // as per Lephe's proposal for Libprof compatibility
}
}
@ -112,18 +95,9 @@ void getInitialTimersParameters( void )
{
if (runningTimers[k]==true)
{
if(k < 3)
{
tmu_t *T = &TMU[k];
initTimersTCNT[k]= T->TCNT;
initTimersTCOR[k]= T->TCOR;
}
// else
// {
// etmu_t *T = &ETMU[k-3];
// initTimersTCNT[k]= T->TCNT;
// initTimersTCOR[k]= T->TCOR;
// }
}
}
}
@ -142,25 +116,18 @@ void updateNewTimersParameters( void )
if (runningTimers[k]==true)
{
timer_stop( k );
if(k < 3)
{
tmu_t *T = &TMU[k];
T->TCNT = newTimersTCNT[k];
T->TCOR = newTimersTCOR[k];
}
// else
// {
// etmu_t *T = &ETMU[k-3];
// T->TCNT = newTimersTCNT[k];
// T->TCOR = newTimersTCOR[k];
// }
timer_start(k);
}
}
}
//We compute the new TCNT and new TCOR
void computeNewTimersParameters( int initPphi_f, int newPphi_f )
void computeNewTimersParameters( uint32_t initPphi_f, uint32_t newPphi_f )
{
for(int k=0;k<3; k++)
{
@ -177,8 +144,6 @@ static overclock_level current_clock_state = OC_Default;
bool overclock_config_changed = false;
void SetOCDefault( void )
{
BSC.CS0WCR.WR = WAIT18;

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@ -26,6 +26,7 @@ uint8_t pagevisible=0;
bool screenshot = false;
bool record = false;
extern font_t font_fantasy;
size_t image_size_profile(int profile, int width, int height)
{
@ -1231,9 +1232,6 @@ int main(void)
init_module1();
dfont(&matrix);
while(!stop)
{
dt = ((float) time_render / 1000.0);
@ -1243,6 +1241,8 @@ int main(void)
dclear(C_BLACK);
dfont( &matrix );
if (skip_intro==false)
{
run_intro();
@ -1280,6 +1280,8 @@ int main(void)
}
}
dfont(&font_fantasy);
dprint(1,1, C_WHITE, "FPS %.0f", (float) (1000.0f/dt) );
dprint(1,15, C_WHITE, "OC STAT %d", valueOC );