From 591e453717b01cf139f0775e4aff72f067d2d7e2 Mon Sep 17 00:00:00 2001
From: Lephenixnoir <sebastien.michelland@protonmail.com>
Date: Sun, 23 May 2021 15:31:01 +0200
Subject: [PATCH] sh-generic: add CPU capabilities for optimized SH4 code

On sh-generic targets, the headers <bits/cpucap.h> (in C) and
<bits/asm/cpucap.h> (in assembler) provide definitions to acces the
__cpucap symbol which provides information on the CPU.

Currently, a single capability __CPUCAP_SH4ALDSP is defined; it
represents the SH4 extended instructions together with the integrated
DSP instructions. The main uses of this capability are [movua.l]
(unaligned reads) and [ldrc] (built-in tight loops).

Capabilities are initialized to 0 (their safest default) and the runtime
can enable them based on what hardware is running.
---
 CMakeLists.txt                              | 3 ++-
 include/target/sh-generic/bits/asm/cpucap.h | 9 +++++++++
 include/target/sh-generic/bits/cpucap.h     | 9 +++++++++
 src/target/sh-generic/cpucap.c              | 3 +++
 4 files changed, 23 insertions(+), 1 deletion(-)
 create mode 100644 include/target/sh-generic/bits/asm/cpucap.h
 create mode 100644 include/target/sh-generic/bits/cpucap.h
 create mode 100644 src/target/sh-generic/cpucap.c

diff --git a/CMakeLists.txt b/CMakeLists.txt
index a620ba0..4d07224 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -168,7 +168,8 @@ if(sh-generic IN_LIST TARGET_FOLDERS)
   list(APPEND SOURCES
     src/libc/setjmp/target/sh-generic/setjmp.S
     src/libc/setjmp/target/sh-generic/longjmp.S
-    src/libc/string/target/sh-generic/memchr.S)
+    src/libc/string/target/sh-generic/memchr.S
+    src/target/sh-generic/cpucap.c)
 endif()
 
 if(casiowin-fx IN_LIST TARGET_FOLDERS)
diff --git a/include/target/sh-generic/bits/asm/cpucap.h b/include/target/sh-generic/bits/asm/cpucap.h
new file mode 100644
index 0000000..b910542
--- /dev/null
+++ b/include/target/sh-generic/bits/asm/cpucap.h
@@ -0,0 +1,9 @@
+#ifndef __BITS_ASM_CPUCAP_H__
+# define __BITS_ASM_CPUCAP_H__
+
+/* CPU capabilities for assembler code. See also <bits/cpucap.h>. */
+
+/* CPU supports the SH4AL-DSP instruction set (with DSP turned on). */
+#define __CPUCAP_SH4ALDSP 0x01
+
+#endif /*__BITS_ASM_CPUCAP_H__*/
diff --git a/include/target/sh-generic/bits/cpucap.h b/include/target/sh-generic/bits/cpucap.h
new file mode 100644
index 0000000..974ce5a
--- /dev/null
+++ b/include/target/sh-generic/bits/cpucap.h
@@ -0,0 +1,9 @@
+#ifndef __BITS_CPUCAP_H__
+# define __BITS_CPUCAP_H__
+
+#include <bits/asm/cpucap.h>
+
+/* CPU flags determined at runtime. */
+extern int __cpucap;
+
+#endif /*__BITS_CPUCAP_H__*/
diff --git a/src/target/sh-generic/cpucap.c b/src/target/sh-generic/cpucap.c
new file mode 100644
index 0000000..2167505
--- /dev/null
+++ b/src/target/sh-generic/cpucap.c
@@ -0,0 +1,3 @@
+#include <bits/cpucap.h>
+
+int __cpucap = 0;