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ld: merge XRAM and YRAM into a single 16-kiB section

This commit is contained in:
Lephe 2022-05-04 17:21:23 +01:00
parent 26c5b76037
commit 8210524152
Signed by untrusted user: Lephenixnoir
GPG Key ID: 1BBA026E13FC0495
4 changed files with 20 additions and 47 deletions
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28
fx9860g.ld
View File

@ -35,8 +35,7 @@ MEMORY
/* On-chip IL memory */
ilram (rwx): o = 0xe5200000, l = 4k
/* On-chip X and Y memory */
xram (rwx): o = 0xe5007000, l = 8k
yram (rwx): o = 0xe5017000, l = 8k
xyram (rwx): o = 0xe500e000, l = 16k
}
SECTIONS
@ -188,29 +187,18 @@ SECTIONS
. = ALIGN(16);
} > ilram AT> rom
. = ORIGIN(xram);
.xram ALIGN(4) : ALIGN(4) {
_lxram = LOADADDR(.xram);
_rxram = . ;
. = ORIGIN(xyram);
.xyram ALIGN(4) : ALIGN(4) {
_lxyram = LOADADDR(.xyram);
_rxyram = . ;
*(.xram)
*(.xram .yram .xyram)
. = ALIGN(16);
} > xram AT> rom
. = ORIGIN(yram);
.yram ALIGN(4) : ALIGN(4) {
_lyram = LOADADDR(.yram);
_ryram = . ;
*(.yram)
. = ALIGN(16);
} > yram AT> rom
} > xyram AT> rom
_silram = SIZEOF(.ilram);
_sxram = SIZEOF(.xram);
_syram = SIZEOF(.yram);
_sxyram = SIZEOF(.xyram);

29
fxcg50.ld
View File

@ -21,8 +21,7 @@ MEMORY
/* On-chip IL memory */
ilram (rwx): o = 0xe5200000, l = 4k
/* On-chip X and Y memory */
xram (rwx): o = 0xe5007000, l = 8k
yram (rwx): o = 0xe5017000, l = 8k
xyram (rwx): o = 0xe500e000, l = 16k
}
SECTIONS
@ -102,7 +101,6 @@ SECTIONS
.bss (NOLOAD) : {
_rbss = . ;
*(.bss.vram)
*(.bss COMMON)
. = ALIGN(16);
@ -144,29 +142,18 @@ SECTIONS
. = ALIGN(16);
} > ilram AT> rom
. = ORIGIN(xram);
.xram ALIGN(4) : ALIGN(4) {
_lxram = LOADADDR(.xram);
_rxram = . ;
. = ORIGIN(xyram);
.xyram ALIGN(4) : ALIGN(4) {
_lxyram = LOADADDR(.xyram);
_rxyram = . ;
*(.xram)
*(.xram .yram .xyram)
. = ALIGN(16);
} > xram AT> rom
. = ORIGIN(yram);
.yram ALIGN(4) : ALIGN(4) {
_lyram = LOADADDR(.yram);
_ryram = . ;
*(.yram)
. = ALIGN(16);
} > yram AT> rom
} > xyram AT> rom
_silram = SIZEOF(.ilram);
_sxram = SIZEOF(.xram);
_syram = SIZEOF(.yram);
_sxyram = SIZEOF(.xyram);
/* gint's uninitialized BSS section, going to static RAM. All the large
data arrays will be located here */

4
include/gint/defs/attributes.h
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@ -14,8 +14,8 @@
#define GBSS3 __attribute__((section(".gint.bss.sh3")))
/* Objects for the ILRAM, XRAM and YRAM regions */
#define GILRAM __attribute__((section(".ilram")))
#define GXRAM __attribute__((section(".xram")))
#define GYRAM __attribute__((section(".yram")))
#define GXRAM __attribute__((section(".xyram")))
#define GYRAM __attribute__((section(".xyram")))
/* Unused parameters or variables */
#define GUNUSED __attribute__((unused))

6
src/kernel/start.c
View File

@ -23,8 +23,7 @@ extern uint32_t
brom, srom, /* Limits of ROM mappings */
ldata, sdata, rdata, /* User's data section */
lilram, silram, rilram, /* IL memory section */
lxram, sxram, rxram, /* X memory section */
lyram, syram, ryram, /* Y memory section */
lxyram, sxyram, rxyram, /* X and Y memory section */
sbss, rbss; /* User's BSS section */
#ifdef FX9860G
extern uint32_t
@ -151,8 +150,7 @@ int start(int isappli, int optnum)
if(!isSH3())
{
regcpy(&lilram, &silram, &rilram);
regcpy(&lxram, &sxram, &rxram);
regcpy(&lyram, &syram, &ryram);
regcpy(&lxyram, &sxyram, &rxyram);
}
#ifdef FX9860G