96 lines
1.9 KiB
ArmAsm
96 lines
1.9 KiB
ArmAsm
.text
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.global ___thread_atomic_start
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.global ___thread_atomic_stop
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.type ___thread_atomic_start, @function
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.type ___thread_atomic_stop, @function
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.align 2
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/*
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** extern uint32_t __thread_atomic_start(void)
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** Save the current SR register and set the SR.BIT bit up to start an atomic
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** context (interrupt is blocked).
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** Return the saved SR register (only if the we enter into an atomic context),
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** 0xffffffff otherwise.
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*/
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___thread_atomic_start:
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! Check if the user is currently into an atomic operation
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! and update atomic counter.
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mov.l atomic_counter, r1
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mov.l @r1, r2
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tst r2, r2
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add #1, r2
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mov.l r2, @r1
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bf.s atomic_start_exit
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mov #-1, r0
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! Block interrupt if needed.
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stc sr, r1
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mov r1, r0
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mov.l bl_mask, r2
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or r2, r1
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ldc r1, sr
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! Save "old" SR register.
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mov.l sr_save, r1
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mov.l r0, @r1
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atomic_start_exit:
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rts
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nop
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/*
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** extern uint32_t __thread_atomic_stop(void)
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** Decreate the internal "atomic context counter" and if the counter is 0,
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** restore the saved SR register status.
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** Return the restored SR register (if restored) or -1 otherwise.
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*/
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___thread_atomic_stop:
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! Check if the device is currently into an atomic operation
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! and update atomic counter and, if needed, restore the SR
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! regsiter
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mov.l atomic_counter, r1
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mov.l @r1, r0
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tst r0, r0
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bt atomic_end_error
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cmp/eq #1, r0
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add #-1, r0
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mov.l r0, @r1
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bf atomic_end_error
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! Restore saved SR register data.
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mov.l sr_save, r1
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mov.l @r1, r0
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ldc r0, sr
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bra atomic_end_exit
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nop
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atomic_end_error:
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mov #-1, r0
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atomic_end_exit:
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rts
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nop
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.align 4
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bl_mask: .long 0x100000f0
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sr_save: .long ___thread_atomic_sr_save
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atomic_counter: .long ___thread_atomic_counter
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##---
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## Global part.
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##---
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.data
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.global ___thread_atomic_sr_save
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.global ___thread_atomic_counter
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.type ___thread_atomic_sr_save, @object
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.type ___thread_atomic_counter, @object
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.align 4
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___thread_atomic_sr_save: .long 0x00000000
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___thread_atomic_counter: .long 0x00000000
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