68 lines
1.9 KiB
ArmAsm
68 lines
1.9 KiB
ArmAsm
/*
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** intc:inth.S - Interrupt handlers
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** This file only contains the entry points because the gates are managed
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** by device drivers. Each driver will supply its own interrupt handler
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** blocks depending on its configuration.
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*/
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.section .vhex.inth.pretext, "ax"
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.global _vhex_inth_sh7305
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/* Interrupt handlers
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The .vhex.blocks section consists of blocks of 32 bytes intended for mapping
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into the VBR space (exception, TLB miss, and interrupt handlers). Each event
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gate is linearly associated with a block number on SH4:
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block_id = (event_code - 0x3c0) / 0x20
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This file provides entry points; drivers may provide their own interrupt
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handlers, and store them in the .vhex.blocks section for consistency. They
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should be aware of the consequences of reordering the blocks into the VBR
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space:
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- It is possible to map MPU-specific blocks at runtime, to avoid checking
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the MPU each time an interrupt is handled;
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- However, the blocks can only rely on relative displacements or cross-
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references if their relative order is known and heeded for both on SH4 and
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SH3. A good example of this is the timer driver. Please be careful. */
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/* SH7305-TYPE INTERRUPT HANDLER ENTRY - 40 BYTES */
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_vhex_inth_sh7305:
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/* Save caller-saved registers which might currently be in use by the
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interrupted function, as we don't know what the callback will do */
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sts.l pr, @-r15
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stc.l gbr, @-r15
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sts.l mach, @-r15
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sts.l macl, @-r15
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/* Get the event code from the INTEVT register */
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mov.l 1f, r0
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mov.l @r0, r0
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/* Interrupt codes start at 0x400 */
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mov #4, r1
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shll8 r1
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sub r1, r0
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/* Add the distance to the first entry and jump as a subroutine */
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add #(.first_entry - .jump_over), r0
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bsrf r0
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nop
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.jump_over:
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/* Restore caller-saved registers */
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lds.l @r15+, macl
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lds.l @r15+, mach
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ldc.l @r15+, gbr
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lds.l @r15+, pr
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rte
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nop
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.zero 24
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1: .long 0xff000028
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.first_entry:
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