173 lines
3.8 KiB
C
173 lines
3.8 KiB
C
#include <vhex/defs/types.h>
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#include <vhex/driver.h>
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#include <vhex/driver/screen/r61524.h>
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#include <vhex/display/stack.h>
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//---
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// R61524 driver API
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//---
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/* r61524_clear_surface() - optimal way to clear the draw and render surface */
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VINLINE void r61524_clear_surface(struct dshader_surface *surface)
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{
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//TODO: check cache behaviour:
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// > full xram then yram
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// > xram and yram
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// > yram and xram
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// > restrict / non-restrict
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uint32_t * restrict xram = surface->draw;
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uint32_t * restrict yram = surface->frag;
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for (int i = 0; i < 1980; ++i) {
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xram[i] = 0x00010001;
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yram[i] = 0x00000000;
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}
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}
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/* r61524_frame_start() - prepar the screen and reset surfaces */
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int r61524_frame_start(struct dshader_surface *surface)
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{
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/* Set the windows size */
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r61524_select(horizontal_ram_start);
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r61524_write(0);
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r61524_select(horizontal_ram_end);
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r61524_write(395);
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r61524_select(vertical_ram_start);
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r61524_write(0);
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r61524_select(vertical_ram_end);
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r61524_write(223);
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/* Set the RAM position */
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r61524_select(ram_address_horizontal);
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r61524_write(0);
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r61524_select(ram_address_vertical);
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r61524_write(0);
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/* Bind address 0xb4000000 to the data write command */
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r61524_select(write_data);
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/* initialize surface information */
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surface->draw = (void*)0xe5007000;
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surface->frag = (void*)0xe5017000;
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surface->width = 396;
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surface->height = 10;
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surface->x = 0;
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surface->y = 0;
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/* reset the two surfaces */
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r61524_clear_surface(surface);
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return (0);
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}
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int r61524_frame_frag_next(struct dshader_surface *surface)
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{
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//TODO: perf if culling at the end (220)
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surface->y += 10;
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if (surface->y >= 224) {
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surface->y -= 10;
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return (-1);
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}
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r61524_clear_surface(surface);
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return (0);
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}
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int r61524_frame_frag_send(struct dshader_surface *surface)
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{
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//static int counter = 0;
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//TODO: assembly
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//TODO: check cache behaviour:
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// > full xram then yram
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// > xram and yram
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// > yram and xram
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// > restrict / non-restrict
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uint16_t pixel;
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uint16_t * restrict xram = surface->draw;
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uint16_t * restrict yram = surface->frag;
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for (int i = 0; i < 3960; ++i) {
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pixel = xram[i];
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if (pixel & 0x0001) {
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r61524_write(yram[i]);
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continue;
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}
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r61524_write((pixel & 0xffc0) | ((pixel & 0x003e) >> 1));
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}
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return (0);
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}
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int r61524_frame_end(struct dshader_surface *surface)
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{
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(void)surface;
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return (0);
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}
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//---
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// Driver definition
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//---
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/* R61524 display (graphics RAM range) */
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struct r61524_ctx {
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uint16_t HSA;
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uint16_t HEA;
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uint16_t VSA;
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uint16_t VEA;
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};
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static void __r61524_configure(struct r61524_ctx *s)
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{
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s->HSA = 0;
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s->HEA = 395;
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s->VSA = 0;
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s->VEA = 223;
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}
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static void __r61524_hsave(struct r61524_ctx *s)
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{
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r61524_select(horizontal_ram_start);
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s->HSA = r61524_read();
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r61524_select(horizontal_ram_end);
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s->HEA = r61524_read();
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r61524_select(vertical_ram_start);
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s->VSA = r61524_read();
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r61524_select(vertical_ram_end);
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s->VEA = r61524_read();
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}
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static void __r61524_hrestore(struct r61524_ctx const *s)
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{
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r61524_select(horizontal_ram_start);
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r61524_write(s->HSA);
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r61524_select(horizontal_ram_end);
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r61524_write(s->HEA);
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r61524_select(vertical_ram_start);
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r61524_write(s->VSA);
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r61524_select(vertical_ram_end);
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r61524_write(s->VEA);
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}
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static struct dstack_drv_interface drv_r61524_dstack = {
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.frame_start = &r61524_frame_start,
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.frame_frag_next = &r61524_frame_frag_next,
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.frame_frag_send = &r61524_frame_frag_send,
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.frame_end = &r61524_frame_end,
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.display_width = 396,
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.display_height = 224
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};
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struct vhex_driver drv_r61524 = {
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.name = "R61524",
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.hsave = (void*)&__r61524_hsave,
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.hrestore = (void*)&__r61524_hrestore,
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.configure = (void*)&__r61524_configure,
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.state_size = sizeof(struct r61524_ctx),
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.flags = {
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.DISPLAY = 1,
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.SHARED = 0,
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.UNUSED = 0,
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},
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.module_data = &drv_r61524_dstack
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};
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VHEX_DECLARE_DRIVER(16, drv_r61524);
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