77 lines
1.8 KiB
C
77 lines
1.8 KiB
C
#include "vhex/display.h"
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#include "vhex/defs/attributes.h"
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#include "vhex/defs/types.h"
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/* Registers and operations */
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enum {
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device_code_read = 0x000,
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driver_output_control = 0x001,
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entry_mode = 0x003,
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display_control_2 = 0x008,
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low_power_control = 0x00b,
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ram_address_horizontal = 0x200,
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ram_address_vertical = 0x201,
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write_data = 0x202,
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horizontal_ram_start = 0x210,
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horizontal_ram_end = 0x211,
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vertical_ram_start = 0x212,
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vertical_ram_end = 0x213,
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};
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/* Interface with the controller */
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static volatile uint16_t *intf = (void *)0xb4000000;
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/* Bit 4 of Port R controls the RS bit of the display driver */
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static volatile uint8_t *PRDR = (void *)0xa405013c;
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static void select(uint16_t reg)
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{
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/* Clear RS and write the register number */
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*PRDR &= ~0x10;
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__asm__ volatile ("synco"::);
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*intf = reg;
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__asm__ volatile ("synco"::);
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/* Set RS back. We don't do this in read()/write() because the display
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driver is optimized for consecutive GRAM access. LCD-transfers will
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be faster when executing select() followed by several calls to
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write(). (Although most applications should use the DMA instead.) */
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*PRDR |= 0x10;
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__asm__ volatile ("synco"::);
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}
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static void write(uint16_t data)
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{
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*intf = data;
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}
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/* dupdate(): Push the video RAM to the display driver */
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VWEAK void dupdate(void)
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{
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extern uint16_t vhex_vram[];
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/* Set the windows size */
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select(horizontal_ram_start);
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write(0);
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select(horizontal_ram_end);
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write(395);
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select(vertical_ram_start);
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write(0);
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select(vertical_ram_end);
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write(223);
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/* Set the RAM position */
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select(ram_address_horizontal);
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write(0);
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select(ram_address_vertical);
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write(0);
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/* Bind address 0xb4000000 to the data write command */
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select(write_data);
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/* force-fill manualy the screen */
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for (int i = 0; i < 396 * 224; ++i)
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write(vhex_vram[i]);
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}
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