81 lines
2.5 KiB
C
81 lines
2.5 KiB
C
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#ifndef __KERNEL_HARDWARE_CPG_H__
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# define __KERNEL_HARDWARE_CPG_H__
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#include <stddef.h>
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#include <stdint.h>
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#include <kernel/def/union_types.h>
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#include <kernel/def/attributes.h>
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struct SH7305_cpg_s
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{
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volatile long_union(FRQCRA, /* Casio's configuration: 0x0f212213 */
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uint32_t KICK : 1; /* Kick bits */
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uint32_t const : 1; /* All 0 */
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uint32_t STC : 6; /* PLL circuit multiplication ratio */
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uint32_t IFC : 4; /* CPU clock frequency division ratio */
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uint32_t const : 4; /* All 0 */
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uint32_t SFC : 4; /* S clock frequency division ratio */
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uint32_t BFC : 4; /* Bus clock frequency division ration */
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uint32_t const : 4; /* All 0 */
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uint32_t PFC : 4; /* Peripheral clock frequency division ratio */
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);
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volatile uint32_t FRQCRB; /* Undocumented (0x00000000) */
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volatile long_union(FCLKACR, /* Casio's configuration: 0x00000157 */
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uint32_t const : 16; /* All 0 */
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uint32_t unknown : 16; /* Unknown (default 0x0157) */
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);
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volatile long_union(FCLKBCR, /* Casio's configuration: 0x0000003f */
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uint32_t const : 16; /* All 0 */
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uint32_t unknown : 16; /* Unknown (default 0x003f) */
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);
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GAPS(0x08);
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volatile long_union(IRDACLKCR, /* Casio's configuration: 0x0000003f */
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uint32_t const : 16; /* All 0 */
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uint32_t unknown : 16; /* Unknown (default 0x003f) */
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);
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GAPS(0x08);
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volatile long_union(PLLCR, /* Casio's configuration: 0x00005000 */
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uint32_t const : 16; /* All 0 */
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uint32_t unknown0 : 1; /* Unknown (default 0) */
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uint32_t PLLE : 1; /* PLL enable (?) */
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uint32_t const : 1; /* All 0 */
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uint32_t FLLE : 1; /* FLL enable (?) */
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uint32_t const : 8; /* All 0 */
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uint32_t unknown1 : 4; /* Unknown (default 0b0000) */
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);
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GAPS(0x14);
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volatile long_union(SPUCLKCR, /* Casio's configuration: 0x00000103 */
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uint32_t const : 16; /* All 0 */
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uint32_t unknown : 16; /* Unknown (default 0x0103) */
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);
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GAPS(0x08);
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volatile long_union(VCLKCR, /* Casio's configuration: 0x0000003f */
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uint32_t const : 16; /* All 0 */
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uint32_t unknown : 16; /* Unknown (default 0x003f) */
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);
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GAPS(0x04);
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volatile long_union(FLLFRQ, /* Casio's configuration: 0x00004384 */
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uint32_t const : 16; /* All 0 */
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uint32_t SELXM : 2; /* FLL output division */
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uint32_t unknown : 3; /* Unknown */
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uint32_t FLF : 11; /* FLL Multiplication Ratio */
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);
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GAPS(0x0c);
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volatile long_union(LSTATS,
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uint32_t const : 31; /* All 0 */
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uint32_t const FQRF : 1; /* Frequency change status */
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);
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};
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#define SH7305_CPG (*(volatile struct SH7305_cpg_s *)0xa4150000)
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#endif /*__KERNEL_HARDWARE_CPG_H__*/
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