From 659f63146995e9f97039a8ec8ae2bf4fd5abfae3 Mon Sep 17 00:00:00 2001 From: Yann MAGNIN Date: Mon, 9 Dec 2019 15:57:06 +0100 Subject: [PATCH] Fix crash with the UBC handler + Add VBR space --- Makefile | 3 + include/kernel/devices/ubc.h | 3 +- include/kernel/opcode.h | 5 +- include/lib/display.h | 1 + src/kernel/bootstrap/start.c | 38 ++- src/kernel/dbr/handler.c | 20 +- src/kernel/dbr/handler_pre.s | 88 +++-- src/kernel/dbr/menu/disassembly.c | 104 +++++- src/kernel/dbr/{ => opcode}/opcode.c | 494 +++++++++++++-------------- src/kernel/devices/ubc/open.c | 2 +- src/kernel/vbr/exception.c | 38 +++ src/kernel/vbr/interrupt.c | 10 + src/kernel/vbr/tlb.c | 38 +++ src/lib/display/dprint.c | 8 + src/lib/display/dreverse.c | 50 +++ src/user/main.c | 60 ++-- src/user/test.c | 4 +- src/user/test_asm.s | 23 ++ vhex.g1a | Bin 18020 -> 21732 bytes vhex.ld | 89 +++-- 20 files changed, 706 insertions(+), 372 deletions(-) rename src/kernel/dbr/{ => opcode}/opcode.c (85%) create mode 100644 src/kernel/vbr/exception.c create mode 100644 src/kernel/vbr/interrupt.c create mode 100644 src/kernel/vbr/tlb.c create mode 100644 src/lib/display/dreverse.c create mode 100644 src/user/test_asm.s diff --git a/Makefile b/Makefile index de40dec..c7e380f 100644 --- a/Makefile +++ b/Makefile @@ -81,6 +81,9 @@ check: map: @ $(OBJDUMP) -D $(DEBUG)/$(NAME).elf | less +bin: + @ cat $(MEMORY_MAP) | less + ##--- ## Automated rules diff --git a/include/kernel/devices/ubc.h b/include/kernel/devices/ubc.h index 966f820..31e712e 100644 --- a/include/kernel/devices/ubc.h +++ b/include/kernel/devices/ubc.h @@ -21,7 +21,8 @@ typedef struct ubc_session_s uint32_t cursor; } context; struct { - uint32_t cursor; + int32_t vcursor; + int32_t hcursor; } disassembly; } menu; struct ubc_context_s *context; diff --git a/include/kernel/opcode.h b/include/kernel/opcode.h index c0b1fe5..cad69ef 100644 --- a/include/kernel/opcode.h +++ b/include/kernel/opcode.h @@ -15,7 +15,10 @@ struct opcode_s uint16_t mask; uint16_t code; uint16_t arg_mask[ARGUMENTS_MAX]; - void (*special)(char *buffer, struct opcode_s); + void (*special)(char *buffer, uint16_t *area); }; +// Opcode list. +extern const struct opcode_s opcode_list[]; + #endif /*__OPCODE_H__*/ diff --git a/include/lib/display.h b/include/lib/display.h index 7dc9e79..ad4215e 100644 --- a/include/lib/display.h +++ b/include/lib/display.h @@ -26,6 +26,7 @@ extern void dclear(void); extern void dprint(int x, int y, char const *str, ...); extern void dascii(int x, int y, char const c); +extern void dreverse(int x, int y, int width, int height); extern void dscroll(int line); extern void dupdate(void); diff --git a/src/kernel/bootstrap/start.c b/src/kernel/bootstrap/start.c index 84e4bb8..005e2c9 100644 --- a/src/kernel/bootstrap/start.c +++ b/src/kernel/bootstrap/start.c @@ -4,6 +4,7 @@ #include #include #include +#include #include #include @@ -19,18 +20,18 @@ extern uint32_t sdata; extern uint32_t bvhex_ram; extern uint32_t bvhex_rom; extern uint32_t svhex; -extern uint32_t btest_ram; -extern uint32_t btest_rom; -extern uint32_t stest; +extern uint32_t bubc_ram; +extern uint32_t bubc_rom; +extern uint32_t subc; // Internal functions. -extern void section_wipe(uint32_t *section, size_t size); -extern void section_load(uint32_t *dest, uint32_t *src, size_t size); -extern void ubc_handler(void); +extern mpu_t mpu_get(void); +extern void ubc_handler_pre(void); extern void test(void); extern int main(void); + __attribute__((section(".pretext"))) int start(void) { @@ -39,13 +40,32 @@ int start(void) // Wipe .bss section and dump .data / Vhex sections memset(&bbss, 0x00, (size_t)&sbss); + memcpy(&bubc_ram, &bubc_rom, (size_t)&subc); memcpy(&bdata_ram, &bdata_rom, (size_t)&sdata); - //memcpy(&bvhex_ram, &bvhex_rom, (size_t)&svhex); - //memcpy(&btest_ram, &btest_rom, (size_t)&stest); + memcpy(&bvhex_ram, &bvhex_rom, (size_t)&svhex); - // Get Casio's VRAM address. + // Get Casio's VRAM display_open(); +/* volatile uint32_t *bite = (void*)0xe5200000; + + dclear(); + dprint(0, 0, "UBC = %p", &ubc_handler_pre); + dprint(0, 1, "TEST = %#x", *bite); + dprint(0, 2, "TEST = %#x", *(uint32_t*)&bubc_rom); + dprint(0, 3, "TEST = %#x", (uint32_t)&bubc_ram); + dprint(0, 4, "TEST = %#x", (uint32_t)&bubc_rom); + dprint(0, 5, "TEST = %#x", (size_t)&subc); + dupdate(); + while (1);*/ + + // Check MPU hardware. + current_mpu = mpu_get(); + if (current_mpu != MPU_SH7305) + { + return (0); + } + // Open User Break Controller. // @note: // This function is hardcoded to follow syscall diff --git a/src/kernel/dbr/handler.c b/src/kernel/dbr/handler.c index 3163e51..4afd82f 100644 --- a/src/kernel/dbr/handler.c +++ b/src/kernel/dbr/handler.c @@ -10,6 +10,16 @@ extern void menu_context(ubc_session_t *session); extern void menu_disassembly(ubc_session_t *session); +void ubc_module_handler(int action) +{ +/* dclear(); + dprint(0, 0, "spc = %p", action); + dupdate(); + for (int i = 0 ; i < 4000000 ; i = i + 1); + +*/ //TODO stop all clock / timer. +} + void ubc_handler(struct ubc_context_s *context, int channel) { void (*menu)(ubc_session_t *session); @@ -20,7 +30,8 @@ void ubc_handler(struct ubc_context_s *context, int channel) session.channel = channel; session.context = context; session.menu.context.cursor = 0; - session.menu.disassembly.cursor = 0; + session.menu.disassembly.vcursor = -(DISPLAY_VLINES_MAX >> 1); + session.menu.disassembly.hcursor = 0; // Initialize menu function. menu = &menu_disassembly; @@ -36,4 +47,11 @@ void ubc_handler(struct ubc_context_s *context, int channel) case KEY_CTRL_F2: menu = &menu_context; break; } } + + // Update UBC + SH7305_UBC.CBR0.CE = 0; // Disable channel. + SH7305_UBC.CAR0 = context->spc; // Update break address. + SH7305_UBC.CAMR0 = 0x00000000; // Update break address. + SH7305_UBC.CBR0.CE = 1; // Disable channel. + icbi((void*)0xa0000000); } diff --git a/src/kernel/dbr/handler_pre.s b/src/kernel/dbr/handler_pre.s index 0db218c..516b364 100644 --- a/src/kernel/dbr/handler_pre.s +++ b/src/kernel/dbr/handler_pre.s @@ -1,34 +1,32 @@ +.section ".ubc.handler", "awx", @progbits + .global _ubc_handler_pre .type _ubc_handler_pre, @function .extern _ubc_handler +.extern _ubc_module_handler -.text .align 2 _ubc_handler_pre: ! Stack management. - stc.l spc, @-r15 ! Save SPC regsiter. - stc.l ssr, @-r15 ! Save SSR regsiter. - .word 0b0100111100110010 ! Save SGR register (save r15 address befor break) "stc.l sgr, @-r15" - mov.l r8, @-r15 ! Save r8 register. mov.l r9, @-r15 ! Save r9 register. + mov.l r8, @-r15 ! Save r8 register. sts.l pr, @-r15 ! Save pr regsiter. - mov r15, r0 ! Save stack address. (used for UBC context) - ! Generate UBC context + ! Generate "programe" context (used by the UBC handler) stc.l spc, @-r15 ! Get SPC register. stc.l ssr, @-r15 ! Get SSR register. sts.l mach, @-r15 ! Get MACH register. sts.l macl, @-r15 ! Get MACL register. stc.l gbr, @-r15 ! Get GBR register. .word 0b0100111100110010 ! Get SGR register (save r15 address befor break) "stc.l sgr, @-r15" - mov.l r14, @-r15 ! Get r14 register. - mov.l r13, @-r15 ! Get r13 register. - mov.l r12, @-r15 ! Get r12 register. - mov.l r10, @-r15 ! Get r10 register. - mov.l r11, @-r15 ! Get r11 register. - mov.l r9, @-r15 ! Get r9 register. + mov.l r14, @-r15 ! Get "program" r14 register. + mov.l r13, @-r15 ! Get "program" r13 register. + mov.l r12, @-r15 ! Get "program" r12 register. + mov.l r11, @-r15 ! Get "program" r11 register. + mov.l r10, @-r15 ! Get "program" r10 register. + mov.l r9, @-r15 ! Get "program" r9 register. mov.l r8, @-r15 ! Get "program" r8 register. stc.l R7_BANK, @-r15 ! Get "program" r7 regsiter. stc.l R6_BANK, @-r15 ! Get "program" r6 regsiter. @@ -39,49 +37,79 @@ _ubc_handler_pre: stc.l R1_BANK, @-r15 ! Get "program" r1 regsiter. stc.l R0_BANK, @-r15 ! Get "program" r0 regsiter. - ! Save stack address. - mov r0, r8 ! Save "original" stack address. + ! We need to stop (and save) all clocks / timers + ! before do any job. + mov.l .ubc_module_handler, r0 ! Get high level abstraction for handle hardware module. + jsr @r0 ! call ubc_module(MODULE_STOP) + mov #0, r4 ! (db) r4 = MODULE_STOP ! Get which channel is trigger and clear interrupt Flags. mov.l .ubc_ccmfr, r0 ! Get UBC.CCMFR register - mov.l @r0, r10 ! r10 = UBC.CCMFR. (save register) + mov.l @r0, r9 ! r5 = UBC.CCMFR. (save register) mov #0, r1 ! r2 = 0x00000000 (clear flags) mov.l r1, @r0 ! Clear UBC.CCMFR.MF1 = 0 and UBC.CCMFR.MF1 = 0 mov.l .icbi_addr, r2 ! Get P2 area for ICBI instruction. .word 0b0000001011100011 ! SH4 instruction "icbi @r2" ! Allow / unblock interrupt and switch register bank ! - stc sr, r9 ! Save SR register. - mov r9, r1 ! Get SR register. + stc sr, r8 ! Save SR register. + mov r8, r1 ! Get SR register. mov.l .sr_mask, r0 ! Get SR mask for SR.BL, SR.IMASK and SR.RB and r0, r1 ! SR.BL = 0, SR.IMASK = 0b0000 and SR.RB = 0 ldc r1, sr ! Update SR register. ! Call high-level abstraction mov r15, r4 ! Send UBC context object to the abstraction. - mov r10, r5 ! Send which channel is trigger. + mov r9, r5 ! Send which channel is trigger. mov.l .ubc_handler, r0 ! Get high-level abstraction address jsr @r0 ! Jump into it. nop ! (db) nop. - ! Block interrupt - ldc r9, sr ! Restore SR register (with SR.BL = 1 and SR.IMASK = 0b1111) + ! Block interrupt and switch + ! register bank + ldc r8, sr ! Restore SR register (with SR.BL = 1, SR.IMASK = 0b1111, SR.RB = 1) - ! Clean exit. - mov r8, r15 ! Restore stack space. - lds.l @r15+, pr ! Restor PR register. - mov.l @r15+, r9 ! Restore r9 register. - mov.l @r15+, r8 ! Restore r8 register. + ! Restore "program" context. + ldc.l @r15+, R0_BANK ! Restore "program" r0 regsiter. + ldc.l @r15+, R1_BANK ! Restore "program" r1 regsiter. + ldc.l @r15+, R2_BANK ! Restore "program" r2 regsiter. + ldc.l @r15+, R3_BANK ! Restore "program" r3 regsiter. + ldc.l @r15+, R4_BANK ! Restore "program" r4 regsiter. + ldc.l @r15+, R5_BANK ! Restore "program" r5 regsiter. + ldc.l @r15+, R6_BANK ! Restore "program" r6 regsiter. + ldc.l @r15+, R7_BANK ! Restore "program" r7 regsiter. + mov.l @r15+, r8 ! Restore "program" r8 regsiter. + mov.l @r15+, r9 ! Restore "program" r9 regsiter. + mov.l @r15+, r10 ! Restore "program" r10 regsiter. + mov.l @r15+, r11 ! Restore "program" r11 regsiter. + mov.l @r15+, r12 ! Restore "program" r12 regsiter. + mov.l @r15+, r13 ! Restore "program" r13 regsiter. + mov.l @r15+, r14 ! Restore "program" r14 regsiter. .word 0b0100111100110110 ! Restore SGR regsiter. "ldc.l @r15+, sgr" + ldc.l @r15+, gbr ! Get GBR register. + lds.l @r15+, macl ! Get MACL register. + lds.l @r15+, mach ! Get MACH register. ldc.l @r15+, ssr ! Restore SSR regsiter. ldc.l @r15+, spc ! Restore SPC regsiter. + + ! Retore and restart clock / timers + stc spc, r4 ! (db) r4 = MODULE_START + mov.l .ubc_module_handler, r0 ! Get high level abstraction for handle hardware module. + jsr @r0 ! call ubc_module(MODULE_START) + nop + + ! Clean exit. + lds.l @r15+, pr ! Restor PR register. + mov.l @r15+, r8 ! Restore r8 register. + mov.l @r15+, r9 ! Restore r8 register. rte ! Interrupt Exit. nop ! (db) Safety first. .align 4 -.ubc_handler: .long _ubc_handler -.ubc_ccmfr: .long 0xff200600 -.icbi_addr: .long 0xa0000000 -.sr_mask: .long ~(0x300000f0) +.ubc_handler: .long _ubc_handler +.ubc_module_handler: .long _ubc_module_handler +.ubc_ccmfr: .long 0xff200600 +.icbi_addr: .long 0xa0000000 +.sr_mask: .long ~(0x300000f0) .end diff --git a/src/kernel/dbr/menu/disassembly.c b/src/kernel/dbr/menu/disassembly.c index 5d9b42a..a6f3a9b 100644 --- a/src/kernel/dbr/menu/disassembly.c +++ b/src/kernel/dbr/menu/disassembly.c @@ -1,10 +1,110 @@ #include +#include +#include #include +#include + +static uint32_t get_arg(uint16_t code, const struct opcode_s *opcode, int id) +{ + int shift; + + // Check arg mask + if (opcode->arg_mask[id] == 0x0000) + return (0); + + // Get arg shift. + shift = -1; + while (++shift < 16 && !(opcode->arg_mask[id] & (0x01 << shift))); + + // Get argument. + return ((code & opcode->arg_mask[id]) >> shift); +} + +static void display_mnemonic(ubc_session_t *session) +{ + char line[128]; + uint16_t *area; + int i; + int j; + + // Get starting area. + // TODO: update me !! + area = (void *)(session->context->spc + (session->menu.disassembly.vcursor << 1)); + + // Main Loop. + i = -1; + while (++i < DISPLAY_VLINES_MAX) + { + // Generate first part. + sprintf(line, "%8x %4x ", &area[i], area[i]); + + // Try to find opcode. + j = -1; + while (opcode_list[++j].name != NULL) + { + // Check opcode. + if ((area[i] & opcode_list[j].mask) != opcode_list[j].code) + continue; + + // Generate line via special function. + if (opcode_list[j].special != NULL) + { + opcode_list[j].special(&line[14], &area[i]); + break; + } + + // Generate common line. + sprintf(&line[14], + opcode_list[j].name, + get_arg(area[i], &opcode_list[j], 0), + get_arg(area[i], &opcode_list[j], 1), + get_arg(area[i], &opcode_list[j], 2) + ); + break; + } + + // If no opcode are found, generate "empty" line. + if (opcode_list[j].name == NULL) + sprintf(&line[14], ".word 0x%4x", area[i]); + + // Display line ! + dprint(session->menu.disassembly.hcursor, i, line); + + // Highlight break line if needed. + if ((uint32_t)&area[i] == session->context->spc) + { + dreverse( + 0, + i * (KERNEL_FONT_REAL_HEIGHT + 1), + DISPLAY_SCREEN_WIDTH, + KERNEL_FONT_REAL_HEIGHT + 1 + ); + } + } +} + +static void cursor_update(ubc_session_t *session) +{ + // Horizontal update. + if (session->key == KEY_CTRL_LEFT) + session->menu.disassembly.hcursor += 1; + if (session->key == KEY_CTRL_RIGHT) + session->menu.disassembly.hcursor -= 1; + + // Vertical update. + if (session->key == KEY_CTRL_UP) + session->menu.disassembly.vcursor -= 1; + if (session->key == KEY_CTRL_DOWN) + session->menu.disassembly.vcursor += 1; +} void menu_disassembly(ubc_session_t *session) { - // test + // Update cursor position. + cursor_update(session); + + // display ASM. dclear(); - dprint(0, 0, "Disassembly Menu !!"); + display_mnemonic(session); dupdate(); } diff --git a/src/kernel/dbr/opcode.c b/src/kernel/dbr/opcode/opcode.c similarity index 85% rename from src/kernel/dbr/opcode.c rename to src/kernel/dbr/opcode/opcode.c index 9f2abaa..aafddf0 100644 --- a/src/kernel/dbr/opcode.c +++ b/src/kernel/dbr/opcode/opcode.c @@ -3,7 +3,7 @@ // Define ALL SH3 / SH4 instructions. const struct opcode_s opcode_list[] = { { - .name = "add #h'%x,r%d", + .name = "add\t#h'%x,r%d", .mask = 0b1111000000000000, .code = 0b0111000000000000, .arg_mask = { @@ -14,7 +14,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "add r%d,r%d", + .name = "add\tr%d,r%d", .mask = 0b1111000000001111, .code = 0b0011000000001100, .arg_mask = { @@ -25,7 +25,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "addc r%d,r%d", + .name = "addc\tr%d,r%d", .mask = 0b1111000000001111, .code = 0b0011000000001110, .arg_mask = { @@ -36,7 +36,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "addv r%d,r%d", + .name = "addv\tr%d,r%d", .mask = 0b1111000000001111, .code = 0b0011000000001111, .arg_mask = { @@ -47,7 +47,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "and #h'%x,r0", + .name = "and\t#h'%x,r0", .mask = 0b1111111100000000, .code = 0b1100100100000000, .arg_mask = { @@ -58,7 +58,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "and r%d,r%d", + .name = "and\tr%d,r%d", .mask = 0b1111000000001111, .code = 0b0010000000001001, .arg_mask = { @@ -69,7 +69,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "and.b #h'%x,@(r0,GBR)", + .name = "and.b\t#h'%x,@(r0,GBR)", .mask = 0b1111111100000000, .code = 0b1100110100000000, .arg_mask = { @@ -80,7 +80,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "bf #h'%x", + .name = "bf\t#h'%x", .mask = 0b1111111100000000, .code = 0b1000101100000000, .arg_mask = { @@ -91,7 +91,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "bs/s #h'%x", + .name = "bs/s\t#h'%x", .mask = 0b1111111100000000, .code = 0b1000111100000000, .arg_mask = { @@ -102,7 +102,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "bra #h'%x", + .name = "bra\t#h'%x", .mask = 0b1111000000000000, .code = 0b1010000000000000, .arg_mask = { @@ -113,7 +113,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "braf r%d", + .name = "braf\tr%d", .mask = 0b1111000011111111, .code = 0b0000000000100011, .arg_mask = { @@ -124,7 +124,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "bsr #h'%x", + .name = "bsr\t#h'%x", .mask = 0b1111000000000000, .code = 0b1011000000000000, .arg_mask = { @@ -135,7 +135,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "bsrf r%d", + .name = "bsrf\tr%d", .mask = 0b1111000011111111, .code = 0b0000000000000011, .arg_mask = { @@ -146,7 +146,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "bt #h'%x", + .name = "bt\t#h'%x", .mask = 0b1111111100000000, .code = 0b1000100100000000, .arg_mask = { @@ -157,7 +157,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "bt/s #h'%x", + .name = "bt/s\t#h'%x", .mask = 0b1111111100000000, .code = 0b1000110100000000, .arg_mask = { @@ -201,7 +201,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "cmp/eq #h'%x,r0", + .name = "cmp/eq\t#h'%x,r0", .mask = 0b1111111100000000, .code = 0b1000100000000000, .arg_mask = { @@ -212,7 +212,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "cmp/eq r%d,r%d", + .name = "cmp/eq\tr%d,r%d", .mask = 0b1111000000001111, .code = 0b0011000000000000, .arg_mask = { @@ -223,7 +223,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "cmp/ge r%d,r%d", + .name = "cmp/ge\tr%d,r%d", .mask = 0b1111000000001111, .code = 0b0011000000000011, .arg_mask = { @@ -234,7 +234,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "cmp/gt r%d,r%d", + .name = "cmp/gt\tr%d,r%d", .mask = 0b1111000000001111, .code = 0b0011000000000111, .arg_mask = { @@ -245,7 +245,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "cmp/hi r%d,r%d", + .name = "cmp/hi\tr%d,r%d", .mask = 0b1111000000001111, .code = 0b0011000000000110, .arg_mask = { @@ -256,7 +256,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "cmp/hs r%d,r%d", + .name = "cmp/hs\tr%d,r%d", .mask = 0b1111000000001111, .code = 0b0011000000000010, .arg_mask = { @@ -267,7 +267,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "cmp/pl r%d", + .name = "cmp/pl\tr%d", .mask = 0b1111000011111111, .code = 0b0100000000010101, .arg_mask = { @@ -278,7 +278,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "cmp/pz r%d", + .name = "cmp/pz\tr%d", .mask = 0b1111000011111111, .code = 0b0100000000010001, .arg_mask = { @@ -289,7 +289,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "cmp/str r%d,r%d", + .name = "cmp/str\tr%d,r%d", .mask = 0b1111000000001111, .code = 0b0010000000001100, .arg_mask = { @@ -300,7 +300,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "div0s r%d,r%d", + .name = "div0s\tr%d,r%d", .mask = 0b1111000000001111, .code = 0b0010000000000111, .arg_mask = { @@ -322,7 +322,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "div1 r%d,r%d", + .name = "div1\tr%d,r%d", .mask = 0b1111000000001111, .code = 0b0011000000000100, .arg_mask = { @@ -333,7 +333,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "dmuls.l r%d,r%d", + .name = "dmuls.l\tr%d,r%d", .mask = 0b1111000000001111, .code = 0b0011000000001101, .arg_mask = { @@ -344,7 +344,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "dmulu.l r%d,r%d", + .name = "dmulu.l\tr%d,r%d", .mask = 0b1111000000001111, .code = 0b0011000000000101, .arg_mask = { @@ -355,7 +355,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "dt r%d", + .name = "dt\tr%d", .mask = 0b1111000011111111, .code = 0b0100000000010000, .arg_mask = { @@ -366,7 +366,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "exts.b r%d,r%d", + .name = "exts.b\tr%d,r%d", .mask = 0b1111000000001111, .code = 0b0110000000001110, .arg_mask = { @@ -377,7 +377,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "exts.w r%d,r%d", + .name = "exts.w\tr%d,r%d", .mask = 0b1111000000001111, .code = 0b0110000000001111, .arg_mask = { @@ -388,7 +388,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "extu.b r%d,r%d", + .name = "extu.b\tr%d,r%d", .mask = 0b1111000000001111, .code = 0b0110000000001100, .arg_mask = { @@ -399,7 +399,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "extu.w r%d,r%d", + .name = "extu.w\tr%d,r%d", .mask = 0b1111000000001111, .code = 0b0110000000001101, .arg_mask = { @@ -410,7 +410,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "fabs fr%d", + .name = "fabs\tfr%d", .mask = 0b1111000011111111, .code = 0b1111000001011101, .arg_mask = { @@ -421,7 +421,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "fadd fr%d,fr%d", + .name = "fadd\tfr%d,fr%d", .mask = 0b1111000000001111, .code = 0b1111000000000000, .arg_mask = { @@ -432,7 +432,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "fcmp/eq fr%d,fr%d", + .name = "fcmp/eq\tfr%d,fr%d", .mask = 0b1111000000001111, .code = 0b1111000000000100, .arg_mask = { @@ -443,7 +443,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "fcmp/gt fr%d,fr%d", + .name = "fcmp/gt\tfr%d,fr%d", .mask = 0b1111000000001111, .code = 0b1111000000000101, .arg_mask = { @@ -454,7 +454,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "fdiv fr%d,fr%d", + .name = "fdiv\tfr%d,fr%d", .mask = 0b1111000000001111, .code = 0b1111000000000011, .arg_mask = { @@ -465,7 +465,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "fldi0 fr%d", + .name = "fldi0\tfr%d", .mask = 0b1111000011111111, .code = 0b1111000010001101, .arg_mask = { @@ -476,7 +476,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "fldi1 fr%d", + .name = "fldi1\tfr%d", .mask = 0b1111000011111111, .code = 0b1111000010011101, .arg_mask = { @@ -487,7 +487,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "flds fr%d,FPUL", + .name = "flds\tfr%d,FPUL", .mask = 0b1111000011111111, .code = 0b1111000000011101, .arg_mask = { @@ -498,7 +498,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "float FPUL,fr%d", + .name = "float\tFPUL,fr%d", .mask = 0b1111000011111111, .code = 0b1111000000101101, .arg_mask = { @@ -509,7 +509,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "fmac FR0,fr%d,fr%d", + .name = "fmac\tFR0,fr%d,fr%d", .mask = 0b1111000000001111, .code = 0b1111000000001110, .arg_mask = { @@ -520,7 +520,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "fmov fr%d,fr%d", + .name = "fmov\tfr%d,fr%d", .mask = 0b1111000000001111, .code = 0b1111000000001100, .arg_mask = { @@ -531,7 +531,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "fmov.s @(r0,r%d),fr%d", + .name = "fmov.s\t@(r0,r%d),fr%d", .mask = 0b1111000000001111, .code = 0b1111000000000110, .arg_mask = { @@ -542,7 +542,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "fmov.s @r%d+,fr%d", + .name = "fmov.s\t@r%d+,fr%d", .mask = 0b1111000000001111, .code = 0b1111000000001001, .arg_mask = { @@ -553,7 +553,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "fmov.s @r%d,fr%d", + .name = "fmov.s\t@r%d,fr%d", .mask = 0b1111000000001111, .code = 0b1111000000001000, .arg_mask = { @@ -564,7 +564,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "fmov.s fr%d,@(r0,r%d)", + .name = "fmov.s\tfr%d,@(r0,r%d)", .mask = 0b1111000000001111, .code = 0b1111000000000111, .arg_mask = { @@ -575,7 +575,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "fmov.s fr%d,@-r%d", + .name = "fmov.s\tfr%d,@-r%d", .mask = 0b1111000000001111, .code = 0b1111000000001011, .arg_mask = { @@ -586,7 +586,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "fmov.s fr%d,@r%d", + .name = "fmov.s\tfr%d,@r%d", .mask = 0b1111000000001111, .code = 0b1111000000001010, .arg_mask = { @@ -597,7 +597,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "fmul fr%d,fr%d", + .name = "fmul\tfr%d,fr%d", .mask = 0b1111000000001111, .code = 0b1111000000000010, .arg_mask = { @@ -608,7 +608,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "fneg fr%d", + .name = "fneg\tfr%d", .mask = 0b1111000011111111, .code = 0b1111000001001101, .arg_mask = { @@ -619,7 +619,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "fsqrt fr%d", + .name = "fsqrt\tfr%d", .mask = 0b1111000011111111, .code = 0b1111000001101101, .arg_mask = { @@ -630,7 +630,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "fsts FPUL,fr%d", + .name = "fsts\tFPUL,fr%d", .mask = 0b1111000011111111, .code = 0b1111000000001101, .arg_mask = { @@ -641,7 +641,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "fsub fr%d,fr%d", + .name = "fsub\tfr%d,fr%d", .mask = 0b1111000000001111, .code = 0b1111000000000001, .arg_mask = { @@ -652,7 +652,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "ftrc fr%d,FPUL", + .name = "ftrc\tfr%d,FPUL", .mask = 0b1111000011111111, .code = 0b1111000000111101, .arg_mask = { @@ -663,7 +663,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "jmp @r%d", + .name = "jmp\t@r%d", .mask = 0b1111000011111111, .code = 0b0100000000101011, .arg_mask = { @@ -674,7 +674,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "jsr @r%d", + .name = "jsr\t@r%d", .mask = 0b1111000011111111, .code = 0b0100000000001011, .arg_mask = { @@ -685,7 +685,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "ldc r%d,GBR", + .name = "ldc\tr%d,GBR", .mask = 0b1111000011111111, .code = 0b0100000000011110, .arg_mask = { @@ -696,7 +696,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "ldc r%d,SR", + .name = "ldc\tr%d,SR", .mask = 0b1111000011111111, .code = 0b0100000000001110, .arg_mask = { @@ -707,7 +707,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "ldc r%d,VBR", + .name = "ldc\tr%d,VBR", .mask = 0b1111000011111111, .code = 0b0100000000101110, .arg_mask = { @@ -718,7 +718,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "ldc r%d,SSR", + .name = "ldc\tr%d,SSR", .mask = 0b1111000011111111, .code = 0b0100000000111110, .arg_mask = { @@ -729,7 +729,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "ldc r%d,SPC", + .name = "ldc\tr%d,SPC", .mask = 0b1111000011111111, .code = 0b0100000001001110, .arg_mask = { @@ -740,7 +740,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "ldc r%d,MOD", + .name = "ldc\tr%d,MOD", .mask = 0b1111000011111111, .code = 0b0100000001011110, .arg_mask = { @@ -752,7 +752,7 @@ const struct opcode_s opcode_list[] = { }, //FIXME: find difference between "ldc rm,RE" and "ldc rm,RS" { - .name = "ldc r%d,RE/RS", + .name = "ldc\tr%d,RE/RS", .mask = 0b1111000011111111, .code = 0b0100000001101110, .arg_mask = { @@ -763,7 +763,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "ldc r%d,R0_BANK", + .name = "ldc\tr%d,R0_BANK", .mask = 0b1111000011111111, .code = 0b0100000010001110, .arg_mask = { @@ -774,7 +774,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "ldc r%d,R1_BANK", + .name = "ldc\tr%d,R1_BANK", .mask = 0b1111000011111111, .code = 0b0100000010011110, .arg_mask = { @@ -785,7 +785,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "ldc r%d,R2_BANK", + .name = "ldc\tr%d,R2_BANK", .mask = 0b1111000011111111, .code = 0b0100000010101110, .arg_mask ={ @@ -796,7 +796,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "ldc r%d,R3_BANK", + .name = "ldc\tr%d,R3_BANK", .mask = 0b1111000011111111, .code = 0b0100000010111110, .arg_mask ={ @@ -807,7 +807,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "ldc r%d,R4_BANK", + .name = "ldc\tr%d,R4_BANK", .mask = 0b1111000011111111, .code = 0b0100000011001110, .arg_mask ={ @@ -818,7 +818,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "ldc r%d,R5_BANK", + .name = "ldc\tr%d,R5_BANK", .mask = 0b1111000011111111, .code = 0b0100000011011110, .arg_mask ={ @@ -829,7 +829,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "ldc r%d,R6_BANK", + .name = "ldc\tr%d,R6_BANK", .mask = 0b1111000011111111, .code = 0b0100000011101110, .arg_mask ={ @@ -840,7 +840,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "ldc r%d,R7_BANK", + .name = "ldc\tr%d,R7_BANK", .mask = 0b1111000011111111, .code = 0b0100000011111110, .arg_mask ={ @@ -851,7 +851,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "ldc.l @r%d+,GBR", + .name = "ldc.l\t@r%d+,GBR", .mask = 0b1111000011111111, .code = 0b0100000000010111, .arg_mask ={ @@ -862,7 +862,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "ldc.l @r%d+,SR", + .name = "ldc.l\t@r%d+,SR", .mask = 0b1111000011111111, .code = 0b0100000000000111, .arg_mask ={ @@ -873,7 +873,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "ldc.l @r%d+,VBR", + .name = "ldc.l\t@r%d+,VBR", .mask = 0b1111000011111111, .code = 0b0100000000100111, .arg_mask ={ @@ -884,7 +884,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "ldc.l @r%d+,SSR", + .name = "ldc.l\t@r%d+,SSR", .mask = 0b1111000011111111, .code = 0b0100000000110111, .arg_mask ={ @@ -895,7 +895,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "ldc.l @r%d+,SPC", + .name = "ldc.l\t@r%d+,SPC", .mask = 0b1111000011111111, .code = 0b0100000001000111, .arg_mask ={ @@ -906,7 +906,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "ldc.l @r%d+,MOD", + .name = "ldc.l\t@r%d+,MOD", .mask = 0b1111000011111111, .code = 0b0100000001010111, .arg_mask ={ @@ -917,7 +917,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "ldc.l @r%d+,RE", + .name = "ldc.l\t@r%d+,RE", .mask = 0b1111000011111111, .code = 0b0100000001110111, .arg_mask ={ @@ -928,7 +928,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "ldc.l @r%d+,RS", + .name = "ldc.l\t@r%d+,RS", .mask = 0b1111000011111111, .code = 0b0100000001100111, .arg_mask ={ @@ -939,7 +939,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "ldc.l @r%d+,R0_BANK", + .name = "ldc.l\t@r%d+,R0_BANK", .mask = 0b1111000011111111, .code = 0b0100000010000111, .arg_mask ={ @@ -950,7 +950,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "ldc.l @r%d+,R1_BANK", + .name = "ldc.l\t@r%d+,R1_BANK", .mask = 0b1111000011111111, .code = 0b0100000010010111, .arg_mask ={ @@ -961,7 +961,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "ldc.l @r%d+,R2_BANK", + .name = "ldc.l\t@r%d+,R2_BANK", .mask = 0b1111000011111111, .code = 0b0100000010100111, .arg_mask ={ @@ -972,7 +972,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "ldc.l @%d+,R3_BANK", + .name = "ldc.l\t@%d+,R3_BANK", .mask = 0b1111000011111111, .code = 0b0100000010110111, .arg_mask ={ @@ -983,7 +983,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "ldc.l @r%d+,R4_BANK", + .name = "ldc.l\t@r%d+,R4_BANK", .mask = 0b1111000011111111, .code = 0b0100000011000111, .arg_mask ={ @@ -994,7 +994,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "ldc.l @r%d+,R5_BANK", + .name = "ldc.l\t@r%d+,R5_BANK", .mask = 0b1111000011111111, .code = 0b0100000011010111, .arg_mask ={ @@ -1005,7 +1005,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "ldc.l @r%d+,R7_BANK", + .name = "ldc.l\t@r%d+,R7_BANK", .mask = 0b1111000011111111, .code = 0b0100000011100111, .arg_mask ={ @@ -1016,7 +1016,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "ldc.l @r%d+,R7_BANK", + .name = "ldc.l\t@r%d+,R7_BANK", .mask = 0b1111000011111111, .code = 0b0100000011110111, .arg_mask ={ @@ -1027,7 +1027,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "ldre @(#h'%x,PC)", + .name = "ldre\t@(#h'%x,PC)", .mask = 0b1111111100000000, .code = 0b1000111000000000, .arg_mask ={ @@ -1038,7 +1038,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "ldrs @(#h'%x,PC)", + .name = "ldrs\t@(#h'%x,PC)", .mask = 0b1111111100000000, .code = 0b1000110000000000, .arg_mask ={ @@ -1049,7 +1049,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "lds r%d,FPSCR", + .name = "lds\tr%d,FPSCR", .mask = 0b1111000011111111, .code = 0b0100000001101010, .arg_mask ={ @@ -1060,7 +1060,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "lds r%d,FPUL", + .name = "lds\tr%d,FPUL", .mask = 0b1111000011111111, .code = 0b0100000001011010, .arg_mask ={ @@ -1071,7 +1071,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "lds r%d,MACH", + .name = "lds\tr%d,MACH", .mask = 0b1111000011111111, .code = 0b0100000000001010, .arg_mask ={ @@ -1082,7 +1082,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "lds r%d,MACL", + .name = "lds\tr%d,MACL", .mask = 0b1111000011111111, .code = 0b0100000000011010, .arg_mask ={ @@ -1093,7 +1093,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "lds r%d,PR", + .name = "lds\tr%d,PR", .mask = 0b1111000011111111, .code = 0b0100000000101010, .arg_mask ={ @@ -1104,7 +1104,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "lds r%d,A0", + .name = "lds\tr%d,A0", .mask = 0b1111000011111111, .code = 0b0100000001101010, .arg_mask ={ @@ -1115,7 +1115,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "lds r%d,DSR", + .name = "lds\tr%d,DSR", .mask = 0b1111000011111111, .code = 0b0100000001111010, .arg_mask ={ @@ -1126,7 +1126,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "lds r%d,X0", + .name = "lds\tr%d,X0", .mask = 0b1111000011111111, .code = 0b01000000010001010, .arg_mask ={ @@ -1137,7 +1137,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "lds r%d,X1", + .name = "lds\tr%d,X1", .mask = 0b1111000011111111, .code = 0b0100000010011010, .arg_mask ={ @@ -1148,7 +1148,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "lds r%d,Y0", + .name = "lds\tr%d,Y0", .mask = 0b1111000011111111, .code = 0b0100000010101010, .arg_mask ={ @@ -1159,7 +1159,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "lds r%d,Y1", + .name = "lds\tr%d,Y1", .mask = 0b1111000011111111, .code = 0b0100000010111010, .arg_mask ={ @@ -1170,7 +1170,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "lds.l @r%d+,FPSCR", + .name = "lds.l\t@r%d+,FPSCR", .mask = 0b1111000011111111, .code = 0b0100000001100110, .arg_mask ={ @@ -1181,7 +1181,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "lds.l @r%d+,FPUL", + .name = "lds.l\t@r%d+,FPUL", .mask = 0b1111000011111111, .code = 0b0100000001010110, .arg_mask ={ @@ -1192,7 +1192,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "lds.l @r%d+,MACH", + .name = "lds.l\t@r%d+,MACH", .mask = 0b1111000011111111, .code = 0b0100000000000110, .arg_mask ={ @@ -1203,7 +1203,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "lds.l @r%d+,MACL", + .name = "lds.l\t@r%d+,MACL", .mask = 0b1111000011111111, .code = 0b0100000000010110, .arg_mask ={ @@ -1214,7 +1214,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "lds.l @r%d+,PR", + .name = "lds.l\t@r%d+,PR", .mask = 0b1111000011111111, .code = 0b0100000000100110, .arg_mask ={ @@ -1225,7 +1225,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "lds.l @r%d+,DSR", + .name = "lds.l\t@r%d+,DSR", .mask = 0b1111000011111111, .code = 0b0100000001100110, .arg_mask ={ @@ -1236,7 +1236,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "lds.l @r%d+,A0", + .name = "lds.l\t@r%d+,A0", .mask = 0b1111000011111111, .code = 0b0100000001110110, .arg_mask ={ @@ -1247,7 +1247,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "lds.l @r%d+,X0", + .name = "lds.l\t@r%d+,X0", .mask = 0b1111000011111111, .code = 0b0100000001000110, .arg_mask ={ @@ -1258,7 +1258,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "lds.l @r%d+,X1", + .name = "lds.l\t@r%d+,X1", .mask = 0b1111000011111111, .code = 0b0100000010010110, .arg_mask ={ @@ -1269,7 +1269,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "lds.l @r%d+,Y0", + .name = "lds.l\t@r%d+,Y0", .mask = 0b1111000011111111, .code = 0b0100000010100110, .arg_mask ={ @@ -1280,7 +1280,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "lds.l @r%d+,Y1", + .name = "lds.l\t@r%d+,Y1", .mask = 0b1111000011111111, .code = 0b0100000010110110, .arg_mask ={ @@ -1302,7 +1302,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "mac.l @r%d+,@r%d+", + .name = "mac.l\t@r%d+,@r%d+", .mask = 0b1111000000001111, .code = 0b0000000000001111, .arg_mask ={ @@ -1313,7 +1313,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "mac.w @r%d+,@r%d+", + .name = "mac.w\t@r%d+,@r%d+", .mask = 0b1111000000001111, .code = 0b0100000000001111, .arg_mask ={ @@ -1324,7 +1324,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "mov #h'%x,r%d", + .name = "mov\t#h'%x,r%d", .mask = 0b1111000000000000, .code = 0b1110000000000000, .arg_mask ={ @@ -1335,7 +1335,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "mov r%d,r%d", + .name = "mov\tr%d,r%d", .mask = 0b1111000000001111, .code = 0b0110000000000011, .arg_mask ={ @@ -1346,7 +1346,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "mov.b @(#h'%x,GBR),r0", + .name = "mov.b\t@(#h'%x,GBR),r0", .mask = 0b1111111100000000, .code = 0b1100010000000000, .arg_mask ={ @@ -1357,7 +1357,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "mov.b @(#h'%x,r%d),r0", + .name = "mov.b\t@(#h'%x,r%d),r0", .mask = 0b1111111100000000, .code = 0b1000010000000000, .arg_mask ={ @@ -1368,7 +1368,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "mov.b @(r0,r%d),r%d", + .name = "mov.b\t@(r0,r%d),r%d", .mask = 0b1111000000001111, .code = 0b0000000000001100, .arg_mask ={ @@ -1379,7 +1379,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "mov.b @r%d+,r%d", + .name = "mov.b\t@r%d+,r%d", .mask = 0b1111000000001111, .code = 0b0110000000000100, .arg_mask ={ @@ -1390,7 +1390,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "mov.b @r%d,r%d", + .name = "mov.b\t@r%d,r%d", .mask = 0b1111000000001111, .code = 0b0110000000000000, .arg_mask ={ @@ -1401,7 +1401,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "mov.b r0,@(#h'%x,GBR)", + .name = "mov.b\tr0,@(#h'%x,GBR)", .mask = 0b1111111100000000, .code = 0b1100000000000000, .arg_mask ={ @@ -1412,7 +1412,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "mov.b r0,@(#h'%x,r%d)", + .name = "mov.b\tr0,@(#h'%x,r%d)", .mask = 0b1111111100000000, .code = 0b1000000000000000, .arg_mask ={ @@ -1423,7 +1423,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "mov.b r%d,@(r0,r%d)", + .name = "mov.b\tr%d,@(r0,r%d)", .mask = 0b1111000000000000, .code = 0b0000000000000100, .arg_mask ={ @@ -1434,7 +1434,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "mov.b r%d,@-r%d", + .name = "mov.b\tr%d,@-r%d", .mask = 0b1111000000000000, .code = 0b0010000000000100, .arg_mask ={ @@ -1445,7 +1445,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "mov.b r%d,@r%d", + .name = "mov.b\tr%d,@r%d", .mask = 0b1111000000001111, .code = 0b0010000000000000, .arg_mask ={ @@ -1456,7 +1456,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "mov.l @(#h'%x,GBR),r0", + .name = "mov.l\t@(#h'%x,GBR),r0", .mask = 0b1111111100000000, .code = 0b1100011000000000, .arg_mask ={ @@ -1467,7 +1467,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "mov.l @(#h'%x,PC),r%d", + .name = "mov.l\t@(#h'%x,PC),r%d", .mask = 0b1111000000000000, .code = 0b1101000000000000, .arg_mask ={ @@ -1478,7 +1478,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "mov.l @(#h'%x,r%d),r%d", + .name = "mov.l\t@(#h'%x,r%d),r%d", .mask = 0b1111000000000000, .code = 0b0101000000000000, .arg_mask ={ @@ -1489,7 +1489,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "mov.l @(r0,r%d),r%d", + .name = "mov.l\t@(r0,r%d),r%d", .mask = 0b1111000000001111, .code = 0b0000000000001110, .arg_mask ={ @@ -1500,7 +1500,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "mov.l @r%d+,r%d", + .name = "mov.l\t@r%d+,r%d", .mask = 0b1111000000001111, .code = 0b0110000000000110, .arg_mask ={ @@ -1511,7 +1511,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "mov.l @r%d,r%d", + .name = "mov.l\t@r%d,r%d", .mask = 0b1111000000001111, .code = 0b0110000000000010, .arg_mask ={ @@ -1522,7 +1522,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "mov.l r0,@(#h'%x,GBR)", + .name = "mov.l\tr0,@(#h'%x,GBR)", .mask = 0b1111111100000000, .code = 0b1100001000000000, .arg_mask ={ @@ -1533,7 +1533,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "mov.l r%d,@(#h'%x,r%d)", + .name = "mov.l\tr%d,@(#h'%x,r%d)", .mask = 0b1111000000000000, .code = 0b0001000000000000, .arg_mask ={ @@ -1544,7 +1544,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "mov.l r%d,@(r0,r%d)", + .name = "mov.l\tr%d,@(r0,r%d)", .mask = 0b1111000000001111, .code = 0b0000000000000110, .arg_mask ={ @@ -1555,7 +1555,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "mov.l r%d,@-r%d", + .name = "mov.l\tr%d,@-r%d", .mask = 0b1111000000001111, .code = 0b0010000000000110, .arg_mask ={ @@ -1566,7 +1566,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "mov.l r%d,@r%d", + .name = "mov.l\tr%d,@r%d", .mask = 0b1111000000001111, .code = 0b0010000000000010, .arg_mask ={ @@ -1577,7 +1577,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "mov.w @(#h'%x,GBR),r0", + .name = "mov.w\t@(#h'%x,GBR),r0", .mask = 0b1111111100000000, .code = 0b1100010100000000, .arg_mask ={ @@ -1588,7 +1588,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "mov.w @(#h'%x,PC),r%d", + .name = "mov.w\t@(#h'%x,PC),r%d", .mask = 0b1111000000000000, .code = 0b1001000000000000, .arg_mask ={ @@ -1599,7 +1599,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "mov.w @(r0,r%d),r%d", + .name = "mov.w\t@(r0,r%d),r%d", .mask = 0b1111000000001111, .code = 0b0000000000001101, .arg_mask ={ @@ -1610,7 +1610,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "mov.w @r%d+,r%d", + .name = "mov.w\t@r%d+,r%d", .mask = 0b1111000000001111, .code = 0b0110000000000101, .arg_mask ={ @@ -1621,7 +1621,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "mov.w @r%d,r%d", + .name = "mov.w\t@r%d,r%d", .mask = 0b1111000000001111, .code = 0b0110000000000001, .arg_mask ={ @@ -1632,7 +1632,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "mov.w r0,@(#h'%x,GBR)", + .name = "mov.w\tr0,@(#h'%x,GBR)", .mask = 0b1111111100000000, .code = 0b1100000100000000, .arg_mask ={ @@ -1643,7 +1643,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "mov.w r0,@(#h'%x,,r%d)", + .name = "mov.w\tr0,@(#h'%x,,r%d)", .mask = 0b1111111100000000, .code = 0b1000000100000000, .arg_mask ={ @@ -1654,7 +1654,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "mov.w r%d,@(r0,r%d)", + .name = "mov.w\tr%d,@(r0,r%d)", .mask = 0b1111000000001111, .code = 0b0000000000000101, .arg_mask ={ @@ -1665,7 +1665,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "mov.w r%d,@-r%d", + .name = "mov.w\tr%d,@-r%d", .mask = 0b1111000000001111, .code = 0b0010000000000101, .arg_mask ={ @@ -1676,7 +1676,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "mov.w r%d,@r%d", + .name = "mov.w\tr%d,@r%d", .mask = 0b1111000000001111, .code = 0b0010000000000001, .arg_mask ={ @@ -1687,7 +1687,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "mova @(#h'%x,PC),r0", + .name = "mova\t@(#h'%x,PC),r0", .mask = 0b1111111100000000, .code = 0b1100011100000000, .arg_mask ={ @@ -1698,7 +1698,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "movt r%d", + .name = "movt\tr%d", .mask = 0b1111000011111111, .code = 0b0000000000101001, .arg_mask ={ @@ -1709,7 +1709,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "mul.l r%d,r%d", + .name = "mul.l\tr%d,r%d", .mask = 0b1111000000001111, .code = 0b0000000000000111, .arg_mask ={ @@ -1720,7 +1720,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "muls.w r%d,r%d", + .name = "muls.w\tr%d,r%d", .mask = 0b1111000000001111, .code = 0b0010000000001111, .arg_mask ={ @@ -1731,7 +1731,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "mulu.w r%d,r%d", + .name = "mulu.w\tr%d,r%d", .mask = 0b1111000000001111, .code = 0b0010000000001110, .arg_mask ={ @@ -1742,7 +1742,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "neg r%d,@-r%d", + .name = "neg\tr%d,@-r%d", .mask = 0b1111000000001111, .code = 0b0110000000001011, .arg_mask ={ @@ -1753,7 +1753,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "negc r%d,r%d", + .name = "negc\tr%d,r%d", .mask = 0b1111000000001111, .code = 0b0110000000001010, .arg_mask ={ @@ -1775,7 +1775,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "not r%d,r%d", + .name = "not\tr%d,r%d", .mask = 0b1111000000001111, .code = 0b0110000000000111, .arg_mask ={ @@ -1786,7 +1786,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "or #h'%x,r0", + .name = "or\t#h'%x,r0", .mask = 0b1111111100000000, .code = 0b1100101100000000, .arg_mask ={ @@ -1797,7 +1797,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "or r%d,r%d", + .name = "or\tr%d,r%d", .mask = 0b1111000000001111, .code = 0b0010000000001011, .arg_mask ={ @@ -1808,7 +1808,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "or.b #h'%x,@(r0,GBR)", + .name = "or.b\t#h'%x,@(r0,GBR)", .mask = 0b1111111100000000, .code = 0b1100111100000000, .arg_mask ={ @@ -1819,7 +1819,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "pref @r%d", + .name = "pref\t@r%d", .mask = 0b1111000011111111, .code = 0b0000000010000011, .arg_mask ={ @@ -1830,7 +1830,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "rotcl r%d", + .name = "rotcl\tr%d", .mask = 0b1111000011111111, .code = 0b0100000000100100, .arg_mask ={ @@ -1841,7 +1841,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "rotcr r%d", + .name = "rotcr\tr%d", .mask = 0b1111000011111111, .code = 0b0100000000100101, .arg_mask ={ @@ -1852,7 +1852,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "rotl r%d", + .name = "rotl\tr%d", .mask = 0b1111000011111111, .code = 0b0100000000000100, .arg_mask ={ @@ -1863,7 +1863,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "rotr r%d", + .name = "rotr\tr%d", .mask = 0b1111000011111111, .code = 0b0100000000000101, .arg_mask ={ @@ -1896,7 +1896,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "setrc r%d", + .name = "setrc\tr%d", .mask = 0b1111000011111111, .code = 0b0100000000010100, .arg_mask ={ @@ -1907,7 +1907,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "setrc #h'%x", + .name = "setrc\t#h'%x", .mask = 0b1111111100000000, .code = 0b1000001000000000, .arg_mask ={ @@ -1940,7 +1940,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "shad r%d,r%d", + .name = "shad\tr%d,r%d", .mask = 0b1111000000001111, .code = 0b0100000000001100, .arg_mask ={ @@ -1951,7 +1951,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "shal r%d", + .name = "shal\tr%d", .mask = 0b1111000011111111, .code = 0b0100000000100000, .arg_mask ={ @@ -1962,7 +1962,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "shar r%d", + .name = "shar\tr%d", .mask = 0b1111000011111111, .code = 0b0100000000100001, .arg_mask ={ @@ -1973,7 +1973,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "shld r%d,r%d", + .name = "shld\tr%d,r%d", .mask = 0b1111000000001111, .code = 0b0100000000001101, .arg_mask ={ @@ -1984,7 +1984,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "shll r%d", + .name = "shll\tr%d", .mask = 0b1111000011111111, .code = 0b0100000000000000, .arg_mask ={ @@ -1995,7 +1995,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "shll2 r%d", + .name = "shll2\tr%d", .mask = 0b1111000011111111, .code = 0b0100000000001000, .arg_mask ={ @@ -2006,7 +2006,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "shll8 r%d", + .name = "shll8\tr%d", .mask = 0b1111000011111111, .code = 0b0100000000011000, .arg_mask ={ @@ -2017,7 +2017,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "shll16 r%d", + .name = "shll16\tr%d", .mask = 0b1111000011111111, .code = 0b0100000000101000, .arg_mask ={ @@ -2028,7 +2028,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "shlr r%d", + .name = "shlr\tr%d", .mask = 0b1111000011111111, .code = 0b0100000000000001, .arg_mask ={ @@ -2039,7 +2039,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "shlr2 r%d", + .name = "shlr2\tr%d", .mask = 0b1111000011111111, .code = 0b0100000000001001, .arg_mask ={ @@ -2050,7 +2050,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "shlr8 r%d", + .name = "shlr8\tr%d", .mask = 0b1111000011111111, .code = 0b0100000000011001, .arg_mask ={ @@ -2061,7 +2061,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "shlr16 r%d", + .name = "shlr16\tr%d", .mask = 0b1111000011111111, .code = 0b0100000000101001, .arg_mask ={ @@ -2083,7 +2083,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "stc GBR,r%d", + .name = "stc\tGBR,r%d", .mask = 0b1111000011111111, .code = 0b0000000000010010, .arg_mask ={ @@ -2094,7 +2094,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "stc SR,r%d", + .name = "stc\tSR,r%d", .mask = 0b1111000011111111, .code = 0b0000000000000010, .arg_mask ={ @@ -2105,7 +2105,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "stc VBR,r%d", + .name = "stc\tVBR,r%d", .mask = 0b1111000011111111, .code = 0b0000000000100010, .arg_mask ={ @@ -2116,7 +2116,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "stc SSR,r%d", + .name = "stc\tSSR,r%d", .mask = 0b1111000011111111, .code = 0b0000000000110010, .arg_mask ={ @@ -2127,7 +2127,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "stc SPC,r%d", + .name = "stc\tSPC,r%d", .mask = 0b1111000011111111, .code = 0b0000000001000010, .arg_mask ={ @@ -2138,7 +2138,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "stc MOD,r%d", + .name = "stc\tMOD,r%d", .mask = 0b1111000011111111, .code = 0b0000000001010010, .arg_mask ={ @@ -2149,7 +2149,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "stc RE,r%d", + .name = "stc\tRE,r%d", .mask = 0b1111000011111111, .code = 0b0000000001110010, .arg_mask ={ @@ -2160,7 +2160,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "stc RS,r%d", + .name = "stc\tRS,r%d", .mask = 0b1111000011111111, .code = 0b0000000001100010, .arg_mask ={ @@ -2171,7 +2171,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "stc R0_BANK,r%d", + .name = "stc\tR0_BANK,r%d", .mask = 0b1111000011111111, .code = 0b0000000010000010, .arg_mask ={ @@ -2182,7 +2182,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "stc R1_BANK,r%d", + .name = "stc\tR1_BANK,r%d", .mask = 0b1111000011111111, .code = 0b0000000010010010, .arg_mask ={ @@ -2193,7 +2193,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "stc R2_BANK,r%d", + .name = "stc\tR2_BANK,r%d", .mask = 0b1111000011111111, .code = 0b0000000010100010, .arg_mask ={ @@ -2204,7 +2204,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "stc R3_BANK,r%d", + .name = "stc\tR3_BANK,r%d", .mask = 0b1111000011111111, .code = 0b0000000010110010, .arg_mask ={ @@ -2215,7 +2215,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "stc R4_BANK,r%d", + .name = "stc\tR4_BANK,r%d", .mask = 0b1111000011111111, .code = 0b0000000011000010, .arg_mask ={ @@ -2226,7 +2226,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "stc R5_BANK,r%d", + .name = "stc\tR5_BANK,r%d", .mask = 0b1111000011111111, .code = 0b0000000011010010, .arg_mask ={ @@ -2237,7 +2237,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "stc R6_BANK,r%d", + .name = "stc\tR6_BANK,r%d", .mask = 0b1111000011111111, .code = 0b0000000011100010, .arg_mask ={ @@ -2248,7 +2248,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "stc R7_BANK,r%d", + .name = "stc\tR7_BANK,r%d", .mask = 0b1111000011111111, .code = 0b0000000011110010, .arg_mask ={ @@ -2259,7 +2259,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "stc.l GBR,@r-%d", + .name = "stc.l\tGBR,@r-%d", .mask = 0b1111000011111111, .code = 0b0100000000010011, .arg_mask ={ @@ -2270,7 +2270,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "stc.l SR,@r-%d", + .name = "stc.l\tSR,@r-%d", .mask = 0b1111000011111111, .code = 0b0100000000000011, .arg_mask ={ @@ -2281,7 +2281,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "stc.l VBR,@r-%d", + .name = "stc.l\tVBR,@r-%d", .mask = 0b1111000011111111, .code = 0b0100000000100011, .arg_mask ={ @@ -2292,7 +2292,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "stc.l SSR,@r-%d", + .name = "stc.l\tSSR,@r-%d", .mask = 0b1111000011111111, .code = 0b0100000000110011, .arg_mask ={ @@ -2303,7 +2303,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "stc.l SPC,@r-%d", + .name = "stc.l\tSPC,@r-%d", .mask = 0b1111000011111111, .code = 0b0100000001000011, .arg_mask ={ @@ -2314,7 +2314,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "stc.l MOD,@r-%d", + .name = "stc.l\tMOD,@r-%d", .mask = 0b1111000011111111, .code = 0b0100000001010011, .arg_mask ={ @@ -2325,7 +2325,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "stc.l RE,@r-%d", + .name = "stc.l\tRE,@r-%d", .mask = 0b1111000011111111, .code = 0b0100000001110011, .arg_mask ={ @@ -2336,7 +2336,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "stc.l RS,@r-%d", + .name = "stc.l\tRS,@r-%d", .mask = 0b1111000011111111, .code = 0b0100000001100011, .arg_mask ={ @@ -2347,7 +2347,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "stc.l R0_BANK,@r-%d", + .name = "stc.l\tR0_BANK,@r-%d", .mask = 0b1111000011111111, .code = 0b0100000010000011, .arg_mask ={ @@ -2358,7 +2358,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "stc.l R1_BANK,@r-%d", + .name = "stc.l\tR1_BANK,@r-%d", .mask = 0b1111000011111111, .code = 0b0100000010010011, .arg_mask ={ @@ -2369,7 +2369,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "stc.l R2_BANK,@r-%d", + .name = "stc.l\tR2_BANK,@r-%d", .mask = 0b1111000011111111, .code = 0b0100000010100011, .arg_mask ={ @@ -2380,7 +2380,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "stc.l R3_BANK,@r-%d", + .name = "stc.l\tR3_BANK,@r-%d", .mask = 0b1111000011111111, .code = 0b0100000010110011, .arg_mask ={ @@ -2391,7 +2391,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "stc.l R4_BANK,@r-%d", + .name = "stc.l\tR4_BANK,@r-%d", .mask = 0b1111000011111111, .code = 0b0100000011000011, .arg_mask ={ @@ -2402,7 +2402,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "stc.l R5_BANK,@r-%d", + .name = "stc.l\tR5_BANK,@r-%d", .mask = 0b1111000011111111, .code = 0b0100000011010011, .arg_mask ={ @@ -2413,7 +2413,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "stc.l R6_BANK,@r-%d", + .name = "stc.l\tR6_BANK,@r-%d", .mask = 0b1111000011111111, .code = 0b0100000011100011, .arg_mask ={ @@ -2424,7 +2424,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "stc.l R7_BANK,@r-%d", + .name = "stc.l\tR7_BANK,@r-%d", .mask = 0b1111000011111111, .code = 0b0100000011110011, .arg_mask ={ @@ -2435,7 +2435,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "sts FPSCR,r%d", + .name = "sts\tFPSCR,r%d", .mask = 0b1111000011111111, .code = 0b0000000001101010, .arg_mask ={ @@ -2446,7 +2446,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "sts FPUL,r%d", + .name = "sts\tFPUL,r%d", .mask = 0b1111000011111111, .code = 0b0000000001011010, .arg_mask ={ @@ -2457,7 +2457,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "sts MACH,r%d", + .name = "sts\tMACH,r%d", .mask = 0b1111000011111111, .code = 0b0000000000001010, .arg_mask ={ @@ -2468,7 +2468,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "sts MACL,r%d", + .name = "sts\tMACL,r%d", .mask = 0b1111000011111111, .code = 0b0000000000011010, .arg_mask ={ @@ -2479,7 +2479,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "sts PR,r%d", + .name = "sts\tPR,r%d", .mask = 0b1111000011111111, .code = 0b0000000000101010, .arg_mask ={ @@ -2490,7 +2490,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "sts DSR,r%d", + .name = "sts\tDSR,r%d", .mask = 0b1111000011111111, .code = 0b0000000001101010, .arg_mask ={ @@ -2501,7 +2501,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "sts A0,r%d", + .name = "sts\tA0,r%d", .mask = 0b1111000011111111, .code = 0b0000000001111010, .arg_mask ={ @@ -2512,7 +2512,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "sts X0,r%d", + .name = "sts\tX0,r%d", .mask = 0b1111000011111111, .code = 0b0000000010001010, .arg_mask ={ @@ -2523,7 +2523,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "sts X1,r%d", + .name = "sts\tX1,r%d", .mask = 0b1111000011111111, .code = 0b0000000010011010, .arg_mask ={ @@ -2534,7 +2534,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "sts Y0,r%d", + .name = "sts\tY0,r%d", .mask = 0b1111000011111111, .code = 0b0000000010101010, .arg_mask ={ @@ -2545,7 +2545,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "sts Y1,r%d", + .name = "sts\tY1,r%d", .mask = 0b1111000011111111, .code = 0b0000000010111010, .arg_mask ={ @@ -2556,7 +2556,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "sts.l FPSCR,@-r%d", + .name = "sts.l\tFPSCR,@-r%d", .mask = 0b1111000011111111, .code = 0b0100000001100010, .arg_mask ={ @@ -2567,7 +2567,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "sts.l FPUL,@-r%d", + .name = "sts.l\tFPUL,@-r%d", .mask = 0b1111000011111111, .code = 0b0100000001010010, .arg_mask ={ @@ -2578,7 +2578,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "sts.l MACH,@-r%d", + .name = "sts.l\tMACH,@-r%d", .mask = 0b1111000011111111, .code = 0b0100000000000010, .arg_mask ={ @@ -2589,7 +2589,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "sts.l MACL,@-r%d", + .name = "sts.l\tMACL,@-r%d", .mask = 0b1111000011111111, .code = 0b0100000000010010, .arg_mask ={ @@ -2600,7 +2600,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "sts.l PR,@-r%d", + .name = "sts.l\tPR,@-r%d", .mask = 0b1111000011111111, .code = 0b0100000000100010, .arg_mask ={ @@ -2611,7 +2611,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "sts.l DSR,@-r%d", + .name = "sts.l\tDSR,@-r%d", .mask = 0b1111000011111111, .code = 0b0100000001100010, .arg_mask ={ @@ -2622,7 +2622,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "sts.l A0,@-r%d", + .name = "sts.l\tA0,@-r%d", .mask = 0b1111000011111111, .code = 0b0100000001110010, .arg_mask ={ @@ -2633,7 +2633,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "sts.l X0,@-r%d", + .name = "sts.l\tX0,@-r%d", .mask = 0b1111000011111111, .code = 0b0100000010000010, .arg_mask ={ @@ -2644,7 +2644,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "sts.l X1,@-r%d", + .name = "sts.l\tX1,@-r%d", .mask = 0b1111000011111111, .code = 0b0100000010010010, .arg_mask ={ @@ -2655,7 +2655,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "sts.l Y0,@-r%d", + .name = "sts.l\tY0,@-r%d", .mask = 0b1111000011111111, .code = 0b0100000010100010, .arg_mask ={ @@ -2666,7 +2666,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "sts.l Y1,@-r%d", + .name = "sts.l\tY1,@-r%d", .mask = 0b1111000011111111, .code = 0b0100000010110010, .arg_mask ={ @@ -2677,7 +2677,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "sub r%d,r%d", + .name = "sub\tr%d,r%d", .mask = 0b1111000000001111, .code = 0b0011000000001000, .arg_mask ={ @@ -2688,7 +2688,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "subc r%d,r%d", + .name = "subc\tr%d,r%d", .mask = 0b1111000000001111, .code = 0b0011000000001010, .arg_mask ={ @@ -2699,7 +2699,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "subv r%d,r%d", + .name = "subv\tr%d,r%d", .mask = 0b1111000000001111, .code = 0b0011000000001011, .arg_mask ={ @@ -2710,7 +2710,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "swap.b r%d,r%d", + .name = "swap.b\tr%d,r%d", .mask = 0b1111000000001111, .code = 0b0110000000001000, .arg_mask ={ @@ -2721,7 +2721,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "swap.w r%d,r%d", + .name = "swap.w\tr%d,r%d", .mask = 0b1111000000001111, .code = 0b0110000000001001, .arg_mask ={ @@ -2732,7 +2732,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "tas.b @r%d", + .name = "tas.b\t@r%d", .mask = 0b1111000011111111, .code = 0b0100000000011011, .arg_mask ={ @@ -2743,7 +2743,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "trapa #h'%x", + .name = "trapa\t#h'%x", .mask = 0b1111111100000000, .code = 0b1100001100000000, .arg_mask ={ @@ -2754,7 +2754,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "tst #h'%x,r0", + .name = "tst\t#h'%x,r0", .mask = 0b1111111100000000, .code = 0b1100100000000000, .arg_mask ={ @@ -2765,7 +2765,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "tst r%d,r%d", + .name = "tst\tr%d,r%d", .mask = 0b1111000000001111, .code = 0b0010000000001000, .arg_mask ={ @@ -2776,7 +2776,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "tst.b #h'%x,@(r0,GBR)", + .name = "tst.b\t#h'%x,@(r0,GBR)", .mask = 0b1111111100000000, .code = 0b1100110000000000, .arg_mask ={ @@ -2787,7 +2787,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "xor #h'%x,r0", + .name = "xor\t#h'%x,r0", .mask = 0b1111111100000000, .code = 0b1100101000000000, .arg_mask ={ @@ -2798,7 +2798,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "xor r%d,r%d", + .name = "xor\tr%d,r%d", .mask = 0b1111000000001111, .code = 0b0010000000001010, .arg_mask ={ @@ -2809,7 +2809,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "wor.b #h'%x,@(r0,GBR)", + .name = "wor.b\t#h'%x,@(r0,GBR)", .mask = 0b1111111100000000, .code = 0b1100111000000000, .arg_mask ={ @@ -2820,7 +2820,7 @@ const struct opcode_s opcode_list[] = { .special = NULL }, { - .name = "xtrct r%d,r%d", + .name = "xtrct\tr%d,r%d", .mask = 0b1111000000001111, .code = 0b0010000000001101, .arg_mask ={ @@ -2843,5 +2843,3 @@ const struct opcode_s opcode_list[] = { }, }; - - diff --git a/src/kernel/devices/ubc/open.c b/src/kernel/devices/ubc/open.c index ce32349..89c2071 100644 --- a/src/kernel/devices/ubc/open.c +++ b/src/kernel/devices/ubc/open.c @@ -23,7 +23,7 @@ int ubc_open(void) casio_dbr = dbr_set(&ubc_handler_pre); // Setup Channel 0. - SH7305_UBC.CRR0.PCB = 0; // Set PC break before instruction break. + SH7305_UBC.CRR0.PCB = 1; // Set PC break adter instruction break. SH7305_UBC.CRR0.BIE = 1; // Request a Break. SH7305_UBC.CBR0.MFE = 0; // Enable Match Flag. diff --git a/src/kernel/vbr/exception.c b/src/kernel/vbr/exception.c new file mode 100644 index 0000000..6fe5a78 --- /dev/null +++ b/src/kernel/vbr/exception.c @@ -0,0 +1,38 @@ +#include + +__attribute__((section(".vhex.exception"), interrupt_handler)) +void exception_handler(void) +{ + uint32_t spc; + uint32_t ssr; + uint32_t sr; + + + // Get some registers's data. + __asm__ volatile ( + "stc spc, %0;" + "stc ssr, %1;" + "stc sr, %2" + : "=r"(spc), "=r"(ssr), "=r"(sr) + : + : + ); + + // Write exception informations. + dclear(); + dprint(0, 0, + "Ho crap ! Exception !\n" + "tra: %#x\n" + "expevt: %#x\n" + "spc: %#x\n" + "ssr: %#x\n" + "sr: %#x", + *((uint32_t *)0xff000020), + *((uint32_t *)0xff000024), + spc, + ssr, + sr + ); + dupdate(); + while (1); +} diff --git a/src/kernel/vbr/interrupt.c b/src/kernel/vbr/interrupt.c new file mode 100644 index 0000000..f1d6f32 --- /dev/null +++ b/src/kernel/vbr/interrupt.c @@ -0,0 +1,10 @@ +#include + +__attribute__((section(".vhex.interrupt"), interrupt_handler)) +void interrupt_handler(void) +{ + dclear(); + dprint(0, 0, "Interrupt handler (%#x)\n", *(uint32_t*)0xff000028); + dupdate(); + while (1); +} diff --git a/src/kernel/vbr/tlb.c b/src/kernel/vbr/tlb.c new file mode 100644 index 0000000..41d6280 --- /dev/null +++ b/src/kernel/vbr/tlb.c @@ -0,0 +1,38 @@ +#include + +__attribute__((section(".glados.tlb"), interrupt_handler)) +void tlb_handler(void) +{ + uint32_t spc; + uint32_t ssr; + uint32_t sr; + + + // Get some registers's data. + __asm__ volatile ( + "stc spc, %0;" + "stc ssr, %1;" + "stc sr, %2" + : "=r"(spc), "=r"(ssr), "=r"(sr) + : + : + ); + + // Write exception informations. + dclear(); + dprint(0, 0, + "Ho crap ! Exception !\n" + "tra: %#x\n" + "expevt: %#x\n" + "spc: %#x\n" + "ssr: %#x\n" + "sr: %#x", + *((uint32_t *)0xff000020), + *((uint32_t *)0xff000024), + spc, + ssr, + sr + ); + dupdate(); + while (1); +} diff --git a/src/lib/display/dprint.c b/src/lib/display/dprint.c index f6e4af8..44eefa2 100644 --- a/src/lib/display/dprint.c +++ b/src/lib/display/dprint.c @@ -6,6 +6,7 @@ void dprint(int x, int y, char const *str, ...) { char buffer[512]; int default_pos_x; + int starting_x; va_list ap; int i; @@ -16,6 +17,7 @@ void dprint(int x, int y, char const *str, ...) va_end(ap); i = -1; + starting_x = x; x = x * (KERNEL_FONT_REAL_WIDTH + 1); y = y * (KERNEL_FONT_REAL_HEIGHT + 1); default_pos_x = x; @@ -27,6 +29,12 @@ void dprint(int x, int y, char const *str, ...) x = default_pos_x; continue; } + if (buffer[i] == '\t') + { + x = x / (KERNEL_FONT_REAL_WIDTH + 1); + x = (x + (4 - ((x - starting_x) & 3))) * (KERNEL_FONT_REAL_WIDTH + 1); + continue; + } dascii(x, y, buffer[i]); x = x + KERNEL_FONT_REAL_WIDTH + 1; } diff --git a/src/lib/display/dreverse.c b/src/lib/display/dreverse.c new file mode 100644 index 0000000..bc25d55 --- /dev/null +++ b/src/lib/display/dreverse.c @@ -0,0 +1,50 @@ +#include + +void dreverse(int x, int y, int width, int height) +{ + int vram_offset_y; + int j; + + // Check error. + if (width < 0 || height < 0) + return; + + // Get "real" X position and area width. + if (x < 0) + { + width = width + x; + x = 0; + } else { + if (x + width >= DISPLAY_SCREEN_WIDTH) + width = DISPLAY_SCREEN_WIDTH - x; + } + + // Get "real" Y position and area height. + if (y < 0) + { + height = height + x; + y = 0; + } else { + if (y + height >= DISPLAY_SCREEN_HEIGHT) + height = DISPLAY_SCREEN_HEIGHT - x; + } + + // Check potential error. + // @note we do not check height because the while() + // while do the job for us. + if (width < 0) + return; + + // Generate VRAM offset for Y axis. + vram_offset_y = (y + height - 1) << 4; + + while (--height >= 0) + { + j = width + x; + while (--j >= x) + { + vram[(j >> 3) + vram_offset_y] ^= 0x80 >> (j & 7); + } + vram_offset_y = vram_offset_y - 16; + } +} diff --git a/src/user/main.c b/src/user/main.c index fefbb34..515dc24 100644 --- a/src/user/main.c +++ b/src/user/main.c @@ -1,38 +1,36 @@ -//#include -//#include -//#include +/*#include +#include -/*int main(void) +// TODO: remove me !! +extern void test(void); + +int main(void) { - char *line; - - // Open TTY and display entry message - tty_open(); - tty_write("Welcome to Vhex !\n"); + dclear(); + dprint(0, 0, "Boot complete !"); + dupdate(); + while (1); - // UBC test ! - + // Open User Break Controller. + // @note: + // This function is hardcoded to follow syscall + // execution based on userland vitural address + // 0x08100000, reserved for add-in RAM. + // The tested programe is staticaly linked by the + // linker script. + // This module is only on SH7305 - SH4 based MPU. + // THis function SHOULD not be called ! + ubc_open(); - // Main loop - while (1) - { - // Write input indications. - // TODO: write current working directory ? - tty_write(">"); + // Jump into the tested function. + // @note: + // Thus USC should be start after the jump. + // + //((void(*)(void))0x08100000)(); + //((void(*)(void))&vhex_dbr)(); + test(); - // Get each line writen by the user. - nbread = getline(&line, &size, 0); - if (nbread == EOF) - { - // TODO: check jobs ? - break; - } - - // TODO: do some job. - } - - // Close TTY and return. - tty_close(); - return (0); + // Power OFF UBC module. + ubc_close(); }*/ diff --git a/src/user/test.c b/src/user/test.c index 2103477..b844fc8 100644 --- a/src/user/test.c +++ b/src/user/test.c @@ -1,8 +1,8 @@ -#include +/*#include void test(void) { uint8_t *vram; vram = casio_Bdisp_GetVRAM(); -} +}*/ diff --git a/src/user/test_asm.s b/src/user/test_asm.s new file mode 100644 index 0000000..c2e79e9 --- /dev/null +++ b/src/user/test_asm.s @@ -0,0 +1,23 @@ +.global _test +.type _test, @function + +.align 2 +_test: + sts.l pr, @-r15 + + mov.l .syscall_vram, r0 + mov.l .syscall_entry, r1 + jsr @r1 + nop + tst r0, r0 + bf _test + nop + + lds.l @r15+, pr + rts + nop + +.align 4 +.syscall_entry: .long 0xa0010070 +.syscall_vram: .long 0x00000135 +.end diff --git a/vhex.g1a b/vhex.g1a index ab91e8ee8a27b3660ff977d6ddc0daf8770af5a2..1852f3c3f1470dda5df554064c89e9484b4ad78a 100644 GIT binary patch literal 21732 zcmeHvYj9h~m1ctk#fNAK07;1tkOT;d;u{yB-lio|q#lkfK>$fh&N^8FBq+(DC=#G7 z+NFvZN6AQ$8}>1{~7;&^ZRuA zI~4=$vL~&+Iy$?%@7>Szm!h=t|BAwxU-4~i_4yUNZQQt#vsl?Evs#|OW!-%#tLFI+ zvSLfPKX=Juec@6z@LbfdV$AAfmfKr!DY%&F(nWnz_}}!vBS)eWf4FJylCjSFZlLD$ zMf{Zyf|isY$ugp`iSNC7kxhO z_+p@L8*XoMRd`>;C+HA`yWDmA!9iQP<{*LGfc@n%arW* zIIiTPP3=5W@^D|w4C7A=gkt3ptuSZDIM>tjU1`%xs0-i@s)N%k8an4^~GUQ}s1v z$+dnPd}N(=@?K|xRRa#HUr5z#wYN|yR5?|`Ww7Z2!2{$jj#zZ5g__hfYi2bp&6t9# z+or5!-Y@f!*7R_3J#I!8V>2Od#NF@tLZ#4WA?xESMjmRF6He*mDjDX#L8P#PFpeJxuPCEfp#={NBH<%W|m@%MJcX9_Pg%i@i7(e zG`5*n4b@n(28w2L+)bUUSWS0p*DB7Pk6Dm!V=P5??Vlwpk?URwKHe%}?ay`R3rcW+ zpJ}{ww=SxEsS=Z(L~Umi^mZrK^LurohTkjIdqtv>(`5-4zpqVH^Lt66irD7q}e!nYW=l7LreSTsMr*jh}{GO92=J)JG5x-j!4!TcT5K)?7nEO(ay_Ph z0Q7yh_A!=MjH`&Tf`7m@gYdcmS2HfOv-)whFqXB4?4?;S@_w>#fw^7Df(6#^nY1VK z7F@VHk}DPpa4$;c(3o9k{Y9DehBafQb)vSn^Y*LH*u&Xj=a^;ot}~uUcBI+oIiIt% zB3VG~X`Uu?HI9fgX(d@KU+&Y{t?3lDQD5N9hi-Xc8%nun93;W-IG-i7y0iTXh0koU zTCXmo?cV7|zCx}Bt3!*v=7{Zj0j-lHk1EMZk}^=#m6xm#x~kJ2!n{>m zg>6Gc(fD9n(m}R}cdErIxEk`tEPVawyzbKTKNVJs9z+DtW0kT(QT_J>Q&u1jIqSXe zj=V2CEaHUfgB2tVku%3#WA;B{k_~;Z<=f5rgSBt^-CG^SNgraSPwho<*UTzG_hOd& zZijug6(tKVHHB;5Y;td{am+TL)W}P9DAn^)ZMf#*W>4AFCimUoaDhV4C{=}P7Jup9 zx@hBgIj9x9REpB?i6dDuTV}6G7B4WnC+WCQ>URbkxWuyA)!>0_@YtcBo%A!?_qDW( zrFZ1qzFfjw>5tQC5zDP-U~?X-*lFY=Z{T_z7sc&qECTq1`(ri-*5|;o;_DWgv+53! zPkpg0@|haTui67FKNFkzym?zhdHY_B+>-qu-t(Y;E!{EJOQH4lb$Yqp?h*Cw8h-yb zJH<-kCwghN33IOrgBRW_;=pjpqXUqn>Yc(oZeBmCS>s$dz7+8!i_3Uu$xUdmO z?zG@vnk_|NIlS%C>{`25^b#tb@?b9iVzyZKxt(iSAL|I!!uPAl_p^n%w^u^yN|Fk@ zYcnhF#MTqrPWYL!>JsgBOj#WvA7^}eI>o(`!rn)5Jz@V0e;=mz5J!T}F)OW_usvLf z*-!g>C)Y7SE0Fl0S3+MYiBR?R)&8~T)-2xx)*xC0tHTuoo-Sv&ZQkO}N7nG)m*b9* z{M45!!`beJaHZT5E6=9Q0PJ~R_kNp?^2?`R<`&J{??>zTpfgxB))6d*j`N}BklWwv zr(Ld}@3sA8!LvKKHT}VApA%gDp%z3Ex_kZ27_t7Id;IMYccf*&1GKo>Uu{o5>varz zlGExKQ!lO4-@mh$uzjHN*WV;*p{lT_GtbwI>(rQ)dvYu4rtYX)L3M4mbC&5Rk(r&7 z>f6U`Jjbed^YP_s%v!gR6~(bt(KazRryoO)<8r$rlzo_NC#}s~vxj}n@3LqSVq}zT zKAQa}wD~mJSa_R5)aKzorOiIH$>MG9qc#z0Q#`h++Ee{p^_2H<%?zSLv-FKq`gM1rTJIL z_atgX`w`viM16$jU!i@y+Lml8wAZVYsB2Iu(NCjF37JhQMKiz9-mFp-rwb_>a(&iv z3MUp$m2wI(o>OH+jdj>vDqXJ9s%@bPmDX&dI7|Ghb$mA=8apoUuS%_lm7M0jKs~Ib zcCZ_kswLG*zP6~3hNS;OzppvOeE?cmTB6s()?SA=%_bYvHAX#pr`OXsWB!xBIuP@l zXKN@j6CHH$vlyZ6i2Q}X+XYhXqZN#)CUZQ!79LT1fO|gb?T1Ow(?EC3GSf%d1rF^DdQ+MBM(BzuXgi6F2 zY9+hEHt^r#EvvCt;zX_GpL)Nv;;z|0D|oOA(`in~v0;~2gq%$ORLdzIb44qXa*iS# z+VL_)m}@xg+B6KOMB3efA9)i(HV6n)Do=rJ27sY>e)`C7;(8VTgPUgHBP@2U8$sTt3LWi9piqZ^A2$YtDv2J z&c-Xvm_VkKpzOaUMEHS*G4v)%jOC zX4Dz-O~SsihM&KUnh&prCcFQ++LslEM1m*5RT0+)>JPn`kK zRPv@aKWW{}@O3j|KSs}o&{E7QZ?Ka0GZSi6eJAE#ODrv(?gT44?dNV#`yj1KeSXo| zB~UZ`{Sx8a&)IpuQWje-fD4g2oyGh-g}8|?Sh2|3*0ycCk?ncZ*WT&wbUP}jZp!Jq8EV2) zFTVb7WV;^?SBzPOraUvBBYiV+?Typ5EI+F>tJZScGRG8G2)u<;s?-6SCU2;%ud%lx zS)#^g)%KXx+}Bj8@8*Ryut19ig;T4A{ycVBUOGkj);CscKb48mmbolEyIT81Ca1dK zMC8dsMsgS5MUXS-b4Gh=AWlZ8!D#;vW1e7T;%pyqoKEnOPT6MkU9Qk*4ixEcT+UNXNo98CVt`TcdI=|+rWRg zZI3e?4_6HoUC-%n>%jR*cso+GlTNECeriiCWZP*@r519yk5a)k(3P@*REWQ0&ZK&F z_}c|H{G1Ba#k4laNhq!f?(3)gYk6jwBCd<~hw6sfHq}Q4ME}7O^hsq#W4 zVb5Y&=RLmq#az5M^W0nTv_dMyf)t|Ey6IJ_oRaI?ASah(P+hPDGpEBrSw|}9gbd5{ zcLgUT=5^AUKIPyiNUV*<=_fFYe#a(xuW5V3^kF`Kc~2p%em?h7!7_2DtO~uB-pF-7 zdf{BSVkg!eo@r5rk_wex|5%(|XLs}$S(+oLJA)_2?uIbMxVw|vA`bE$@%C&AmSIFb z9%`cz6c!>vv{U>EJ0n#_K3_XYyBG>rV9cC&7FOkMic}@n4>%4lp5(n9d?Z-5nR<&; zZ~Pfn3cZ~|v=eb!c&`EbT!ZGNPy_amqVwlS8^RD-PYd62swHOQaY@uQqGhArvN2fU zFFI#=DT)&po_1pvD_9k4)MqX@f85_M=JM(H)R;x_evZfcIs4~$`7wGAR&?6WQ*JRA zEa&6&V?IuEJQh;!Fh}tTa_4&P4z*zH`TED$x2Vxx#I6?ThRVT)uz>vR)5HkoV+JGfn~3mOO{CE%LqH{ev+A`xTqFXEWlve7K`a#ZDiP8Egm4%#`Sm%Oj1TXgiAAxVv^Ll+$ zOSR09O{%epo*P>!k{X}E;`tGtW$L-(en`5;vxqPvVK286nI~2TtvqC;{&v4Jxu56H z$o*(XrdgW&6pxw60qMys^+9!G7Vvgyyki!fd;7B7S>WEHb7$$?ZOd|JgS%Ph&epg| zw$K#2gjZ-n`;?xeR*dby%9)~P%t@!(vl{7>r5X)gdA^V=){!g~S*;`4`u^|-B=R{p zgB7M{=`3Fxi;TyiEuG}932ph=@!F85Z>hIR8!gl4X4or{Q#kOc-ydI}c&drmMsaj5 zRL-BE(+P2ouO%BVRW7vfJW$M~=13Ed?0E|otzEDJIUS#0eC{=4e-zJX<_?w)dlsumba?RakGZrKH!X+tO~ZB`s{>XJM{2KG7&T_Z`g#l>h5IRu7oD^eJx1rb zXMZbtq1Z$9>bXJm%J;tMHG%^xggY*f ztmAXf(C*oX`F>=UJAk&XJLC#YjQ$fdc|M3-l0W~OC*SsL#d>OZcKb5@#?kMlJNhN7 z9S&Mq^R#OD`5Yx$LsNfFJ(B)IMSbnPjmf>Vj||Xi7B)0O7Db9>b(qHUkURV`2p#xH zFXK~+TJt@0vf%!>QSg8_+SXg1L?=Pp^$AGb$o0H)BxR{KRVx34 z{7;tpWqc-0pHM5+&*M4n2X|;NiWO0M2Z~RHkdu5?%bH#$ct0>WD(F%n6NrSouMqCXtuqpQ^g@&f{AofjWknm-&a; zDL!9Uu?@Y(e{3aD9ktp;bfBjHGs=OlIapc$z1;S(y7txH_4@qay|4ch zIO<&c`tv(#*~(oF^NiQL-BJ7cZ*a}w`c+3QY0**p0KTW=ijEAr-0p(?$4|OWhL4WB z{@uP^`};oQ`dsu;*JvynkGtG#-IfX0x(yTbM3A+fJRTc#DHEWX8!uPi&Mw!z`+IkV zLVX8%(UaTFdPbuIN5jLeSoHAG_;@rH-^N(afi73(b&qQutnL{P4}4AsRjenZBQ6&( z&jc%g+&$5eXe>M&HFg?P46G_|%(o2YUj}Pi2HUUS%lj;ns|Iuafki4JG@FizpY!Fn)mDsHGn5FBtYVi#JzEiip0WNk)b?99SNRT29L)w__z+U z$atoofnoS%fHBh6Vb;`498n}hkPuEK4GM}Zj52v<8ZWY2d7V( z=o3=?iB?1XP&g9L9}>?789O9fAR6S!8Fh(BBplZu>nB~Up#zl zG`~ZY@o+q*mxt9Qh~>kya!-iq;R1c}{F!z`7Nv3VaFBwetMJ$RLEyD1DE((+AFGjOm!bIfQ zeW0fcQvf^~O{*zG@9XT^E77L<1AP97ww;LFT0h;~uL3`0zz_K{JP#W12L-O%W6;Zh z>ALBdK|dp=>8N9>o;t1Sr_-wLI<4xQp(XuP-Sv8*|M+kO&O+$XaXu?m?4&wJbqwLi zxL;Cu!X)M~n!-gyA2izVXs1EnCLG)nj@?m!*gRBTzAo@)pt%T@Mhk6jsQapDXTYgP zT{Z|bP~~WS5XK{&+LmY%$?Gw{)yZeJBZFh23Y8>&5}eVM_+|TmfvJfzk!(R5+ZgOH z*e7;FO)rw8>58&spUSJ-r_x{)Z7{CO+Lyu2_7N`Iq0J5Ilfb$Cgd~7|td`+Qt?;K0d&8!yKhDZ!XFjOt=QK*mx9I zoW-NGaSD4xnXg8|dA^4`&-da-!kJ_g{esr}MOp7Req>nU8#eF_5BoJ)M}~*D7|Om) zf-W*J)SV;NfPVHsNN?HO9^XBv&UM;3O(TChH#KWG>uNR=i_ zP4zm1$`6Z;^<=e?hUKRIV7-}EJz#31dclOLo-kpmH%yr75fi3*#e}JzF=48AG>p9G#}J-QA}-4(>|$IYxMm_`hY%X;`!JcRlmpcJNbSh`aEPT`$TJ!^`HTNFoR=^ zgjQM%058XoqiYc90*q^SCw2!Pv{bo7JJM7Df`+!HdT4B>eP$Y(o9dyxMkB@6f)LVe zQ|tnr*{Es#oeYl}&qbUz#KQ3~9jnBCI35d+YNyljxO(suTRS6KlZo=Ofp5YXC?T6@ ztqmT{EZ+uUF4Hp_DeGra^w=p)f6Af0l=W|?Rx5=pWy0PAwo1Z20=C+W)#s(ze?fm* zXSgf%rK#1fe2K3%&Hh2=YfrQDGPXC(z9wV6DSSg5f6tV8DfRuSH1p(6W+2ENPO+C| zz6tPU8!RLJ&ZOBnS;kXo_Ei~s2H*I{-@6!IO8sSEJTKN!rTztAc{)u6rT*14J1h5h z75>9t4H>ji>fZvEEn!Q*awY5oU@Od6gB4hogcYaK9VG?{(51lz%r0Tg7$a%S8`^W1Iv-HGtk8*>GDKsb-y&%8lC|r&9#OXfXO=l2$(E) zCY4ToMv^g?TAh-7-+(!ulI^$+Owzg0222{GM))-KRkMu7W?+9QVOxMzO4wdtEfRJJ zG9(`~4g-_yZ9D}`ng@-SfJy7E@p)i*X5Tl$S1Djt(~!g_(_O4uN<^%6D?Y_o)&0k%iNE&)3zVV8lOl(1KU9hR`G!2V3a z=74=e!fpclYctlufc>q66$AU3gw+H4wS=_;yRi)RuM&13&7PEEd&^*&Jt1Q>{~ngw zo(1-43Hv6n0tutJRxV+$0c(^n@|7$j0qik}@9k82@+%Vd9{8S?un&M;F=MUd(;r9} z)_%v3gdrw&JRo5kfUS_Qy};H;*h9eTB#hRyEaMcgMDo#># z*@|~B;RXmdqz>}VVkt)DebUB+TWD>fk}Ih@=%)nog`NoPcfS;;|a)+ z`hDNBBO%+R7(!`b+U4x9FGT`f;xKuaeGw_|GND@VnCNmoncL*!D%UZT@bo^I8cz z0BoIvJp{}uVMl=FNZ2^+Xwq$46$7US`_tn($bJtVcI^GB(KT}I52 z;(?#`Pz;jcrTE_f=9aJ-w3X(m|84LgSu?i53T#2bih=!$ zgw?{&MH03Fm~>9w&<)HZ@$~|0ldwTxT@p49tVhDm0EPixM^i z>{}8x5A1sq_5rY;n6Zs{z}}QFC$L2cqdED$guyRN%DFbeFYMD2AN;}!Bn*CGiiEui>}d%@JYZKO4E|$3kgz$}8^TWL3+xpM`zD@8NN3_rh^LCQM{Rl) zn6%Gqx{5tYZu=H6>D;|(334kWxp4DOqfjoXqoN9rT4dYnUZy@9pfXS?{(MT|gx&Km5hT zrdOW+8`rnWF8s~bi`kR(_k!LP-ZkDj?Rjr_j7dIP`jsBWvS!S7q-tH04@_`Ca;evd2? z-?LoXfyctg0a-2n{-;p;TV>c}#qSUN2-jP<-otg9DRuZ;<~s1z;di#`+Hv9cx#|XS z;WxYL@cTG*)41^a1$EbOy^Sk{=jG^UJ^tQqeKW2OT)nuCpbq`4KZWZlT$gdZ2ATgK z_~5>03_c*0K6!oOfloZ}i3k3#cwpH*0KXcc{$fgA*nw!Ct44GF-FWd0c^=J0EJtj< z4{^5yu^7Kq_I2-<12uuJKwBUy;0P22@YhJ*UwMD({XTwOiR#`DEC${T{3P(bz_$Vy z17A!yJ60~Sg!3qV70Tt9t;kx;%L;!nQBJ?aH~4<^Vxp)6d(Pfffj z@aw>hz`q{B@7O&2;paXa{_xm`BOeAf1=a@E1Xct#2liNZCUU7wppJNO;x~MQpZ1@; V+qjm}c$_p15C1Za2Y&{R{|Vs1i!cBH literal 18020 zcmeHPdvILUc|R+ytcPW5ACfIuuU)<0x+@vm0)tnUY(s)A?MecZ1gc#B8N6zTf%I_d1X7yH}FWKK~EjIeF~qFJ>oxhyOnH$3)`$f3?g`|-7M8ha?RS3OdT@E{ z_YAh=Bv=BnKH#$E<_qo37&SM)!QMo7Uun=WQ&UzDUEg9mp0a42E#gw=d?f=8>R*bN zwb>h~Z0Y5iuQWg z?2c6PdugPM-;33IVWgPT1rZm&uaA`SdtRi3-<@i|JyOK!oJb+RuZh_CeYM)38Cl2a z^hh4Rr$uu4JvHLwcT2=U_h}1GIA*y4=HUdibinu=v}>@myFh;u*KWo#a&b8s%lbL4 zIUIKzaW&w=IBN^8M#fThk-xM8#;!)QmzdiX&01pp<vxLTVxX{Zth7he@pe8w=cql98Yr5u%&$3G9!w23c*;+tU0M~*qVcpwqv;w)uqbLJ zT`W_Unb)A%6tIyjaAv}`jDQWT^rH^a(Be3eBCNW8eA+p_s>Mz{zm%{y&(`tXao$(z zU-mQvZHrm7N1`QURkWD23^+S7qJ_e?pfgbJDe^RUiuO6NX4O#v+pu#eJlGm_@KOAm zda(n}`}Ap1C1x*=I!@)c6!~ho#)A1A@IW_s?Ai%!_U}sx7fWnQ`|wO2b0t1X zB$$$kGufICpEJx3cdK_horkgcQmn0d%+GQtgJ@srU^zva zcqg*q7tdrw`JAUJJg(zeBza&t9P8QU*mkN2NcybckIiR8RvI50n_q2j7E=7q8Ct7v zu*}c9lKW(;ZR*CU7FtJ{5z0$U$$FC9r%zW$S8G=bPWC6e%KEQzDy7TOPQVw1n zdN#7k3oCD1d+_0|s{J^tyEb)g?%KuRIoXggnQ*OQv(WvEL?VaB7Wo`rU$A$HJrK=Q zb8`koC(6I!QAW}ul0*4+`(7>I>bds3y$iBvXE|p)h=pBH0f#&P_-d^kbcPb5?Jk=w z(099YrXV>Y=vcJ3tUI1%7-P}Kz#2U}Pi>#t#l4s&FYMdFL#HFnJnl5}K8MdS;q~Vd zLMwx4Kh*=-w0_iHC#Pu*(WpxGUM2d2l*zO0)#_OCDcfG7QlhU`rG%V1l@dDZRVt5< zYf!0moI+*5?OD$$R1}=b=M?G;P8AR};kCO|dV@-3auHFw{dmYg_zH(~S-9-|c zXRB$ReGVQ=udme8FkjZ5f%6^l^Er5}MCexRw`|~B1ybs1F6%2rov7_iFZQHYJHbuT za!49qXKAq2>n~l*Y*~Ne$I;bf1y+pr^WNkNPWzB$(z%4am``gN=M-v2Q9EKSYdc~O zBwg^8AU|NQ&F1r!dVz8j;jrX_u!LHK_?yVDfDQat_{dUZ66_l-N9b~Ck6f_dBY3bg zsM->GY|x_!JxTf0%c&-0E~+{&_)1C3@fsAN_DTe)3xJV)F3IZ8F;oWIdm+ERph<5bTrG>bu(8>@9< z4pyT&rF=^*ja!Y;uXT*ajcO9ExkOZ&deq|le2Q@EBHX%&eH5G#-NuM+<4xSgh{47P zaq2d5%4A~%Rz!3g1$VO#HOq0z6#8h@=C^drXfyP~W}9KAKh|cx7qF6aIa>5gmIWJl zEI!t@6Tjj9f1K9c)NB6?=P6R>kw=TK<8%i4I{;>YW5X# zIdlFdHFjd{HHH%6>C0E#Za@AWjrY;6)St6NeKGUMwtT+IF4}Jg&qe#EPyKnzW!|D^ zw~OKo9WMWJc=P4H!>AS7=v0|G;JK`x1{Yz;MSsKg40{72agmQH)GAYF;mlqSJ&%FI z-ZZgJZq{w90FY>7JJ1~Fp5MtsCE+}c;) zTO^*f_3;fMtGz*|>h1M21)j^N)tR1v|OY- zUvMK+9G%JheyRv(c?Rl&HT)z;rq}09tFFcQh#o}z-;BB1%0vy^<#-^%qaC;Jgq?AF zUtqa^U>Z5*s56kd#9G$3)Ge2mwY3y2{^xM{&Z59Tpd{#=`C7{Q6v};ZTCYc)!BoM& z%v#sC-uP~5`Tkb$?`z#v6bJ`O2Aqp&{jJ{OK&m+Lg3j$!^~L$w9bZc25sELR@kqyg z>tHKo!zCEfROLY zgIvnDaW11Wr0VnM1l;|6aQLbEl363b&&d&wf-T#Qph;9}Sdu6a`x6xAi+M4MFrB#ak73ZGg_1 zo1!-c9TYp_?b+ljz>It}+)6VjJj5>DN@qZzC|F|T^K2z;r~QFK%vlkh8B5&t!IEh8 zfMehCAujFC`+NnPNm`hs@n^j_q#ePDBhE?@y;|g&S}jWcTAbs~6UWIK9{;A$10uGZ zY7E)<*&zDrFtSb`S?4QkaUQpPX9!Qicq4>WtYCkvQ=d(ynbLVgUCZ=5ZWT2~atEQ# ze?_h%_{kr@&gl&}pa<0gB1toaDxzg;OHp(WuX&Ke=@cceqMzV<40)TLc;N-_o3Mbl zL*t#W=-jug$ejZ2Ejo9K&fU5qcPh9WbnaA*n{*3HaklX42fN$d?$+yy!ijB&^b9?_ zM~hU+>d6qz*J#+v&-iGrj-;qaj*g`2=gG%tT-=78Fozk@D=YqfLp&$yl^d+3>idGQ zme>0ihRgdd^_FO}WqP8)IfthR2c9&4%TJ~SJLS*?o;>9)3;qrK z%>-5T3w#gSc&m7+k>~COSg_!42-fqHAY;j*jq??vop6n&EtD_;m!>-hI-z- zwYPLA+<_c3km}f`^VVaHQf652l|sflyhYM*5>6~EiN1`Zg?P(JJ9+^-Y@z2SI>lx? zgoYkEKNtK(zf=axhgx?*{=U@o&6W+~jNHdZX*_RL6VFcY45zLFPfI>3>UF3fs`=YW z<~f4*JxY)&KW=l+&AvjcmnPx8!I!+=BHfp*q@PEo9+{c@!k=Hb)p%3nJpL^$22``@ zYXKf3Yv&ffTp`nJJWfO?@4wLN8wn4g{vV*}-3i@lA@*?`%I?Q+Rjh=n3T3b#qC6b+oP ztQmWgzc)#a2iitE)+`lh9iH~-={e@hA8>}P)bH5Bxf~A4HU=xN8;c02V`J0j={mU- zONWDY7T!4Nvs_AhXyz|zw#fcrXW!P|y6CNxM+Rs&3m@vBi%yCaZJ5O~>~(P&gbjSA zSBNQ{TCtu&ZOnUFcQg;R_HKyQ|Btl(U^Mh@196KWaIpZhJ}zN(JiK+jLQraE7-{;Y3!8%Z%-_qO`8B)oOUPlC=z`Fm^p1gKP0>&c(- zppKc{*lYZcttQG_p>3p#Qec+SlLRQS5E7rUo8@%oH-+-ga zwYxvlTftWEsEsk+^R~C*^rw9vTXVU2YZ_9CVeBR97Bu2vrW^H4f2eaSH7Loe+KZnP`Yt$Kq!) z7z}m!#zynai^bovVjBR%|jDnOhZV~Xw6(s?;Fz17xbi=9@#I^VKY5GO0>{5 zet)tZo($=XgZuAO48s`FQ?L(rkIqE&fvM4O6Bo$mg6JtD&23|B=H zCG}4=8Ty9O3fEdU2O&ZzQFpM_>!=r=y6;&v;J;}Dv)v&X> z?{>z9M-K)jUDOr|hcR=moqmN=nhggInq`A-3cL7{f~B=88yi+}VD&3t8l>@YmvkYB zw>nFrT<3u5~)t=;2idixF|jt-rtyF+j9?&{Rr{vFN!9{8*A`ISH0-oEFPN!laP zEfU=-(HkZD28rGz(VKM|tC>8mr=x-N>$K{hPOCoZbdT^eNef?fTJ=|_{X4k7Ng4q# z>NCV3$&-vj5=+K{Ff!e*hQll`8I$DLWL%P%9*fWrR_32BgVGl;88HDkZP8~}$spS1w-|FHs`;o-4P=!enKPgVyO8l~az`#_`nMk*wjbjXc82l62 zP_v8lXtts)`KR*g{;4z=#Td-%ivA^WvwwukerRihgpwbEPWpi~yW%{VaAH^e5NTQ0 zqsrvI>3*m@njZn(4Q{SNW7Nt3eol=dwltoz6CF0@eqK@tft-O-8F7nM!5HWP!*Dis za2!{%C_1Q?X0*!D))gHLtyuao)SSb7>ai|E2PX%(ZEBkj7i|qD9t~!p$st@}79OI+ zDf|&_z8eYW^&alL-V2WelEo~gGavb?CiK`u)r@KSPk>m8Xe+O^!vHl)ITjcg6 zpU7!RTI91NEs|N17I`d5iyW4uMQ%^hBA;nA)*gB24K-qaz<$thMvy8^o|^h~29+Nk z8~e#?BMr|@^5DIhRwG~YYBWrk8W9twM#Y4wkuhOvbTo|0L*#KDEm{w1 zxhR%4rzuaW-5Pznk?z*lOxT6osK!0)YUlYx$lPmed&Fqcb(aCZD~V%{gjL!Z0A7xv zM%N&+1sJ#Pdh9wrSgCS}ab&3g1PyCV{jk_fd(1Q}H}%7MjYf&B9YQF#O=lPAWTK}1 zcPKD!d@ka&;VhgC&|{UC&&FgZFs?nFPKMP7Pm$Ug(V9-QS3LL*8xKn8CR!VF=wlAc z!#L)Wk}*grIToj1flSb^J*pq2twAAZBu zV2x6G5?HE)%>ql8uor=?lCX2YQY0)APk8eT8pxKnf!QVOx0oYo&P%TWlk~bW;9G&& zH~>(cNZ4Lrdn9ZS z*gX<94s1-qrhz>!VJCt8wS>(AdqKip1on>-b`IDZ5*7jWYYB@1yCPw6V1G1Yj!p7!p4E^ldx%Ee<5K{0Q<6pJqPS>B<$~j z{hfqGfc;d$E&=2JC)`@2PlV`U?_v27FIT*o(loSj6H_>K-Tfq1pA4sV%BpubaLWeBxGw?&kMuEvXjwINR zWgSn%*-6Q_>gS`#nztI%SN&2QQF8{ER7cdjjJ=gf z>hzCNgW95B){Ezgf0k`V{9Lk*w-f9aGT#UA?P0TTwG8{bLc+3vRZ3VsFsp=B085iF z1%A})K2Src-3V;8gl)mtTxl%k;~~lB+HQ>9D~+Y+k9-O1$C)FY2ep(#F-eAxQhNlL zTf&ZEth7#Rp8_9_9K%PcrM!?KVU!p0C5-Yyjf7ENut?ZNVEhm5bS+A43|N80cNv(p zCTp)D28H@KYAAJ>OXe_-t;1Zh6bZvzvN8$7T(TAkQ-E!ku&u!S5{5j(LK24D&4Lov z59}cc!yMrcvyF}@b<@C}k+74%UXrj`U_X>F%mAY`zCBZJp*ahS_SqJLGIhhZ2;?HF4LyVRDXv#>iHzd9$7x>IM zz<4I9?auw-KsY>fAUOIt*Y2UQDg6EqbK~Rc+uq^2ZBOqGzrU}$7bx(a@u7kJ^kb2s zefz_cL!t1EjP-PPxRRfnU6td&CIbVX)j<{O@#~1o1+4rq%YqHNhQ@|Mfl>S>O;Tt` zF|ewmJV#!#rIve}30z{@iia{Q0)IyYC+J@GCKO>1j7h-6^}hhOsTLee1Q?rZdV@?)3QE z%b3My?``iZt9Dzn&U+tvVXgIOKE+1_T1yXf9dPX?CaZM>s|d){j1-1 zmYsd|yQj|1IBe5>y;$^>JNkC{D)01n+S$*pyz%%8KYRa$$DiNxi8EK$t~Ci~%;I1t zpSG6+wcsjH+HyVqUbg+dsv9=<_1#(K8XtZ1%INts@1K4C{Mj>Sj#e%9H3$R{-*2Mf>YmYJDobs<>TKB*glHuD6Xe);oo}LehwG@jg9RK zxGpoL1NBh{{wBVo2G>?x_`C0pL0pG%J%(!**UPx@?{sv$jVq47oq*g<{M{wV>1@E| L#np>zgtYz_H*hka diff --git a/vhex.ld b/vhex.ld index f1740d3..46179e9 100644 --- a/vhex.ld +++ b/vhex.ld @@ -10,10 +10,18 @@ MEMORY ** This location is realy important because no Casio's OS data ** should be overwrite (specially TLB information stored by Casio). */ - bootram (rwx) : o = 0x88040000, l = 252k - dbrram (rwx) : o = 0x8807f000, l = 4k - rom (rx) : o = 0x00300200, l = 512k - testram (rwx) : o = 0x08100000, l = 8k + ram (WX) : o = 0x88040000, l = 252k + rom (RX) : o = 0x00300200, l = 512k + ilram (WX) : o = 0xe5200000, l = 4k +} + +PHDRS +{ + text PT_LOAD ; + data PT_LOAD ; + bss PT_NULL ; + ubc PT_LOAD ; + vbr PT_LOAD ; } SECTIONS @@ -29,13 +37,15 @@ SECTIONS . = ALIGN(4); *(.rodata) *(.rodata.*) - } > rom + } > rom : text + + /* ** RAM sctions */ - . = ORIGIN(bootram); + . = ORIGIN(ram); /* BootStrap Stack: should be wiped later ! */ /* (we force the section to be non loadable when the program is run) */ @@ -44,59 +54,25 @@ SECTIONS *(.bss) *(COMMON) . = ALIGN(4); - } > bootram :NONE + } > ram : bss _sbss = SIZEOF(.bss); /* Read-write data going to RAM */ - .data : ALIGN(4) { + .data ALIGN(4) : ALIGN(4) { _bdata_rom = LOADADDR(.data) ; _bdata_ram = . ; *(.data) . = ALIGN(4); - } > bootram AT> rom + } > ram AT> rom : data _sdata = SIZEOF(.data); - - /* - ** TEST space ! - */ - /*. = ORIGIN(testram); - - .test : ALIGN(4) { - _btest_rom = LOADADDR(.test) ; - _btest_ram = . ; - - *(.test.prgm) - - . = ALIGN(4); - } > testram AT> rom - _stest = SIZEOF(.test); - */ - - /* - ** DBR space ! - */ - /*. = ORIGIN(testram); - - .vhex : ALIGN(4) { - _bvhex_rom = LOADADDR(.vhex) ; - _bvhex_ram = . ; - _vhex_dbr = . ; - - *(.vhex.handler) - - . = ALIGN(4); - } > osram AT> rom - _svhex = SIZEOF(.vhex); - */ - /* ** VBR space ! */ /* Interrupt / exception handlers */ - /*.vhex : SUBALIGN(4) { + .vhex ALIGN(4) : SUBALIGN(4) { _bvhex_rom = LOADADDR(.vhex) ; _bvhex_ram = . ; _vhex_vbr = . - 0x100; @@ -106,8 +82,29 @@ SECTIONS . = _vhex_vbr + 0x600 ; *(.vhex.interrupt) ; . = ALIGN(4); - } > osram AT> rom - _svhex = SIZEOF(.vhex);*/ + } > ram AT> rom : vbr + _svhex = SIZEOF(.vhex); + + + + + /* + ** DBR space ! + */ + . = ORIGIN(ilram); + .ubc ALIGN(4) : ALIGN(4) { + _bubc_rom = LOADADDR(.ubc) ; + _bubc_ram = . ; + + *(.ubc.handler) + *(.ubc) + + . = ALIGN(4); + } > ilram AT> rom : ubc + _subc = SIZEOF(.ubc); + + + /* unwanted section */ /DISCARD/ : {