152 lines
3.7 KiB
C
152 lines
3.7 KiB
C
#include <stdint.h>
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#include <stddef.h>
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#include <kernel/context.h>
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#include <kernel/atomic.h>
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#include <kernel/types.h>
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#include <lib/display.h>
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#include <lib/string.h>
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// Internal symbols
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//uint32_t gcc_fix[256];
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//uint32_t *VRAM = gcc_fix;
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mpu_t current_mpu = MPU_UNKNOWN;
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const char *casio_os_version = (void*)0xa0010020;
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fx9860_context_t casio_context;
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uint32_t casio_vbr;
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// Symbols defined by the linker
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extern uint32_t bbss;
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extern uint32_t sbss;
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extern uint32_t bdata_ram;
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extern uint32_t bdata_rom;
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extern uint32_t sdata;
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extern uint32_t bvhex_ram;
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extern uint32_t bvhex_rom;
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extern uint32_t svhex;
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extern uint32_t vhex_vbr;
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// Internal functions.
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extern void section_wipe(uint32_t *section, size_t size);
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extern void section_load(uint32_t *dest, uint32_t *src, size_t size);
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extern uint32_t vbr_set(uint32_t new_vbr);
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extern uint32_t vbr_get(void);
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extern mpu_t mpu_get(void);
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extern int main(void);
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extern void vhex_context_set(void);
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__attribute__((section(".pretext")))
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int start(void)
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{
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int error;
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// Wipe .bss section and dump .data / Vhex sections
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section_wipe(&bbss, (size_t)&sbss);
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section_load(&bdata_ram, &bdata_rom, (size_t)&sdata);
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section_load(&bvhex_ram, &bvhex_rom, (size_t)&svhex);
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// Check MPU hardware.
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current_mpu = mpu_get();
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if (current_mpu != MPU_SH7305)
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{
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return (0);
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}
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// Mask interrupt, change context and switch VBR.
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atomic_start();
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fx9860_context_save(&casio_context);
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casio_vbr = vbr_set((uint32_t)&vhex_vbr);
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vhex_context_set();
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atomic_end();
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// VBR test.
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__asm__ volatile ("trapa #0");
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// Call high level abstraction.
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error = main();
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// Mask interrupt, change context and switch VBR.
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atomic_start();
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fx9860_context_restore(&casio_context);
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vbr_set(casio_vbr);
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atomic_end();
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// Return the abstraction error.
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return (error);
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}
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//
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// initialize() - kernel entry
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// This is the "real" entry of the kernel (after stack and CPU configuration).
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// This part *SHOULD* be exception safe because the CPU block all exception and interruption,
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// so if an exception occur during the "bootstrap" part, the processor will "crash".
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//
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/*void initialize(void)
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{
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interrupt_block();
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printk(KERN_NOTICE, "Kernel initialization...\n");
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// Wipe BSS section !
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printk(KERN_NOTICE, "Wipe bss / dump data...\n");
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memcpy(&bdata_ram, &bdata_rom, (size_t)&sdata);
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memset(&bbss, 0x00, (size_t)&sbss);
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// Check MPU.
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current_mpu = mpu_get();
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if (current_mpu != MPU_SH7305)
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{
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printk(KERN_NOTICE, "ARCH ERROR !\n");
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int i = -1;
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while (++i < 500000);
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return (0);
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}
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// Dump kernel and data.
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printk(KERN_NOTICE, "Dump VBR space...\n");
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memcpy(&bvhex_ram, &bvhex_rom, (size_t)&svhex);
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// Initialize Interruption (extern module, VBR, handlers)
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printk(KERN_NOTICE, "Initialize hardware context...\n");
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sh7305_context_initialize();
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// Save / set new VBR.
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printk(KERN_NOTICE, "Switch VBR / SR register...\n");
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__asm__ volatile (
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"stc vbr, %0;"
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"stc sr, %1;"
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"ldc %2, vbr;"
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"ldc %3, sr"
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: "=r"(casio_vbr), "=r"(casio_sr)
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: "r"(&vhex_vbr), "r"(0x60000000)
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:
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);
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printk(KERN_NOTICE, "Initialize heap space...\n");
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pm_heap_initialize((void*)0x8806000, (void*)0x8808000, 32);
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// Kernel initialized !
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printk(KERN_NOTICE, "Kernel initialized !\n");
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interrupt_unblock();
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// Call shell.
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shell_entry();
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// Kernel exit part.
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printk(KERN_NOTICE, "Kernel exit !");
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interrupt_block();
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// restore Casio's context.
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printk(KERN_NOTICE, "Restore hardware context...\n");
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sh7305_context_restore();
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// Restore VBR / CPU configurations.
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printk(KERN_NOTICE, "Restore VBR / SR...\n");
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__asm__ volatile ("ldc %0, vbr" : : "r"(&casio_vbr) : );
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__asm__ volatile ("ldc %0, sr" : : "r"(casio_sr) : );
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// Clean exit.
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interrupt_unblock();
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return (0);
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}*/
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