forked from Lephenixnoir/gint
kernel: compact VBR scheme on SH3
I have recenty discovered that the so-called "rram" section used by gint to store its VBR space and a couple memory structures gets overwritten when returning to the main menu. It is thus necessary to get rid of it and store that data somewhere else. My current lead is to have it at the start of the static RAM by querying its address in the TLB. However, the static RAM is very small on SH3 (8k) so the VBR must be made more compact. This change elaborates the event code translation scheme used on SH3 to emulate SH4 event codes. It is now used to translate the event codes to a gint-specific VBR layout that leaves no gaps and thus reduces the size of the VBR space. The gint_inthandler() method has to be modified for every new SH3 interrupt to maintain this scheme.
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@ -200,7 +200,7 @@ SECTIONS
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There's an unused 0x100-byte gap at the start of the VBR space.
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The VBR space is already a large block (> 2 kiB), so I'm cutting off
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the gap to spare some memory */
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_gint_vbr_fx9860g = 0x8800df00;
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_gint_vbr_fx9860g = ORIGIN(vbr) - 0x100;
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. = ORIGIN(rram);
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@ -63,9 +63,12 @@ void gint_osmenu(void);
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The first parameter event_code represents the event code associated with the
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interrupt. If it's not a multiple of 0x20 then you're doing something wrong.
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The codes are normally platform-dependent, but gint always uses SH7305
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codes: SH3 platforms have a translation table. See the documentation for a
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list of event codes and their associated interrupts. Also check the
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translation table in gint's source in src/core/inth.S for SH3 support.
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codes. SH3 platforms have a different, compact VBR layout. gint_inthandler()
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translates the provided SH7305 codes to the compact layout and the interrupt
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handler translates the hardware SH3 codes to the compact layout as well. See
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gint's source in <src/core/inth.S> and <src/core/kernel.c>. Please note that
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gint_inthandler() uses a table that must be modified for every new SH3
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interrupt code to extend the compact scheme.
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The handler function is run in the kernel register bank with interrupts
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disabled and must end with 'rts' (not 'rte') as the main interrupt handler
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@ -76,8 +79,8 @@ void gint_osmenu(void);
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For convenience gint allows any block size to be loaded as an interrupt
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handler, but it should really be a multiple of 0x20 bytes and not override
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other handlers. If it's not written in assembler, then you're likely doing
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something wrong, especially with __attribute__((interrupt_handler)) which
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uses rte.
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something wrong. Using __attribute__((interrupt_handler)), which uses rte,
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is especially wrong.
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It is common for interrupt handlers to have a few bytes of data, such as the
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address of a callback function. gint often stores this data in the last
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@ -137,21 +137,38 @@ _gint_inth_7705:
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.section .gint.data
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.align 4
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/* EVENT CODE TRANSLATION TABLE - 96 BYTES */
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/* EVENT CODE TRANSLATION TABLE - 96 BYTES
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This table was originally used to translate SH3 event codes to corresponding
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SH4 events codes so that the VBR can be laid out in the SH4 model on every
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platform. However, due to memory size limitations on SH3, it now also
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translates SH4 event codes to adjacent gates numbers to reduce the size of
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the VBR section.
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The VBR interrupt space on SH3 is laid out as follows:
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VBR offset SH3 events Description
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----------------------------------------------------------------
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0x600 --- --- Entry gate
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0x640 400 420 440 --- TMU0, TMU1, TMU2 and a helper
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0x6c0 f00 --- --- --- ETMU0, ETMU1, ETMU2 and a helper
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0x740 4a0 --- RTC Periodic Interrupt and a helper
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----------------------------------------------------------------
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This represents 12 gates so the VBR space ends at VBR + 0x780. */
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_inth_remap:
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.byte 0x00, 0x01, 0x02, 0xfe, 0x34, 0x35, 0x36, 0xff
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.byte 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x0f
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.byte 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0xff, 0xff
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.byte 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
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.byte 0x20, 0x21, 0x22, 0x23, 0x28, 0x28, 0xff, 0x28
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.byte 0x48, 0x48, 0xff, 0x48, 0xff, 0xff, 0xff, 0xff
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.byte 0xff, 0x31, 0x32, 0x33, 0xff, 0xff, 0xff, 0xff
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.byte 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
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.byte 0x2d, 0x2d, 0xff, 0xff, 0x2d, 0x2d, 0xff, 0xff
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.byte 0, 1, 2, 0xff, 0xff, 8, 0xff, 0xff
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.byte 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
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.byte 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
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.byte 0x2f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
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.byte 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
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.byte 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
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.byte 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
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.byte 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
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.byte 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
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.byte 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
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.byte 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
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.byte 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
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.byte 4, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
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#endif
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@ -131,15 +131,68 @@ void kinit(void)
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sys_ctx.VBR = cpu_setVBR(gint_ctx.VBR, drivers_save_and_init, 0);
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}
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/* Due to dire space restrictions on SH3, event codes that are translated to
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SH4 are further remapped into the VBR space to eliminate gaps and save
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space. Each entry in this table represents a 32-byte block after the
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interrupt handler's entry gate. It shows the SH4 event code whose gate is
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placed on that block (some of gint's SH4 event codes are invented to host
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helper blocks).
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For instance, the 5th block after the entry gate hosts the interrupt handler
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for SH4 event 0x9e0, which is ETMU0 underflow.
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The _inth_remap table in src/core/inth.S combines the SH3-SH4 translation
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with the compact translation, hence its entry for 0xf00 (the SH3 event code
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for ETMU0 underflow) is the offset in this table where 0x9e0 is stored,
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which is 4. */
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static const uint16_t sh3_vbr_map[] = {
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0x400, /* TMU0 underflow */
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0x420, /* TMU1 underflow */
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0x440, /* TMU2 underflow */
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0x460, /* (gint custom: TMU helper) */
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0x9e0, /* ETMU0 underflow */
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0xc20, /* ETMU1 underflow (used as helper on SH3) */
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0xc40, /* ETMU2 underflow (used as helper on SH3) */
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0xc60, /* (gint custom: ETMU helper) */
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0xaa0, /* RTC Periodic Interrupt */
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0xae0, /* (gint custom: RTC helper) */
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0
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};
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/* gint_inthandler(): Install interrupt handlers */
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void *gint_inthandler(int event_code, const void *handler, size_t size)
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{
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int offset;
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/* Normalize the event code */
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if(event_code < 0x400) return NULL;
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event_code -= 0x400;
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event_code &= ~0x1f;
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void *dest = (void *)gint_ctx.VBR + event_code + 0x640;
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/* On SH3, make VBR compact. Use this offset specified in the VBR map
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above to avoid gaps */
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if(isSH3())
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{
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int index = 0;
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while(sh3_vbr_map[index])
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{
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if((int)sh3_vbr_map[index] == event_code) break;
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index++;
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}
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/* This happens if the event has not beed added to the table,
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ie. the compact VBR scheme does not support this code */
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if(!sh3_vbr_map[index]) return NULL;
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offset = index * 0x20;
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}
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/* On SH4, just use the code as offset */
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else
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{
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offset = event_code - 0x400;
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}
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/* 0x40 is the size of the entry gate */
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void *dest = (void *)gint_ctx.VBR + 0x600 + 0x40 + offset;
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return memcpy(dest, handler, size);
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}
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@ -28,11 +28,11 @@ enum{ IPRA, IPRB, IPRC, IPRD, IPRE, IPRF, IPRG, IPRH, IPRI, IPRJ, IPRK, IPRL };
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enum{ IMR0, IMR1, IMR2, IMR3, IMR4, IMR5, IMR6, IMR7, IMR8, IMR9, IMR10 };
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#define _ 0,0
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struct info {
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static struct info {
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uint16_t IPR4, IPR4bits, IMR, IMRbits;
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/* Only set if different than IPR4 with IPR4bits */
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uint16_t IPR3, IPR3bits;
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} info[] = {
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} const info[] = {
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/* Standard TMU */
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{ IPRA, 0xf000, IMR4, 0x10, _ },
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{ IPRA, 0x0f00, IMR4, 0x20, _ },
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@ -215,7 +215,9 @@ _inth_etmux:
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* 0x600 to reach the interrupt handlers
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* 0x040 to jump over the entry gate
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* 0x840 to reach the handler of ETMU2
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* Skip over the first instructions */
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* Skip over the first instructions
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This is different on SH3 due to the compact scheme so it's edited
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dynamically at install time. */
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1: .long 0xe80 + (.shared4 - _inth_etmu2)
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.id_etmux:
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@ -374,7 +374,13 @@ static void init(void)
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timers[i] = h + 24;
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if(i == 5) continue;
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uint32_t *data_id = (h + 20);
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/* On SH3, the ETMU handler is not at an offset of 0x840 (event
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code 0xc40) but at an offset of 0xc0 */
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uint32_t *etmu_offset = h + 16;
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if(isSH3()) *etmu_offset = *etmu_offset - 0x840 + 0xc0;
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uint32_t *data_id = h + 20;
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*data_id = i;
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}
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