#ifndef _ADDRESSES #define _ADDRESSES // #define SH7305_TRA 0xFF000020 // #define SH7305_EXPEVT 0xFF000024 // #define SH7305_EXPMASK 0xFF2F0004 // #define SH7305_CPUOPM 0xFF2F0000 // #define SH7305_PVR 0xFF000030 // #define SH7305_PRR 0xFF000044 // #define SH7305_PACR 0xA4050100 // #define SH7305_PBCR 0xA4050102 // #define SH7305_PCCR 0xA4050104 // #define SH7305_PDCR 0xA4050106 // #define SH7305_PECR 0xA4050108 // #define SH7305_PFCR 0xA405010A // #define SH7305_PGCR 0xA405010C // #define SH7305_PHCR 0xA405010E #define SH7305_PJCR 0xA4050110 // #define SH7305_PKCR 0xA4050112 // #define SH7305_PLCR 0xA4050114 // #define SH7305_PMCR 0xA4050116 // #define SH7305_PNCR 0xA4050118 // #define SH7305_PPCR 0xA405014C // #define SH7305_PQCR 0xA405011A // #define SH7305_PRCR 0xA405011C // #define SH7305_PSCR 0xA405011E // #define SH7305_PTCR 0xA4050140 #define SH7305_PUCR 0xA4050142 // #define SH7305_PVCR 0xA4050144 // #define SH7305_PSELA 0xA405014E // #define SH7305_PSELB 0xA4050150 // #define SH7305_PSELC 0xA4050152 // #define SH7305_PSELD 0xA4050154 // #define SH7305_PSELE 0xA4050156 // #define SH7305_PSELF 0xA405015E // #define SH7305_PSELG 0xA40501C8 // #define SH7305_PSELH 0xA40501D6 // #define SH7305_HIZCRA 0xA4050158 // #define SH7305_HIZCRB 0xA405015A // #define SH7305_HIZCRC 0xA405015C // #define SH7305_MSELCRA 0xA4050180 // #define SH7305_MSELCRB 0xA4050182 // #define SH7305_DRVCRA 0xA4050186 // #define SH7305_DRVCRB 0xA4050188 // #define SH7305_DRVCRC 0xA405018A // #define SH7305_DRVCRD 0xA4050184 // #define SH7305_PULCRBSC 0xA40501C3 // #define SH7305_PULCRTRST 0xA40501C5 // #define SH7305_PULCRA 0xA4050190 // #define SH7305_PULCRB 0xA4050191 // #define SH7305_PULCRC 0xA4050192 // #define SH7305_PULCRD 0xA4050193 // #define SH7305_PULCRE 0xA4050194 // #define SH7305_PULCRF 0xA4050195 // #define SH7305_PULCRG 0xA4050196 // #define SH7305_PULCRH 0xA4050197 // #define SH7305_PULCRJ 0xA4050198 // #define SH7305_PULCRK 0xA4050199 // #define SH7305_PULCRL 0xA405019A // #define SH7305_PULCRM 0xA405019B // #define SH7305_PULCRN 0xA405019C // #define SH7305_PULCRP 0xA40501C6 // #define SH7305_PULCRQ 0xA405019D // #define SH7305_PULCRR 0xA405019E // #define SH7305_PULCRS 0xA405019F // #define SH7305_PULCRT 0xA40501C0 // #define SH7305_PULCRU 0xA40501C1 // #define SH7305_PULCRV 0xA40501C2 // #define SH7305_PADR 0xA4050120 // #define SH7305_PBDR 0xA4050122 // #define SH7305_PCDR 0xA4050124 // #define SH7305_PDDR 0xA4050126 // #define SH7305_PEDR 0xA4050128 // #define SH7305_PFDR 0xA405012A // #define SH7305_PGDR 0xA405012C // #define SH7305_PHDR 0xA405012E #define SH7305_PJDR 0xA4050130 // #define SH7305_PKDR 0xA4050132 // #define SH7305_PLDR 0xA4050134 // #define SH7305_PMDR 0xA4050136 // #define SH7305_PNDR 0xA4050138 // #define SH7305_PPDR 0xA405016A // #define SH7305_PQDR 0xA405013A // #define SH7305_PRDR 0xA405013C // #define SH7305_PSDR 0xA405013E // #define SH7305_PTDR 0xA4050160 #define SH7305_PUDR 0xA4050162 // #define SH7305_PVDR 0xA4050164 // #define SH7305_IPRA 0xA4080000 // #define SH7305_IPRB 0xA4080004 // #define SH7305_IPRC 0xA4080008 // #define SH7305_IPRD 0xA408000C // #define SH7305_IPRE 0xA4080010 // #define SH7305_IPRF 0xA4080014 // #define SH7305_IPRG 0xA4080018 // #define SH7305_IPRH 0xA408001C // #define SH7305_IPRI 0xA4080020 // #define SH7305_IPRJ 0xA4080024 // #define SH7305_IPRK 0xA4080028 // #define SH7305_IPRL 0xA408002C // #define SH7305_ICR0 0xA4140000 // #define SH7305_ICR1 0xA414001C // #define SH7305_INTPRI00 0xA4140010 // #define SH7305_INTREQ00 0xA4140024 // #define SH7305_INTMSK00 0xA4140044 // #define SH7305_INTMSKCLR00 0xA4140064 // #define SH7305_NMIFCR 0xA41400C0 // #define SH7305_USERIMASK 0xA4700000 // #define SH7305_INTEVT 0xFF000028 // #define SH7305_PINTCRA 0xA40501DC // #define SH7305_PINTCRB 0xA40501DE // #define SH7305_PINTSRA 0xA40501EA // #define SH7305_PINTSRB 0xA40501EC // #define SH7305_PINTSRC 0xA40501EE // #define SH7305_PINTSRD 0xA40501FA // #define SH7305_IMR0 0xA4080080 // #define SH7305_IMCR0 0xA40800C0 // #define SH7305_IMR1 0xA4080084 // #define SH7305_IMCR1 0xA40800C4 // #define SH7305_IMR2 0xA4080088 // #define SH7305_IMCR2 0xA40800C8 // #define SH7305_IMR3 0xA408008C // #define SH7305_IMCR3 0xA40800CC // #define SH7305_IMR4 0xA4080090 // #define SH7305_IMCR4 0xA40800D0 // #define SH7305_IMR5 0xA4080094 // #define SH7305_IMCR5 0xA40800D4 // #define SH7305_IMR6 0xA4080098 // #define SH7305_IMCR6 0xA40800D8 // #define SH7305_IMR7 0xA408009C // #define SH7305_IMCR7 0xA40800DC // #define SH7305_IMR8 0xA40800A0 // #define SH7305_IMCR8 0xA40800E0 // #define SH7305_IMR9 0xA40800A4 // #define SH7305_IMCR9 0xA40800E4 // #define SH7305_IMR10 0xA40800A8 // #define SH7305_IMCR10 0xA40800E8 // #define SH7305_IMR11 0xA40800AC // #define SH7305_IMCR11 0xA40800EC // #define SH7305_IMR12 0xA40800B0 // #define SH7305_IMCR12 0xA40800F0 // #define SH7305_DMA_SAR0 0xFE008020 // #define SH7305_DMA_DAR0 0xFE008024 // #define SH7305_DMA_TCR0 0xFE008028 // #define SH7305_DMA_CHCR0 0xFE00802C // #define SH7305_DMA_SAR1 0xFE008030 // #define SH7305_DMA_DAR1 0xFE008034 // #define SH7305_DMA_TCR1 0xFE008038 // #define SH7305_DMA_CHCR1 0xFE00803C // #define SH7305_DMA_SAR2 0xFE008040 // #define SH7305_DMA_DAR2 0xFE008044 // #define SH7305_DMA_TCR2 0xFE008048 // #define SH7305_DMA_CHCR2 0xFE00804C // #define SH7305_DMA_SAR3 0xFE008050 // #define SH7305_DMA_DAR3 0xFE008054 // #define SH7305_DMA_TCR3 0xFE008058 // #define SH7305_DMA_CHCR3 0xFE00805C // #define SH7305_DMA_DMAOR 0xFE008060 // #define SH7305_DMA_SAR4 0xFE008070 // #define SH7305_DMA_DAR4 0xFE008074 // #define SH7305_DMA_TCR4 0xFE008078 // #define SH7305_DMA_CHCR4 0xFE00807C // #define SH7305_DMA_SAR5 0xFE008080 // #define SH7305_DMA_DAR5 0xFE008084 // #define SH7305_DMA_TCR5 0xFE008088 // #define SH7305_DMA_CHCR5 0xFE00808C // #define SH7305_DMA_SARB0 0xFE008120 // #define SH7305_DMA_DARB0 0xFE008124 // #define SH7305_DMA_TCRB0 0xFE008128 // #define SH7305_DMA_SARB1 0xFE008130 // #define SH7305_DMA_DARB1 0xFE008134 // #define SH7305_DMA_TCRB1 0xFE008138 // #define SH7305_DMA_SARB2 0xFE008140 // #define SH7305_DMA_DARB2 0xFE008144 // #define SH7305_DMA_TCRB2 0xFE008148 // #define SH7305_DMA_SARB3 0xFE008150 // #define SH7305_DMA_DARB3 0xFE008154 // #define SH7305_DMA_TCRB3 0xFE008158 // #define SH7305_DMA_DMARS0 0xFE009000 // #define SH7305_DMA_DMARS1 0xFE009004 // #define SH7305_DMA_DMARS2 0xFE009008 // #define SH7305_MMUCR 0xFF000010 // #define SH7305_PTEH 0xFF000000 // #define SH7305_PTEL 0xFF000004 // #define SH7305_PTEA 0xFF000034 // #define SH7305_TTB 0xFF000008 // #define SH7305_TEA 0xFF00000C // #define SH7305_PASCR 0xFF000070 // #define SH7305_IRMCR 0xFF000078 // #define SH7305_ITLBADDRA 0xF2000000 // #define SH7305_ITLBDATAA1 0xF3000000 // #define SH7305_ITLBDATAA2 0xF3800000 // #define SH7305_UTLBADDRA 0xF6000000 // #define SH7305_UTLBDATAA1 0xF7000000 // #define SH7305_UTLBDATAA2 0xF7800000 // #define SH7305_PMBADDRA 0xF6100000 // #define SH7305_PMBDATAA 0xF7100000 // #define SH7305_CCR 0xFF00001C // #define SH7305_ICADDRA 0xF0000000 // #define SH7305_ICDATAA 0xF1000000 // #define SH7305_OCADDRA 0xF4000000 // #define SH7305_OCDATAA 0xF5000000 // #define SH7305_RTCSR 0xFEC10048 // #define SH7305_RTCNT 0xFEC1004C // #define SH7305_RTCOR 0xFEC10050 // #define SH7305_CMNCR 0xFEC10000 // #define SH7305_CS0BCR 0xFEC10004 // #define SH7305_CS2BCR 0xFEC10008 // #define SH7305_CS3BCR 0xFEC1000C // #define SH7305_CS4BCR 0xFEC10010 // #define SH7305_CS5ABCR 0xFEC10014 // #define SH7305_CS5BBCR 0xFEC10018 // #define SH7305_CS6ABCR 0xFEC1001C // #define SH7305_CS6BBCR 0xFEC10020 // #define SH7305_CS0WCR 0xFEC10024 // #define SH7305_CS2WCR 0xFEC10028 // #define SH7305_CS3WCR 0xFEC1002C // #define SH7305_CS4WCR 0xFEC10030 // #define SH7305_CS5AWCR 0xFEC10034 // #define SH7305_CS5BWCR 0xFEC10038 // #define SH7305_CS6AWCR 0xFEC1003C // #define SH7305_CS6BWCR 0xFEC10040 // #define SH7305_SDCR 0xFEC10044 // #define SH7305_SDMR2 0xFEC14000 // #define SH7305_SDMR3 0xFEC15000 // #define SH7305_FRQCR 0xA4150000 // #define SH7305_FSICLKCR 0xA4150008 // #define SH7305_SPUCLKCR 0xA415003C // #define SH7305_DDCLKCR 0xA4150010 // #define SH7305_USBCLKCR 0xA4150014 // #define SH7305_PLLCR 0xA4150024 // #define SH7305_PLL2CR 0xA4150028 // #define SH7305_FLLFRQ 0xA4150050 // #define SH7305_LSTATUS 0xA4150060 // #define SH7305_SSCGCR 0xA4150044 // #define SH7305_R64CNT 0xA413FEC0 // #define SH7305_RSECCNT 0xA413FEC2 // #define SH7305_RMINCNT 0xA413FEC4 // #define SH7305_RHRCNT 0xA413FEC6 // #define SH7305_RWKCNT 0xA413FEC8 // #define SH7305_RDAYCNT 0xA413FECA // #define SH7305_RMONCNT 0xA413FECC // #define SH7305_RYRCNT 0xA413FECE // #define SH7305_RSECAR 0xA413FED0 // #define SH7305_RMINAR 0xA413FED2 // #define SH7305_RHRAR 0xA413FED4 // #define SH7305_RWKAR 0xA413FED6 // #define SH7305_RDAYAR 0xA413FED8 // #define SH7305_RMONAR 0xA413FEDA // #define SH7305_RYRAR 0xA413FEE0 // #define SH7305_RCR1 0xA413FEDC // #define SH7305_RCR2 0xA413FEDE // #define SH7305_RCR3 0xA413FEE4 // #define SH7305_RWTCNT 0xA4520000 // #define SH7305_RWTCSR 0xA4520004 // #define SH7305_STBCR 0xA4150020 #define SH7305_MSTPCR0 0xA4150030 // #define SH7305_MSTPCR2 0xA4150038 // #define SH7305_BAR 0xA4150040 // #define SH7305_TSTR 0xA4490004 // #define SH7305_TCOR0 0xA4490008 // #define SH7305_TCNT0 0xA449000C // #define SH7305_TCR0 0xA4490010 // #define SH7305_TCOR1 0xA4490014 // #define SH7305_TCNT1 0xA4490018 // #define SH7305_TCR1 0xA449001C // #define SH7305_TCOR2 0xA4490020 // #define SH7305_TCNT2 0xA4490024 // #define SH7305_TCR2 0xA4490028 // #define SH7305_CMSTR 0xA44A0000 // #define SH7305_CMCSR 0xA44A0060 // #define SH7305_CMCNT 0xA44A0064 // #define SH7305_CMCOR 0xA44A0068 // #define SH7305_SCSMR 0xA4410000 // #define SH7305_SCBRR 0xA4410004 #define SH7305_SCSCR 0xA4410008 // #define SH7305_SCFTDR 0xA441000C // #define SH7305_SCFSR 0xA4410010 // #define SH7305_SCFRDR 0xA4410014 // #define SH7305_SCFCR 0xA4410018 // #define SH7305_SCFDR 0xA441001C // #define SH7305_SCLSR 0xA4410024 // #define SH7305_ICDR 0xA4470000 // #define SH7305_ICCR 0xA4470004 // #define SH7305_ICSR 0xA4470008 // #define SH7305_ICIC 0xA447000C // #define SH7305_ICCL 0xA4470010 // #define SH7305_ICCH 0xA4470014 // #define SH7305_SYSCFG 0xA4D80000 // #define SH7305_BUSWAIT 0xA4D80002 // #define SH7305_SYSSTS 0xA4D80004 // #define SH7305_DVSTCTR 0xA4D80008 // #define SH7305_TESTMODE 0xA4D8000C // #define SH7305_CFIFO 0xA4D80014 // #define SH7305_D0FIFO 0xA4D80018 // #define SH7305_D1FIFO 0xA4D8001C // #define SH7305_CFIFOSEL 0xA4D80020 // #define SH7305_CFIFOCTR 0xA4D80022 // #define SH7305_D0FIFOSEL 0xA4D80028 // #define SH7305_D0FIFOCTR 0xA4D8002A // #define SH7305_D1FIFOSEL 0xA4D8002C // #define SH7305_D1FIFOCTR 0xA4D8002E // #define SH7305_INTENB0 0xA4D80030 // #define SH7305_BRDYENB 0xA4D80036 // #define SH7305_NRDYENB 0xA4D80038 // #define SH7305_BEMPENB 0xA4D8003A // #define SH7305_SOFCFG 0xA4D8003C // #define SH7305_INTSTS0 0xA4D80040 // #define SH7305_BRDYSTS 0xA4D80046 // #define SH7305_NRDYSTS 0xA4D80048 // #define SH7305_BEMPSTS 0xA4D8004A // #define SH7305_FRMNUM 0xA4D8004C // #define SH7305_UFRMNUM 0xA4D8004E // #define SH7305_USBADDR 0xA4D80050 // #define SH7305_USBREQ 0xA4D80054 // #define SH7305_USBVAL 0xA4D80056 // #define SH7305_USBINDX 0xA4D80058 // #define SH7305_USBLENG 0xA4D8005A // #define SH7305_DCPCFG 0xA4D8005C // #define SH7305_DCPMAXP 0xA4D8005E // #define SH7305_DCPCTR 0xA4D80060 // #define SH7305_PIPESEL 0xA4D80064 // #define SH7305_PIPECFG 0xA4D80068 // #define SH7305_PIPEBUF 0xA4D8006A // #define SH7305_PIPEMAXP 0xA4D8006C // #define SH7305_PIPEPERI 0xA4D8006E // #define SH7305_PIPE1CTR 0xA4D80070 // #define SH7305_PIPE2CTR 0xA4D80072 // #define SH7305_PIPE3CTR 0xA4D80074 // #define SH7305_PIPE4CTR 0xA4D80076 // #define SH7305_PIPE5CTR 0xA4D80078 // #define SH7305_PIPE6CTR 0xA4D8007A // #define SH7305_PIPE7CTR 0xA4D8007C // #define SH7305_PIPE8CTR 0xA4D8007E // #define SH7305_PIPE9CTR 0xA4D80080 // #define SH7305_PIPE1TRE 0xA4D80090 // #define SH7305_PIPE1TRN 0xA4D80092 // #define SH7305_PIPE2TRE 0xA4D80094 // #define SH7305_PIPE2TRN 0xA4D80096 // #define SH7305_PIPE3TRE 0xA4D80098 // #define SH7305_PIPE3TRN 0xA4D8009A // #define SH7305_PIPE4TRE 0xA4D8009C // #define SH7305_PIPE4TRN 0xA4D8009E // #define SH7305_PIPE5TRE 0xA4D800A0 // #define SH7305_PIPE5TRN 0xA4D800A2 // #define SH7305_UPONCR 0xA40501D4 // #define SH7305_FLCMNCR 0xA4CC0000 // #define SH7305_FLCMDCR 0xA4CC0004 // #define SH7305_FLCMCDR 0xA4CC0008 // #define SH7305_FLADR 0xA4CC000C // #define SH7305_FLADR2 0xA4CC003C // #define SH7305_FLDTCNTR 0xA4CC0014 // #define SH7305_FLDATAR 0xA4CC0010 // #define SH7305_FLINTDMACR 0xA4CC0018 // #define SH7305_FLBSYTMR 0xA4CC001C // #define SH7305_FLBSYCNT 0xA4CC0020 // #define SH7305_FLDTFIFO 0xA4CC0024 // #define SH7305_FLDTFIFO2 0xA4CC0050 // #define SH7305_FLECFIFO 0xA4CC0028 // #define SH7305_FLECFIFO2 0xA4CC0060 // #define SH7305_FLTRCR 0xA4CC002C // #define SH7305_FL4ECCRESULT1 0xA4CC0080 // #define SH7305_FL4ECCRESULT2 0xA4CC0084 // #define SH7305_FL4ECCRESULT3 0xA4CC0088 // #define SH7305_FL4ECCRESULT4 0xA4CC008C // #define SH7305_FL4ECCCR 0xA4CC0090 // #define SH7305_FL4ECCCNT 0xA4CC0094 // #define SH7305_FLERRADR 0xA4CC0098 // #define SH7305_FLNANDON 0xA4CC009C // #define SH7305_FLAPPBUF 0xA4CC1000 // #define SH7305_ECCCR 0xFD000000 // #define SH7305_ECCSR 0xFD000004 // #define SH7305_ECCINTCR 0xFD000008 // #define SH7305_ECCRSTR 0xFD00000C // #define SH7305_ECCERCNTR 0xFD000010 // #define SH7305_ECCBWCNTR 0xFD000080 // #define SH7305_ECCERPOS1 0xFD000084 // #define SH7305_ECCERPOS2 0xFD000088 // #define SH7305_ECCERPOS3 0xFD00008C // #define SH7305_ECCERPOS4 0xFD000090 // #define SH7305_ECCERPOS5 0xFD000094 // #define SH7305_ECCERPOS6 0xFD000098 // #define SH7305_ECCERPOS7 0xFD00009C // #define SH7305_ECCERPOS8 0xFD0000A0 // #define SH7305_ECCERPOS9 0xFD0000A4 // #define SH7305_ECCERPOS10 0xFD0000A8 // #define SH7305_ECCERPOS11 0xFD0000AC // #define SH7305_ECCERPOS12 0xFD0000B0 // #define SH7305_ECCERPOS13 0xFD0000B4 // #define SH7305_ECCERPOS14 0xFD0000B8 // #define SH7305_ECCERPOS15 0xFD0000BC // #define SH7305_ECCBUF 0xFD001000 // #define SH7305_ADDRA 0xA4610080 // #define SH7305_ADDRB 0xA4610082 // #define SH7305_ADDRC 0xA4610084 // #define SH7305_ADDRD 0xA4610086 // #define SH7305_ADCSR 0xA4610088 // #define SH7305_ADCCSR 0xA461008A // #define SH7305_ADCUST 0xA461008C // #define SH7305_ADPCTL 0xA461008E // #define SH7305_DDCLKR0 0xA44C0000 // #define SH7305_DDCLKR1 0xA44C0002 // #define SH7305_DDCLKR2 0xA44C0004 // #define SH7305_DDCK_CNTR 0xA44C0020 // #define SH7305_DDCS_CNTR 0xA44C0006 // #define SH7305_HIZ_CNTR 0xA44C0008 // #define SH7305_FASCR 0xA4CB0010 // #define SH7305_FASSRA 0xA4CB0014 // #define SH7305_FASSRB 0xA4CB0018 // #define SH7305_FASDR 0xA4CB001C // #define SH7305_RTSTR0 0xA44D0030 // #define SH7305_RTCR0 0xA44D003C // #define SH7305_RTCOR0 0xA44D0034 // #define SH7305_RTCNT0 0xA44D0038 // #define SH7305_RTSTR1 0xA44D0050 // #define SH7305_RTCR1 0xA44D005C // #define SH7305_RTCOR1 0xA44D0054 // #define SH7305_RTCNT1 0xA44D0058 // #define SH7305_RTSTR2 0xA44D0070 // #define SH7305_RTCR2 0xA44D007C // #define SH7305_RTCOR2 0xA44D0074 // #define SH7305_RTCNT2 0xA44D0078 // #define SH7305_RTSTR3 0xA44D0090 // #define SH7305_RTCR3 0xA44D009C // #define SH7305_RTCOR3 0xA44D0094 // #define SH7305_RTCNT3 0xA44D0098 // #define SH7305_RTSTR4 0xA44D00B0 // #define SH7305_RTCR4 0xA44D00BC // #define SH7305_RTCOR4 0xA44D00B4 // #define SH7305_RTCNT4 0xA44D00B8 // #define SH7305_RTSTR5 0xA44D00D0 // #define SH7305_RTCR5 0xA44D00DC // #define SH7305_RTCOR5 0xA44D00D4 // #define SH7305_RTCNT5 0xA44D00D8 // #define SH7305_CHRMCTRL 0xA4CD0000 // #define SH7305_CHRCOLOR 0xA4CD0004 // #define SH7305_CHRRADDR 0xA4CD0008 // #define SH7305_CHRSIZE 0xA4CD000C // #define SH7305_MSKRADDR 0xA4CD0010 // #define SH7305_VRMWADDR 0xA4CD0014 // #define SH7305_VRMWSBIT 0xA4CD0018 // #define SH7305_VRMAREA 0xA4CD001C // #define SH7305_DESWADDR 0xA4CD0020 // #define SH7305_DESAREA 0xA4CD0024 // #define SH7305_DMAMCTRL 0xA4CD0028 // #define SH7305_VRMRADDR 0xA4CD002C // #define SH7305_VRMRSIZE 0xA4CD0030 // #define SH7305_DDWPOINT1 0xA4CD0034 // #define SH7305_DDWPOINT2 0xA4CD0038 // #define SH7305_DDWPOINT3 0xA4CD003C // #define SH7305_DDWPOINT4 0xA4CD0040 // #define SH7305_DDWSIZE1 0xA4CD0044 // #define SH7305_DDWSIZE2 0xA4CD0048 // #define SH7305_DDWSIZE3 0xA4CD004C // #define SH7305_DDWSIZE4 0xA4CD0050 // #define SH7305_DDAREA1 0xA4CD0054 // #define SH7305_DDAREA2 0xA4CD0058 // #define SH7305_DDAREA3 0xA4CD005C // #define SH7305_DDAREA4 0xA4CD0060 // #define SH7305_LAYMCTRL 0xA4CD0064 // #define SH7305_XRAM 0xE5007000 // #define SH7305_YRAM 0xE5017000 // #define SH7305_ILRAM 0xE5200000 // #define SH7305_RSRAM 0xFD800000 // #define SH7305_RAMCR 0xFF000074 // #define SH7305_XSA 0xFF000050 // #define SH7305_YSA 0xFF000054 // #define SH7305_XDA 0xFF000058 // #define SH7305_YDA 0xFF00005C // #define SH7305_XPR 0xFF000060 // #define SH7305_YPR 0xFF000064 // #define SH7305_XEA 0xFF000068 // #define SH7305_YEA 0xFF00006C // #define SH7305_CBR0 0xFF200000 // #define SH7305_CRR0 0xFF200004 // #define SH7305_CAR0 0xFF200008 // #define SH7305_CAMR0 0xFF20000C // #define SH7305_CBR1 0xFF200020 // #define SH7305_CRR1 0xFF200024 // #define SH7305_CAR1 0xFF200028 // #define SH7305_CAMR1 0xFF20002C // #define SH7305_CDR1 0xFF200030 // #define SH7305_CDMR1 0xFF200034 // #define SH7305_CETR1 0xFF200038 // #define SH7305_CCMFR 0xFF200600 // #define SH7305_CBCR 0xFF200620 // #define SH7305_SDIR 0xFC110000 // #define SH7305_SDDRH 0xFC110008 // #define SH7305_SDDRL 0xFC11000A // #define SH7305_SDINT 0xFC110018 // #define SH7305_SD_CMD 0xA4CF0000 // #define SH7305_SD_ARG0 0xA4CF0004 // #define SH7305_SD_ARG1 0xA4CF0006 // #define SH7305_SD_STOP 0xA4CF0008 // #define SH7305_SD_SECCNT 0xA4CF000A // #define SH7305_SD_RSP0 0xA4CF000C // #define SH7305_SD_RSP1 0xA4CF000E // #define SH7305_SD_RSP2 0xA4CF0010 // #define SH7305_SD_RSP3 0xA4CF0012 // #define SH7305_SD_RSP4 0xA4CF0014 // #define SH7305_SD_RSP5 0xA4CF0016 // #define SH7305_SD_RSP6 0xA4CF0018 // #define SH7305_SD_RSP7 0xA4CF001A // #define SH7305_SD_INFO1 0xA4CF001C // #define SH7305_SD_INFO2 0xA4CF001E // #define SH7305_SD_INFO1_MASK 0xA4CF0020 // #define SH7305_SD_INFO2_MASK 0xA4CF0022 // #define SH7305_SD_CLK_CNTL 0xA4CF0024 // #define SH7305_SD_SIZE 0xA4CF0026 // #define SH7305_SD_OPTION 0xA4CF0028 // #define SH7305_SD_ERR_STS1 0xA4CF002C // #define SH7305_SD_ERR_STS2 0xA4CF002E // #define SH7305_SD_BUFO 0xA4CF0030 // #define SH7305_SDIO_MODE 0xA4CF0034 // #define SH7305_SDIO_INFO1 0xA4CF0036 // #define SH7305_SDIO_INFO1_MASK 0xA4CF0038 // #define SH7305_CC_EXT_MODE 0xA4CF00D8 // #define SH7305_SOFT_RST 0xA4CF00E0 // #define SH7305_VERSION 0xA4CF00E2 // #define SH7305_EXT_SWAP 0xA4CF00F0 // #define SH7305_CE_CMD_SET 0xA4CA0000 // #define SH7305_CE_ARG 0xA4CA0008 // #define SH7305_CE_ARG_CMD12 0xA4CA000C // #define SH7305_CE_CMD_CTRL 0xA4CA0010 // #define SH7305_CE_BLOCK_SET 0xA4CA0014 // #define SH7305_CE_CLK_CTRL 0xA4CA0018 // #define SH7305_CE_BUF_ACC 0xA4CA001C // #define SH7305_CE_RESP3 0xA4CA0020 // #define SH7305_CE_RESP2 0xA4CA0024 // #define SH7305_CE_RESP1 0xA4CA0028 // #define SH7305_CE_RESP0 0xA4CA002C // #define SH7305_CE_RESP_CMD12 0xA4CA0030 // #define SH7305_CE_DATA 0xA4CA0034 // #define SH7305_CE_BOOT 0xA4CA003C // #define SH7305_CE_INT 0xA4CA0040 // #define SH7305_CE_INT_EN 0xA4CA0044 // #define SH7305_CE_HOST_STS1 0xA4CA0048 // #define SH7305_CE_HOST_STS2 0xA4CA004C // #define SH7305_CE_VERSION 0xA4CA007C // #define SH7305_PRLCKCR 0xFF800018 // #define SH7305_PRPRICR0 0xFF800020 // #define SH7305_PRPRICR1 0xFF800028 // #define SH7305_PRPRICR2 0xFF800030 // #define SH7305_PRPRICR3 0xFF800038 // #define SH7305_PRPRICR4 0xFF800040 // #define SH7305_PRPRICR5 0xFF800048 // #define SH7305_SHOCMCR 0xA4530000 // #define SH7305_SHOCMSR 0xA4530004 // #define SH7305_KIUDATA0 0xA44B0000 // #define SH7305_KIUDATA1 0xA44B0002 // #define SH7305_KIUDATA2 0xA44B0004 // #define SH7305_KIUDATA3 0xA44B0006 // #define SH7305_KIUDATA4 0xA44B0008 // #define SH7305_KIUDATA5 0xA44B000A // #define SH7305_KIUCNTREG 0xA44B000C // #define SH7305_KIAUTOFIXREG 0xA44B000E // #define SH7305_KIUMODEREG 0xA44B0010 // #define SH7305_KIUSTATEREG 0xA44B0012 // #define SH7305_KIUINTREG 0xA44B0014 // #define SH7305_KIUWSETREG 0xA44B0016 // #define SH7305_KIUINTERVALREG 0xA44B0018 // #define SH7305_KOUTPINSET 0xA44B001A // #define SH7305_KINPINSET 0xA44B001C // #define SH7305_MSIOF0_SITMDR1 0xA4C40000 // #define SH7305_MSIOF0_SITMDR2 0xA4C40004 // #define SH7305_MSIOF0_SITMDR3 0xA4C40008 // #define SH7305_MSIOF0_SITSCR 0xA4C40020 // #define SH7305_MSIOF0_SIRMDR1 0xA4C40010 // #define SH7305_MSIOF0_SIRMDR2 0xA4C40014 // #define SH7305_MSIOF0_SIRMDR3 0xA4C40018 // #define SH7305_MSIOF0_SIRSCR 0xA4C40024 // #define SH7305_MSIOF0_SICTR 0xA4C40028 // #define SH7305_MSIOF0_SIFCTR 0xA4C40030 // #define SH7305_MSIOF0_SISTR 0xA4C40040 // #define SH7305_MSIOF0_SIIER 0xA4C40044 // #define SH7305_MSIOF0_SITDR1 0xA4C40048 // #define SH7305_MSIOF0_SITDR2 0xA4C4004C // #define SH7305_MSIOF0_SITFDR 0xA4C40050 // #define SH7305_MSIOF0_SIRDR1 0xA4C40058 // #define SH7305_MSIOF0_SIRDR2 0xA4C4005C // #define SH7305_MSIOF0_SIRFDR 0xA4C40060 // #define SH7305_MSIOF1_SITMDR1 0xA4C50000 // #define SH7305_MSIOF1_SITMDR2 0xA4C50004 // #define SH7305_MSIOF1_SITMDR3 0xA4C50008 // #define SH7305_MSIOF1_SITSCR 0xA4C50020 // #define SH7305_MSIOF1_SIRMDR1 0xA4C50010 // #define SH7305_MSIOF1_SIRMDR2 0xA4C50014 // #define SH7305_MSIOF1_SIRMDR3 0xA4C50018 // #define SH7305_MSIOF1_SIRSCR 0xA4C50024 // #define SH7305_MSIOF1_SICTR 0xA4C50028 // #define SH7305_MSIOF1_SIFCTR 0xA4C50030 // #define SH7305_MSIOF1_SISTR 0xA4C50040 // #define SH7305_MSIOF1_SIIER 0xA4C50044 // #define SH7305_MSIOF1_SITDR1 0xA4C50048 // #define SH7305_MSIOF1_SITDR2 0xA4C5004C // #define SH7305_MSIOF1_SITFDR 0xA4C50050 // #define SH7305_MSIOF1_SIRDR1 0xA4C50058 // #define SH7305_MSIOF1_SIRDR2 0xA4C5005C // #define SH7305_MSIOF1_SIRFDR 0xA4C50060 // #define SH7305_PBANKC0 0xFE2FFC00 // #define SH7305_PBANKC1 0xFE2FFC04 // #define SH7305_XBANKC0 0xFE2FFC10 // #define SH7305_XBANKC1 0xFE2FFC14 // #define SH7305_SPUSRST 0xFE2FFC24 // #define SH7305_SPUADR 0xFE2FFC28 // #define SH7305_ENDIAN 0xFE2FFC2C // #define SH7305_GCOM0 0xFE2FFC40 // #define SH7305_GCOM1 0xFE2FFC44 // #define SH7305_GCOM2 0xFE2FFC48 // #define SH7305_GCOM3 0xFE2FFC4C // #define SH7305_GCOM4 0xFE2FFC50 // #define SH7305_GCOM5 0xFE2FFC54 // #define SH7305_GCOM6 0xFE2FFC58 // #define SH7305_GCOM7 0xFE2FFC5C // #define SH7305_DMABUF0 0xFE2FFC80 // #define SH7305_DMABUF1 0xFE2FFC84 // #define SH7305_DMABUF2 0xFE2FFC88 // #define SH7305_DMABUF3 0xFE2FFC8C // #define SH7305_DSP0_DSPRST 0xFE2FFD00 // #define SH7305_DSP0_DSPCORERST 0xFE2FFD04 // #define SH7305_DSP0_DSPHOLD 0xFE2FFD08 // #define SH7305_DSP0_DSPRESTART 0xFE2FFD0C // #define SH7305_DSP0_IEMASKC 0xFE2FFD18 // #define SH7305_DSP0_IMASKC 0xFE2FFD1C // #define SH7305_DSP0_IEVENTC 0xFE2FFD20 // #define SH7305_DSP0_IEMASKD 0xFE2FFD24 // #define SH7305_DSP0_IMASKD 0xFE2FFD28 // #define SH7305_DSP0_IESETD 0xFE2FFD2C // #define SH7305_DSP0_IECLRD 0xFE2FFD30 // #define SH7305_DSP0_OR 0xFE2FFD34 // #define SH7305_DSP0_COM0 0xFE2FFD38 // #define SH7305_DSP0_COM1 0xFE2FFD3C // #define SH7305_DSP0_COM2 0xFE2FFD40 // #define SH7305_DSP0_COM3 0xFE2FFD44 // #define SH7305_DSP0_COM4 0xFE2FFD48 // #define SH7305_DSP0_COM5 0xFE2FFD4C // #define SH7305_DSP0_COM6 0xFE2FFD50 // #define SH7305_DSP0_COM7 0xFE2FFD54 // #define SH7305_DSP0_BTADRU 0xFE2FFD58 // #define SH7305_DSP0_BTADRL 0xFE2FFD5C // #define SH7305_DSP0_WDATU 0xFE2FFD60 // #define SH7305_DSP0_WDATL 0xFE2FFD64 // #define SH7305_DSP0_RDATU 0xFE2FFD68 // #define SH7305_DSP0_RDATL 0xFE2FFD6C // #define SH7305_DSP0_BTCTRL 0xFE2FFD70 // #define SH7305_DSP0_SPUSTS 0xFE2FFD74 // #define SH7305_DSP0_SBAR0 0xFE2FFE00 // #define SH7305_DSP0_SAR0 0xFE2FFE04 // #define SH7305_DSP0_DBAR0 0xFE2FFE08 // #define SH7305_DSP0_DAR0 0xFE2FFE0C // #define SH7305_DSP0_TCR0 0xFE2FFE10 // #define SH7305_DSP0_SHPRI0 0xFE2FFE14 // #define SH7305_DSP0_CHCR0 0xFE2FFE18 // #define SH7305_DSP0_SBAR1 0xFE2FFE20 // #define SH7305_DSP0_SAR1 0xFE2FFE24 // #define SH7305_DSP0_DBAR1 0xFE2FFE28 // #define SH7305_DSP0_DAR1 0xFE2FFE2C // #define SH7305_DSP0_TCR1 0xFE2FFE30 // #define SH7305_DSP0_SHPRI1 0xFE2FFE34 // #define SH7305_DSP0_CHCR1 0xFE2FFE38 // #define SH7305_DSP0_SBAR2 0xFE2FFE40 // #define SH7305_DSP0_SAR2 0xFE2FFE44 // #define SH7305_DSP0_DBAR2 0xFE2FFE48 // #define SH7305_DSP0_DAR2 0xFE2FFE4C // #define SH7305_DSP0_TCR2 0xFE2FFE50 // #define SH7305_DSP0_SHPRI2 0xFE2FFE54 // #define SH7305_DSP0_CHCR2 0xFE2FFE58 // #define SH7305_DSP0_LSA0 0xFE2FFE80 // #define SH7305_DSP0_LEA0 0xFE2FFE84 // #define SH7305_DSP0_LSA1 0xFE2FFE90 // #define SH7305_DSP0_LEA1 0xFE2FFE94 // #define SH7305_DSP0_LSA2 0xFE2FFEA0 // #define SH7305_DSP0_LEA2 0xFE2FFEA4 // #define SH7305_DSP1_DSPRST 0xFE3FFD00 // #define SH7305_DSP1_DSPCORERST 0xFE3FFD04 // #define SH7305_DSP1_DSPHOLD 0xFE3FFD08 // #define SH7305_DSP1_DSPRESTART 0xFE3FFD0C // #define SH7305_DSP1_IEMASKC 0xFE3FFD18 // #define SH7305_DSP1_IMASKC 0xFE3FFD1C // #define SH7305_DSP1_IEVENTC 0xFE3FFD20 // #define SH7305_DSP1_IEMASKD 0xFE3FFD24 // #define SH7305_DSP1_IMASKD 0xFE3FFD28 // #define SH7305_DSP1_IESETD 0xFE3FFD2C // #define SH7305_DSP1_IECLRD 0xFE3FFD30 // #define SH7305_DSP1_OR 0xFE3FFD34 // #define SH7305_DSP1_COM0 0xFE3FFD38 // #define SH7305_DSP1_COM1 0xFE3FFD3C // #define SH7305_DSP1_COM2 0xFE3FFD40 // #define SH7305_DSP1_COM3 0xFE3FFD44 // #define SH7305_DSP1_COM4 0xFE3FFD48 // #define SH7305_DSP1_COM5 0xFE3FFD4C // #define SH7305_DSP1_COM6 0xFE3FFD50 // #define SH7305_DSP1_COM7 0xFE3FFD54 // #define SH7305_DSP1_BTADRU 0xFE3FFD58 // #define SH7305_DSP1_BTADRL 0xFE3FFD5C // #define SH7305_DSP1_WDATU 0xFE3FFD60 // #define SH7305_DSP1_WDATL 0xFE3FFD64 // #define SH7305_DSP1_RDATU 0xFE3FFD68 // #define SH7305_DSP1_RDATL 0xFE3FFD6C // #define SH7305_DSP1_BTCTRL 0xFE3FFD70 // #define SH7305_DSP1_SPUSTS 0xFE3FFD74 // #define SH7305_DSP1_SBAR0 0xFE3FFE00 // #define SH7305_DSP1_SAR0 0xFE3FFE04 // #define SH7305_DSP1_DBAR0 0xFE3FFE08 // #define SH7305_DSP1_DAR0 0xFE3FFE0C // #define SH7305_DSP1_TCR0 0xFE3FFE10 // #define SH7305_DSP1_SHPRI0 0xFE3FFE14 // #define SH7305_DSP1_CHCR0 0xFE3FFE18 // #define SH7305_DSP1_SBAR1 0xFE3FFE20 // #define SH7305_DSP1_SAR1 0xFE3FFE24 // #define SH7305_DSP1_DBAR1 0xFE3FFE28 // #define SH7305_DSP1_DAR1 0xFE3FFE2C // #define SH7305_DSP1_TCR1 0xFE3FFE30 // #define SH7305_DSP1_SHPRI1 0xFE3FFE34 // #define SH7305_DSP1_CHCR1 0xFE3FFE38 // #define SH7305_DSP1_SBAR2 0xFE3FFE40 // #define SH7305_DSP1_SAR2 0xFE3FFE44 // #define SH7305_DSP1_DBAR2 0xFE3FFE48 // #define SH7305_DSP1_DAR2 0xFE3FFE4C // #define SH7305_DSP1_TCR2 0xFE3FFE50 // #define SH7305_DSP1_SHPRI2 0xFE3FFE54 // #define SH7305_DSP1_CHCR2 0xFE3FFE58 // #define SH7305_DSP1_LSA0 0xFE3FFE80 // #define SH7305_DSP1_LEA0 0xFE3FFE84 // #define SH7305_DSP1_LSA1 0xFE3FFE90 // #define SH7305_DSP1_LEA1 0xFE3FFE94 // #define SH7305_DSP1_LSA2 0xFE3FFEA0 // #define SH7305_DSP1_LEA2 0xFE3FFEA4 // #define SH7305_PRAM0 0xFE200000 // #define SH7305_XRAM0 0xFE240000 // #define SH7305_YRAM0 0xFE280000 // #define SH7305_PRAM1 0xFE300000 // #define SH7305_XRAM1 0xFE340000 // #define SH7305_YRAM1 0xFE380000 // #define SH7305_FSI_A_DO_FMT 0xFE3C0000 // #define SH7305_FSI_A_DOFF_CTL 0xFE3C0004 // #define SH7305_FSI_A_DOFF_ST 0xFE3C0008 // #define SH7305_FSI_A_DI_FMT 0xFE3C000C // #define SH7305_FSI_A_DIFF_CTL 0xFE3C0010 // #define SH7305_FSI_A_DIFF_ST 0xFE3C0014 // #define SH7305_FSI_A_CKG1 0xFE3C0018 // #define SH7305_FSI_A_CKG2 0xFE3C001C // #define SH7305_FSI_A_DIDT 0xFE3C0020 // #define SH7305_FSI_A_DODT 0xFE3C0024 // #define SH7305_FSI_A_MUTE_ST 0xFE3C0028 // #define SH7305_FSI_B_DO_FMT 0xFE3C0040 // #define SH7305_FSI_B_DOFF_CTL 0xFE3C0044 // #define SH7305_FSI_B_DOFF_ST 0xFE3C0048 // #define SH7305_FSI_B_DI_FMT 0xFE3C004C // #define SH7305_FSI_B_DIFF_CTL 0xFE3C0050 // #define SH7305_FSI_B_DIFF_ST 0xFE3C0054 // #define SH7305_FSI_B_CKG1 0xFE3C0058 // #define SH7305_FSI_B_CKG2 0xFE3C005C // #define SH7305_FSI_B_DIDT 0xFE3C0060 // #define SH7305_FSI_B_DODT 0xFE3C0064 // #define SH7305_FSI_B_MUTE_ST 0xFE3C0068 // #define SH7305_FSI_INT_ST 0xFE3C0200 // #define SH7305_FSI_IEMSK 0xFE3C0204 // #define SH7305_FSI_IMSK 0xFE3C0208 // #define SH7305_FSI_MUTE 0xFE3C020C // #define SH7305_FSI_CLK_RST 0xFE3C0210 // #define SH7305_FSI_SOFT_RST 0xFE3C0214 // #define SH7305_FSI_FIFO_SZ 0xFE3C0218 // #define SH7337_TRA 0xFFFFFFD0 // #define SH7337_EXPEVT 0xFFFFFFD4 // #define SH7337_IPRA 0xFFFFFEE2 // #define SH7337_IPRB 0xFFFFFEE4 // #define SH7337_IPRC 0xA4000016 // #define SH7337_IPRD 0xA4000018 // #define SH7337_IPRE 0xA400001A // #define SH7337_IPRF 0xA4080000 // #define SH7337_IPRG 0xA4080002 // #define SH7337_IPRH 0xA4080004 // #define SH7337_IPRI 0xA4080006 // #define SH7337_ICR0 0xFFFFFEE0 // #define SH7337_ICR1 0xA4000010 // #define SH7337_ICR2 0xA4000012 // #define SH7337_PINTER 0xA4000014 // #define SH7337_IRR0 0xA4000004 // #define SH7337_IRR1 0xA4000006 // #define SH7337_IRR2 0xA4000008 // #define SH7337_INTEVT 0xFFFFFFD8 // #define SH7337_INTEVT2 0xA4000000 // #define SH7337_DMA_SAR0 0xA4000020 // #define SH7337_DMA_DAR0 0xA4000024 // #define SH7337_DMA_DMATCR0 0xA4000028 // #define SH7337_DMA_CHCR0 0xA400002C // #define SH7337_DMA_SAR1 0xA4000030 // #define SH7337_DMA_DAR1 0xA4000034 // #define SH7337_DMA_DMATCR1 0xA4000038 // #define SH7337_DMA_CHCR1 0xA400003C // #define SH7337_DMA_SAR2 0xA4000040 // #define SH7337_DMA_DAR2 0xA4000044 // #define SH7337_DMA_DMATCR2 0xA4000048 // #define SH7337_DMA_CHCR2 0xA400004C // #define SH7337_DMA_SAR3 0xA4000050 // #define SH7337_DMA_DAR3 0xA4000054 // #define SH7337_DMA_DMATCR3 0xA4000058 // #define SH7337_DMA_CHCR3 0xA400005C // #define SH7337_DMA_DMAOR 0xA4000060 // #define SH7337_DMA_DMARS0 0xA4090000 // #define SH7337_DMA_DMARS1 0xA4090004 // #define SH7337_MMUCR 0xFFFFFFE0 // #define SH7337_PTEH 0xFFFFFFF0 // #define SH7337_PTEL 0xFFFFFFF4 // #define SH7337_TTB 0xFFFFFFF8 // #define SH7337_TEA 0xFFFFFFFC // #define SH7337_TLBADDRA 0xF2000000 // #define SH7337_TLBDATAA 0xF3000000 // #define SH7337_CCR1 0xFFFFFFEC // #define SH7337_CCR2 0xA40000B0 // #define SH7337_CCR3 0xA40000B4 // #define SH7337_CADDRA 0xF0000000 // #define SH7337_CDATAA 0xF1000000 // #define SH7337_RTCSR 0xA4FD0048 // #define SH7337_RTCNT 0xA4FD004C // #define SH7337_RTCOR 0xA4FD0050 // #define SH7337_CMNCR 0xA4FD0000 // #define SH7337_CS0BCR 0xA4FD0004 // #define SH7337_CS2BCR 0xA4FD0008 // #define SH7337_CS3BCR 0xA4FD000C // #define SH7337_CS4BCR 0xA4FD0010 // #define SH7337_CS5ABCR 0xA4FD0014 // #define SH7337_CS5BBCR 0xA4FD0018 // #define SH7337_CS6ABCR 0xA4FD001C // #define SH7337_CS6BBCR 0xA4FD0020 // #define SH7337_CS0WCR 0xA4FD0024 // #define SH7337_CS2WCR 0xA4FD0028 // #define SH7337_CS3WCR 0xA4FD002C // #define SH7337_CS4WCR 0xA4FD0030 // #define SH7337_CS5AWCR 0xA4FD0034 // #define SH7337_CS5BWCR 0xA4FD0038 // #define SH7337_CS6AWCR 0xA4FD003C // #define SH7337_CS6BWCR 0xA4FD0040 // #define SH7337_SDCR 0xA4FD0044 // #define SH7337_SDMR2 0xA4FD4000 // #define SH7337_SDMR3 0xA4FD5000 // #define SH7337_FRQCR 0xFFFFFF80 // #define SH7337_UCLKCR 0xA40A0008 // #define SH7337_WTCNT 0xFFFFFF84 // #define SH7337_WTCSR 0xFFFFFF86 // #define SH7337_STBCR 0xFFFFFF82 // #define SH7337_STBCR2 0xFFFFFF88 #define SH7337_STBCR3 0xA40A0000 // #define SH7337_STBCR4 0xA40A0004 // #define SH7337_TSTR 0xFFFFFE92 // #define SH7337_TCOR0 0xFFFFFE94 // #define SH7337_TCNT0 0xFFFFFE98 // #define SH7337_TCR0 0xFFFFFE9C // #define SH7337_TCOR1 0xFFFFFEA0 // #define SH7337_TCNT1 0xFFFFFEA4 // #define SH7337_TCR1 0xFFFFFEA8 // #define SH7337_TCOR2 0xFFFFFEAC // #define SH7337_TCNT2 0xFFFFFEB0 // #define SH7337_TCR2 0xFFFFFEB4 // #define SH7337_TCPR2 0xFFFFFEB8 // #define SH7337_CMSTR 0xA4000070 // #define SH7337_CMCSR 0xA4000074 // #define SH7337_CMCNT 0xA4000078 // #define SH7337_CMCOR 0xA400007C // #define SH7337_TPSTR 0xA4490000 // #define SH7337_TCR_0 0xA4490010 // #define SH7337_TMDR_0 0xA4490014 // #define SH7337_TIOR_0 0xA4490018 // #define SH7337_TIER_0 0xA449001C // #define SH7337_TSR_0 0xA4490020 // #define SH7337_TCNT_0 0xA4490024 // #define SH7337_TGRA_0 0xA4490028 // #define SH7337_TGRB_0 0xA449002C // #define SH7337_TGRC_0 0xA4490030 // #define SH7337_TGRD_0 0xA4490034 // #define SH7337_TCR_1 0xA4490050 // #define SH7337_TMDR_1 0xA4490054 // #define SH7337_TIOR_1 0xA4490058 // #define SH7337_TIER_1 0xA449005C // #define SH7337_TSR_1 0xA4490060 // #define SH7337_TCNT_1 0xA4490064 // #define SH7337_TGRA_1 0xA4490068 // #define SH7337_TGRB_1 0xA449006C // #define SH7337_TGRC_1 0xA4490070 // #define SH7337_TGRD_1 0xA4490074 // #define SH7337_TCR_2 0xA4490090 // #define SH7337_TMDR_2 0xA4490094 // #define SH7337_TIOR_2 0xA4490098 // #define SH7337_TIER_2 0xA449009C // #define SH7337_TSR_2 0xA44900A0 // #define SH7337_TCNT_2 0xA44900A4 // #define SH7337_TGRA_2 0xA44900A8 // #define SH7337_TGRB_2 0xA44900AC // #define SH7337_TGRC_2 0xA44900B0 // #define SH7337_TGRD_2 0xA44900B4 // #define SH7337_TCR_3 0xA44900D0 // #define SH7337_TMDR_3 0xA44900D4 // #define SH7337_TIOR_3 0xA44900D8 // #define SH7337_TIER_3 0xA44900DC // #define SH7337_TSR_3 0xA44900E0 // #define SH7337_TCNT_3 0xA44900E4 // #define SH7337_TGRA_3 0xA44900E8 // #define SH7337_TGRB_3 0xA44900EC // #define SH7337_TGRC_3 0xA44900F0 // #define SH7337_TGRD_3 0xA44900F4 // #define SH7337_R64CNT 0xFFFFFEC0 // #define SH7337_RSECCNT 0xFFFFFEC2 // #define SH7337_RMINCNT 0xFFFFFEC4 // #define SH7337_RHRCNT 0xFFFFFEC6 // #define SH7337_RWKCNT 0xFFFFFEC8 // #define SH7337_RDAYCNT 0xFFFFFECA // #define SH7337_RMONCNT 0xFFFFFECC // #define SH7337_RYRCNT 0xFFFFFECE // #define SH7337_RSECAR 0xFFFFFED0 // #define SH7337_RMINAR 0xFFFFFED2 // #define SH7337_RHRAR 0xFFFFFED4 // #define SH7337_RWKAR 0xFFFFFED6 // #define SH7337_RDAYAR 0xFFFFFED8 // #define SH7337_RMONAR 0xFFFFFEDA // #define SH7337_RYRAR 0xA413FEE0 // #define SH7337_RCR1 0xFFFFFEDC // #define SH7337_RCR2 0xFFFFFEDE // #define SH7337_RCR3 0xA413FEE4 // #define SH7337_SCSMR2 0xA4410000 // #define SH7337_SCBRR2 0xA4410004 #define SH7337_SCSCR2 0xA4410008 // #define SH7337_SCFTDR2 0xA4410020 // #define SH7337_SCFER2 0xA4410010 // #define SH7337_SCSSR2 0xA4410014 // #define SH7337_SCFRDR2 0xA4410024 // #define SH7337_SCFCR2 0xA4410018 // #define SH7337_SCFDR2 0xA441001C // #define SH7337_SCTDSR2 0xA441000C // #define SH7337_IFR0 0xA4480018 // #define SH7337_IFR1 0xA448001C // #define SH7337_ISR0 0xA4480044 // #define SH7337_ISR1 0xA4480048 // #define SH7337_IER0 0xA4480034 // #define SH7337_IER1 0xA4480038 // #define SH7337_EPDR0i 0xA4480000 // #define SH7337_EPDR0o 0xA4480004 // #define SH7337_EPDR0s 0xA4480008 // #define SH7337_EPDR1 0xA448000C // #define SH7337_EPDR2 0xA4480010 // #define SH7337_EPDR3 0xA4480014 // #define SH7337_EPSZ0o 0xA4480028 // #define SH7337_EPSZ1 0xA448003C // #define SH7337_TRG 0xA4480020 // #define SH7337_DASTS 0xA448002C // #define SH7337_FCLR 0xA4480024 // #define SH7337_DMAR 0xA4480040 // #define SH7337_EPSTL 0xA4480030 // #define SH7337_XVERCR 0xA4480060 // #define SH7337_FLCMNCR 0xA44B0000 // #define SH7337_FLCMDCR 0xA44B0004 // #define SH7337_FLCMCDR 0xA44B0008 // #define SH7337_FLADR 0xA44B000C // #define SH7337_FLDTCNTR 0xA44B0014 // #define SH7337_FLDATAR 0xA44B0010 // #define SH7337_FLINTDMACR 0xA44B0018 // #define SH7337_FLBSYTMR 0xA44B001C // #define SH7337_FLBSYCNT 0xA44B0020 // #define SH7337_FLDTFIFO 0xA44B0024 // #define SH7337_FLECFIFO 0xA44B0028 // #define SH7337_FLTRCR 0xA44B002C // #define SH7337_AIFAUDMDR 0xA4500000 // #define SH7337_AIFLATTR 0xA4500001 // #define SH7337_AIFRATTR 0xA4500002 // #define SH7337_AIFRSTR 0xA4500008 // #define SH7337_AIFDTCR 0xA450000A // #define SH7337_AIFSTR 0xA450000C // #define SH7337_AIFDR 0xA450000E // #define SH7337_AIFOPSR0 0xA4500003 // #define SH7337_AIFOPSR1 0xA4500004 // #define SH7337_PACR 0xA4000100 // #define SH7337_PBCR 0xA4000102 // #define SH7337_PCCR 0xA4000104 // #define SH7337_PDCR 0xA4000106 // #define SH7337_PECR 0xA4000108 // #define SH7337_PFCR 0xA400010A #define SH7337_PGCR 0xA400010C // #define SH7337_PHCR 0xA400010E // #define SH7337_PJCR 0xA4000110 // #define SH7337_PKCR 0xA4000112 #define SH7337_PLCR 0xA4000114 // #define SH7337_PMCR 0xA4000118 // #define SH7337_PNCR 0xA400011A #define SH7337_SCPCR 0xA4000116 // #define SH7337_PCCR2 0xA4050144 // #define SH7337_PDCR2 0xA4050146 // #define SH7337_PECR2 0xA4050148 // #define SH7337_PFCR2 0xA405014A // #define SH7337_PJCR2 0xA4050150 // #define SH7337_PNCR2 0xA405015A // #define SH7337_EPINTER 0xA405015C // #define SH7337_SCPCR2 0xA4050156 // #define SH7337_HIZDTCR 0xA4000180 // #define SH7337_HIZSDCR 0xA4000184 // #define SH7337_DRVCR 0xA4000188 // #define SH7337_PULDTCR 0xA400011C // #define SH7337_PULACR 0xA4050161 // #define SH7337_PULBCR 0xA4050163 // #define SH7337_PUDCSR 0xA4050164 // #define SH7337_PULCCR 0xA4050165 // #define SH7337_PUDDSR 0xA4050166 // #define SH7337_PULDCR 0xA4050167 // #define SH7337_PUDESR 0xA4050168 // #define SH7337_PULECR 0xA4050169 // #define SH7337_PUDFSR 0xA405016A // #define SH7337_PULFCR 0xA405016B // #define SH7337_PUDGSR 0xA405016C // #define SH7337_PULGCR 0xA405016D // #define SH7337_PUDHSR 0xA405016E // #define SH7337_PULHCR 0xA405016F // #define SH7337_PUDJSR 0xA4050170 // #define SH7337_PULJCR 0xA4050171 // #define SH7337_PUDKSR 0xA4050172 // #define SH7337_PULKCR 0xA4050173 // #define SH7337_PUDMSR 0xA4050178 // #define SH7337_PULMCR 0xA4050179 // #define SH7337_PUDNSR 0xA405017A // #define SH7337_PULNCR 0xA405017B // #define SH7337_PUDSCSR 0xA4050176 // #define SH7337_PULSCCR 0xA4050177 // #define SH7337_PADR 0xA4000120 // #define SH7337_PBDR 0xA4000122 // #define SH7337_PCDR 0xA4000124 // #define SH7337_PDDR 0xA4000126 // #define SH7337_PEDR 0xA4000128 // #define SH7337_PFDR 0xA400012A #define SH7337_PGDR 0xA400012C // #define SH7337_PHDR 0xA400012E // #define SH7337_PJDR 0xA4000130 // #define SH7337_PKDR 0xA4000132 // #define SH7337_PLDR 0xA4000134 // #define SH7337_PMDR 0xA4000138 // #define SH7337_PNDR 0xA400013A #define SH7337_SCPDR 0xA4000136 // #define SH7337_ADDRA 0xA4000080 // #define SH7337_ADDRB 0xA4000082 // #define SH7337_ADDRC 0xA4000084 // #define SH7337_ADDRD 0xA4000086 // #define SH7337_ADCSR 0xA4000088 // #define SH7337_ADCCSR 0xA400008A // #define SH7337_ADCUST 0xA400008C // #define SH7337_ADPCTL 0xA400008E // #define SH7337_DDCLKR0 0xA44C0000 // #define SH7337_DDCLKR1 0xA44C0002 // #define SH7337_DDCLKR2 0xA44C0004 // #define SH7337_DDCK_CNTR 0xA44C0020 // #define SH7337_DDCS_CNTR 0xA44C0006 // #define SH7337_HIZ_CNTR 0xA44C0008 // #define SH7337_FASCR 0xA44C0010 // #define SH7337_FASSRA 0xA44C0014 // #define SH7337_FASSRB 0xA44C0018 // #define SH7337_FASDR 0xA44C001C // #define SH7337_SCOLCR 0xA405015E // #define SH7337_RTCSTR 0xA44C0030 // #define SH7337_RTCCR 0xA44C003C // #define SH7337_RTCCOR 0xA44C0034 // #define SH7337_RTCCNT 0xA44C0038 // #define SH7337_OPCR 0xA40001AC // #define SH7337_RAM 0xA5600000 // #define SH7337_BARA 0xFFFFFFB0 // #define SH7337_BAMRA 0xFFFFFFB4 // #define SH7337_BBRA 0xFFFFFFB8 // #define SH7337_BARB 0xFFFFFFA0 // #define SH7337_BAMRB 0xFFFFFFA4 // #define SH7337_BBRB 0xFFFFFFA8 // #define SH7337_BDRB 0xFFFFFF90 // #define SH7337_BDMRB 0xFFFFFF94 // #define SH7337_BRCR 0xFFFFFF98 // #define SH7337_BETR 0xFFFFFF9C // #define SH7337_BRSR 0xFFFFFFAC // #define SH7337_BRDR 0xFFFFFFBC // #define SH7337_BASRA 0xFFFFFFE4 // #define SH7337_BASRB 0xFFFFFFE8 // #define SH7337_SDIR 0xA4000200 // #define SH7337_SDID 0xA4000214 // #define SH7337_SD_CMD 0xA4550000 // #define SH7337_SD_ARG0 0xA4550004 // #define SH7337_SD_ARG1 0xA4550006 // #define SH7337_SD_STOP 0xA4550008 // #define SH7337_SD_SECCNT 0xA455000A // #define SH7337_SD_RSP0 0xA455000C // #define SH7337_SD_RSP1 0xA455000E // #define SH7337_SD_RSP2 0xA4550010 // #define SH7337_SD_RSP3 0xA4550012 // #define SH7337_SD_RSP4 0xA4550014 // #define SH7337_SD_RSP5 0xA4550016 // #define SH7337_SD_RSP6 0xA4550018 // #define SH7337_SD_RSP7 0xA455001A // #define SH7337_SD_INFO1 0xA455001C // #define SH7337_SD_INFO2 0xA455001E // #define SH7337_SD_INFO1_MASK 0xA4550020 // #define SH7337_SD_INFO2_MASK 0xA4550022 // #define SH7337_SD_CLK_CNTL 0xA4550024 // #define SH7337_SD_SIZE 0xA4550026 // #define SH7337_SD_OPTION 0xA4550028 // #define SH7337_SD_ERR_STS1 0xA455002C // #define SH7337_SD_ERR_STS2 0xA455002E // #define SH7337_SD_BUFO 0xA4550030 // #define SH7337_SDIO_MODE 0xA4550034 // #define SH7337_SDIO_INFO1 0xA4550036 // #define SH7337_SDIO_INFO1_MASK 0xA4550038 // #define SH7337_CC_EXT_MODE 0xA45500D8 // #define SH7337_SOFT_RST 0xA45500E0 // #define SH7337_VERSION 0xA45500E2 // #define SH7337_EXT_SWAP 0xA45500F0 #endif