We look for constants in call instruction parameters, but this only
works for jsr because the register argument in [jmp @rn] is not known to
be a constant yet (some static analysis required).
* Store CpuRegister on a single byte
* Store operation sizes (0, 1, 2, 4) on a single byte
* Share the (disp) and (imm) fields of instruction arguments
* Store instructions as char[12] instead of std::string (>32B)
* Store instruction args in Argument[2], not std::vector (>24B)
Size changes:
CpuRegister: 4B -> 1B
Argument: 24B -> 8B
Instruction: >64B -> 32B
This reduced the malloc size from 3.3M to 177k after a standard 40-line
disassembly (this excludes OS files mapped to memory), and improved the
loading time for the SH3 instruction table by about 30% (100 ms -> 65
ms).
Each of these constraints is specified in the header by an [os] or [mpu]
line. For the symbol table to be usable on a disassembly, both
constraints must be met:
* Either [os] is unset, no OS is used for disassembly, or the OS type is
the same as the [os] constraint (either "fx" or "cg");
* Either [mpu] is unset, the disassembled target has no specified MPU,
or the MPU type of the target is the same as the [mpu] constraint (eg
"sh7305").
This change adds OS parsing for fx-CG OSes; this includes the
information available in [fxos info] but also makes it possible to
disassemble syscalls using [fxos disasm].
Symbols and addresses, including syscall names, are still shared with
legacy FX versions, which is definitely a no-no.
This finally makes it possible to disassemble any interval without
worrying about potential errors. That's some progress.
By the way, now we can fully disassemble fx@3.10. Takes about 6 seconds
for the analysis passes, and ~9 seconds for printing on my machine.