IniKiwi/nemu
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nemu
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plus d'opcodes 

corrections de bugs
écrant fonctionnel
le modèle visté est la garph35+EII
readme.md mis à jour
This commit is contained in:
IniKiwi 2022-07-25 11:33:54 +02:00
parent ef6bbf62e2
commit 02cc56efa7
23 changed files with 83227 additions and 15657 deletions
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3
.gitignore vendored
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@ -6,4 +6,5 @@
compile_commands.json
/.vscode
aise.txt
Makefile
Makefile
/build

8
README.md
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@ -4,9 +4,13 @@
c'est un petit emulateur d'add-in que je fait.
le modèle visé est la graph 85 sh3 (celui du sdk)
le modèle visé est la casio graph 35+E II. la rétrocompatibilité peut être implémenté.
## Contribuer
j'ai moins en mois de temps libre et j'arrive au bout de mes compétences. si une personne s'y connait en hardware de la calculatrice ou a trouvé une solution à un bug, vous pourriez faire une pull request.
## License
Tout droits réservés. car j'y connais rien en licence et que j'ai pas envie que une parsonne fasse un fork nommé "Better nemu".
Tout droits réservés. car j'y connais rien en licence et que j'ai pas envie que une personne fasse son fork nommé "Better nemu".

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40
build/fall.txt
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@ -29,12 +29,12 @@
000038 3030 cmp/eq r3, r0
00003a 0000
00003c 3230 cmp/eq r3, r2
00003e 3232 cmp/hs r3, r2
000040 2e30 mov.b r3, @r14
000042 3730 cmp/eq r3, r7
000044 322e addc r2, r2
000046 3135 dmulu.l r3, r1
000048 3538 sub r3, r5
00003e 3135 dmulu.l r3, r1
000040 2e31 mov.w r3, @r14
000042 3132 cmp/hs r3, r1
000044 392e addc r2, r9
000046 3233 cmp/ge r3, r2
000048 3339
00004a 0000
00004c 31c9
00004e 10f4 mov.l r15, @(h'10,r0)
@ -889,19 +889,19 @@
0006f0 4f26 lds.l @r15+, pr
0006f2 000b rts
0006f4 6df6 mov.l @r15+, r13
0006f6 e704 mov #h'4, r7
0006f6 e708 mov #h'8, r7
0006f8 d528 mov.l @(h'a0,pc), r5 ;@(h'79c)
0006fa e600 mov #h'0, r6
0006fa e604 mov #h'4, r6
0006fc d428 mov.l @(h'a0,pc), r4 ;@(h'7a0)
0006fe 6163 mov r6, r1
0006fe e100 mov #h'0, r1
000700 2fc6 mov.l r12, @-r15
000702 ec07 mov #h'7, r12
000702 ec0a mov #h'a, r12
000704 2fb6 mov.l r11, @-r15
000706 eb10 mov #h'10, r11
000708 2fa6 mov.l r10, @-r15
00070a ea40 mov #h'40, r10
00070c 2570 mov.b r7, @r5
00070e e3c0 mov #h'ffffffc0, r3
00070e e380 mov #h'ffffff80, r3
000710 231b or r1, r3
000712 60b3 mov r11, r0
000714 2430 mov.b r3, @r4
@ -931,11 +931,11 @@
000744 d416 mov.l @(h'58,pc), r4 ;@(h'7a0)
000746 e940 mov #h'40, r9
000748 ea10 mov #h'10, r10
00074a eb07 mov #h'7, r11
00074c e100 mov #h'0, r1
00074e e704 mov #h'4, r7
000750 6013 mov r1, r0
000752 e3c0 mov #h'ffffffc0, r3
00074a eb0a mov #h'a, r11
00074c e104 mov #h'4, r1
00074e e708 mov #h'8, r7
000750 e000 mov #h'0, r0
000752 e380 mov #h'ffffff80, r3
000754 2570 mov.b r7, @r5
000756 66a3 mov r10, r6
000758 230b or r0, r3
@ -959,15 +959,15 @@
00077c d207 mov.l @(h'1c,pc), r2 ;@(h'79c)
00077e e306 mov #h'6, r3
000780 d107 mov.l @(h'1c,pc), r1 ;@(h'7a0)
000782 2230 mov.b r3, @r2
000782 0009 nop
000784 000b rts
000786 2140 mov.b r4, @r1
000786 0009 nop
000788 d204 mov.l @(h'10,pc), r2 ;@(h'79c)
00078a e306 mov #h'6, r3
00078c d104 mov.l @(h'10,pc), r1 ;@(h'7a0)
00078e 2230 mov.b r3, @r2
00078e 0009 nop
000790 000b rts
000792 6010 mov.b @r1, r0
000792 e000 mov #h'0, r0
000794 03fc mov.b @(r0,r15), r3
000796 0000
000798 0030

10
build/gravity.txt
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@ -948,12 +948,12 @@
000766 e940 mov #h'40, r9
000768 d410 mov.l @(h'40,pc), r4 ;@(h'7ac)
00076a ea10 mov #h'10, r10
00076c eb07 mov #h'7, r11
00076e e100 mov #h'0, r1
000770 e704 mov #h'4, r7
000772 6013 mov r1, r0
00076c eb0a mov #h'a, r11
00076e e104 mov #h'4, r1
000770 e708 mov #h'8, r7
000772 e000 mov #h'0, r0
000774 2570 mov.b r7, @r5
000776 e2c0 mov #h'ffffffc0, r2
000776 e280 mov #h'ffffff80, r2
000778 220b or r0, r2
00077a 66a3 mov r10, r6
00077c 2420 mov.b r2, @r4

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build/orton.txt
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build/output.txt
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29
src/cpu.c
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@ -131,6 +131,9 @@ void cpu_write32(cpu_status_t* status, uint32_t addr, uint32_t data){
status->ram[addr-0x08100000+1] = (data >> 16) & 0xFF;
status->ram[addr-0x08100000+2] = (data >> 8) & 0xFF;
status->ram[addr-0x08100000+3] = data & 0xFF;
if(addr==0x0817daac) printf("\e[36mWRITE ALERT!\e[39m\n");
}
/*else if(addr >=0x00300200 && addr <= 0x00300200+status->program_size){
memcpy(&status->rom[addr-0x00300200], &addr, 4);
@ -140,7 +143,7 @@ void cpu_write32(cpu_status_t* status, uint32_t addr, uint32_t data){
status->vram[addr-0x01100000+1] = (data >> 16) & 0xFF;
status->vram[addr-0x01100000+2] = (data >> 8) & 0xFF;
status->vram[addr-0x01100000+3] = data & 0xFF;
display_update(status->display, status);
//display_update(status->display,status);
}
else{
log_mem_write_error(status, addr);
@ -172,8 +175,11 @@ void cpu_write8(cpu_status_t* status, uint32_t addr, uint8_t data){
else if(addr >=0x01100000 && addr <= 0x01100000+8192){
status->vram[addr-0x01100000] = data;
}
else if(addr == 0xb4000000 || addr == 0xb4010000){
else if(addr == 0xb4000000){
display_set_register_selector(status->display, data);
}
else if(addr == 0xb4010000){
display_set_data_register(status->display, data,status);
}
else{
log_mem_write_error(status, addr);
@ -193,18 +199,20 @@ int cpu_execute(cpu_status_t* status){
status->r[0],status->r[1],status->r[2],status->r[3],
status->r[4],status->r[5],status->r[6],status->r[15]
);*/
/*printf("pc: %8x %02x%02x pr: %8x r0: %8x r1: %8x r2: %8x r3: %8x r4: %8x r5: %8x r6: %8x r7: %8x r8: %8x r9: %8x r15: %08x\n",
printf("pc: %8x %02x%02x pr: %8x r0: %8x r1: %8x r2: %8x r3: %8x r4: %8x r5: %8x r6: %8x r7: %8x r8: %8x r9: %8x r15: %08x\n",
status->pc,cpu_read8(status,status->pc),cpu_read8(status,status->pc+1), status->pr,
status->r[0],status->r[1],status->r[2],status->r[3],
status->r[4],status->r[5],status->r[6],
status->r[7],status->r[8],status->r[9],
status->r[15]
);*/
);
if(nibble[0] == 0b0110 && nibble[3] == 0b0011) instruction_mov_r_r(status);
//else if(cpu_read8(status,status->pc) == 0x7f && cpu_read8(status,status->pc+1) == 0x04) status->pc += 2;
else if(nibble[0] == 0b1110) instruction_mov_imm_r(status);
else if(nibble[0] == 0b0000 && nibble[2] == 0b0010 && nibble[3] == 0b1001) instruction_movt_r(status);
else if(nibble[0] == 0b0110 && nibble[3] == 0b1000) instruction_swapb_r_r(status);
else if(nibble[0] == 0b1100 && nibble[1] == 0b0111) instruction_mova_disp_pc_r0(status);
else if(nibble[0] == 0b1101) instruction_movl_disp_pc_r(status);
else if(nibble[0] == 0b0110 && nibble[3] == 0b0010) instruction_movl_ar_r(status);
@ -226,6 +234,7 @@ int cpu_execute(cpu_status_t* status){
else if(nibble[0] == 0b0110 && nibble[3] == 0b0001) instruction_movw_ar_r(status);
else if(nibble[0] == 0b0000 && nibble[3] == 0b1101) instruction_movw_r0_r_r(status);
else if(nibble[0] == 0b1100 && nibble[1] == 0b0101) instruction_movw_disp_gbr_r0(status);
else if(nibble[0] == 0b0000 && nibble[3] == 0b0101) instruction_movw_r_r0_r(status);
else if(nibble[0] == 0b0110 && nibble[3] == 0b0000) instruction_movb_ar_r(status);
else if(nibble[0] == 0b0010 && nibble[3] == 0b0000) instruction_movb_r_ar(status);
@ -251,6 +260,8 @@ int cpu_execute(cpu_status_t* status){
else if(nibble[0] == 0b0100 && nibble[3] == 0b1100) instruction_shad_r_r(status);
else if(nibble[0] == 0b0100 && nibble[2] == 0b0010 && nibble[3] == 0b1001) instruction_shlr16_r(status);
else if(nibble[0] == 0b0100 && nibble[2] == 0b0001 && nibble[3] == 0b1001) instruction_shlr8_r(status);
else if(nibble[0] == 0b0100 && nibble[2] == 0b0000 && nibble[3] == 0b0101) instruction_rotr_r(status);
else if(nibble[0] == 0b0100 && nibble[2] == 0b0000 && nibble[3] == 0b0100) instruction_rotl_r(status);
else if(nibble[0] == 0b0011 && nibble[3] == 0b0100) instruction_div1_r_r(status);
else if(nibble[0] == 0b0011 && nibble[3] == 0b1100) instruction_add_r_r(status);
@ -274,6 +285,11 @@ int cpu_execute(cpu_status_t* status){
else if(nibble[0] == 0b0110 && nibble[3] == 0b1110) instruction_extsb_r_r(status);
else if(nibble[0] == 0b0110 && nibble[3] == 0b1011) instruction_neg_r_r(status);
else if(nibble[0] == 0b0010 && nibble[3] == 0b1100) instruction_cmp_str_r_r(status);
else if(nibble[0] == 0b0000 && nibble[1] == 0b0000 && nibble[2] == 0b0001 && nibble[3] == 0b1001) instruction_div0u(status);
else if(nibble[0] == 0b1100 && nibble[1] == 0b1000) instruction_tst_imm_r0(status);
else if(nibble[0] == 0b0011 && nibble[3] == 0b0101) instruction_dmulul_r_r(status);
else if(nibble[0] == 0b0110 && nibble[3] == 0b1010) instruction_negc_r_r(status);
else if(nibble[0] == 0b0100 && nibble[2] == 0b0010 && nibble[3] == 0b1011) instruction_jmp_r(status);
else if(nibble[0] == 0b1011) instruction_bsr_lbl(status);
@ -285,6 +301,7 @@ int cpu_execute(cpu_status_t* status){
else if(nibble[0] == 0b1000 && nibble[1] == 0b1001 ) instruction_bt_lbl(status);
else if(nibble[0] == 0b1000 && nibble[1] == 0b1101 ) instruction_bts_lbl(status);
else if(nibble[0] == 0b1000 && nibble[1] == 0b1111 ) instruction_bfs_lbl(status);
else if(nibble[0] == 0b0000 && nibble[2] == 0b0010 && nibble[3] == 0b0011) instruction_braf_r(status);
else if(nibble[0] == 0b0000 && nibble[1] == 0b0000 && nibble[2] == 0b0000 && nibble[3] == 0b1001) instruction_nop(status);
else if(nibble[0] == 0b0100 && nibble[2] == 0b0000 && nibble[3] == 0b0010) instruction_stsl_mash_amr(status);
@ -296,6 +313,8 @@ int cpu_execute(cpu_status_t* status){
else if(nibble[0] == 0b0000 && nibble[2] == 0b0001 && nibble[3] == 0b1010) instruction_sts_macl_r(status);
else if(nibble[0] == 0b0100 && nibble[2] == 0b0001 && nibble[3] == 0b1110) instruction_ldc_r_gbr(status);
else if(nibble[0] == 0b0000 && nibble[2] == 0b0001 && nibble[3] == 0b0010) instruction_stc_gbr_r(status);
else if(nibble[0] == 0b0100 && nibble[2] == 0b0000 && nibble[3] == 0b0110) instruction_ldsl_arm_mach(status);
else if(nibble[0] == 0b0000 && nibble[2] == 0b0000 && nibble[3] == 0b1010) instruction_sts_mach_r(status);
else if(nibble[0] == 0b0010 && nibble[3] == 0b1000) instruction_tst_r_r(status);
else if(nibble[0] == 0b0010 && nibble[3] == 0b1011) instruction_or_r_r(status);

3
src/cpu.h
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@ -29,6 +29,8 @@ typedef struct{
malloc_table_t malloc;
display_t* display;
uint32_t ipr[9];
}cpu_status_t;
int cpu_setup_addin(cpu_status_t*, char*);
@ -41,6 +43,7 @@ uint16_t cpu_read16(cpu_status_t*, uint32_t);
uint8_t cpu_read8(cpu_status_t*, uint32_t);
void display_update(display_t* display, cpu_status_t* status);
void display_set_data_register(display_t* display, uint8_t value, cpu_status_t* status);
void cpu_write32(cpu_status_t* status, uint32_t addr, uint32_t data);
void cpu_write16(cpu_status_t* status, uint32_t addr, uint16_t data);

34
src/display.c
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@ -1,6 +1,35 @@
#include <display.h>
#include <cpu.h>
#define HIGH_BIT(b) ((b & 0x80) >> 7)
#define LO_BIT(b) ((b >> 0) & 1)
void display_set_register_selector(display_t* display, uint8_t value){
//printf("set register selector to %d\n", value);
display->register_selector = value;
}
void display_set_data_register(display_t* display, uint8_t value, cpu_status_t* status){
//printf("\e[35mset data register to %d register selector is %d\e[39m\n", value, display->register_selector);
if(display->register_selector == 8){
if(value==4){display->x=0;SDL_RenderPresent(display->renderer);return;}
display->line = value-128;
printf("\e[35mline to %d\e[39m\n", value-128+1);
}
if(display->register_selector == 10){
for(int b=0;b<8;b++){
if(HIGH_BIT(value << b) == 1){
display_pixel_on(display, display->x*8+b , display->line);
}
else {
display_pixel_off(display, display->x*8+b , display->line);
}
//printf("pix %d %d\n", display->x*8+b, display->line);
}
display->x++;
}
}
void display_pixel_on(display_t* display, int x, int y){
SDL_SetRenderDrawColor(display->renderer, 70,65,69,255);
SDL_Rect rect;
@ -25,12 +54,8 @@ void display_clear(display_t* display){
SDL_SetRenderDrawColor(display->renderer, 179,204,174,255);
SDL_RenderClear(display->renderer);
}
#define HIGH_BIT(b) ((b & 0x80) >> 7)
#define LO_BIT(b) ((b >> 0) & 1)
void display_update(display_t* display, cpu_status_t* status){
display_clear(display);
for(int i=0; i<1024; i++){
uint8_t byte = status->vram[i];
for(int b=0; b<8;b++){
@ -50,4 +75,5 @@ void display_init(display_t* display){
SDL_Init( SDL_INIT_VIDEO );
display->window = SDL_CreateWindow("nemu", 100, 100, 3*128, 3*64, SDL_WINDOW_SHOWN);
display->renderer = SDL_CreateRenderer(display->window, -1, SDL_RENDERER_ACCELERATED | SDL_RENDERER_PRESENTVSYNC);
display_clear(display);
}

7
src/display.h
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@ -5,8 +5,15 @@ typedef struct{
SDL_Window* window;
SDL_Renderer* renderer;
SDL_Event event;
uint8_t line;
uint8_t x;
uint8_t register_selector;
uint8_t data_register;
}display_t;
void display_set_register_selector(display_t* display, uint8_t value);
void display_pixel_on(display_t* display, int x, int y);
void display_pixel_off(display_t* display, int x, int y);
void display_clear(display_t* display);

11
src/instructions/instructions.h
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@ -7,6 +7,7 @@ void instruction_mov_r_r(cpu_status_t*);
void instruction_mov_imm_r(cpu_status_t*);
void instruction_movt_r(cpu_status_t* status);
void instruction_swapb_r_r(cpu_status_t* status);
void instruction_mova_disp_pc_r0(cpu_status_t* status);
void instruction_movl_disp_pc_r(cpu_status_t*);
void instruction_movl_ar_r(cpu_status_t*);
@ -28,6 +29,7 @@ void instruction_movw_r0_disp_gbr(cpu_status_t* status);
void instruction_movw_ar_r(cpu_status_t* status);
void instruction_movw_r0_r_r(cpu_status_t* status);
void instruction_movw_disp_gbr_r0(cpu_status_t* status);
void instruction_movw_r_r0_r(cpu_status_t* status);
void instruction_movb_ar_r(cpu_status_t* status);
void instruction_movb_r_ar(cpu_status_t* status);
@ -53,6 +55,8 @@ void instruction_rotcr_r (cpu_status_t* status);
void instruction_shad_r_r(cpu_status_t* status);
void instruction_shlr16_r(cpu_status_t* status);
void instruction_shlr8_r(cpu_status_t* status);
void instruction_rotr_r (cpu_status_t* status);
void instruction_rotl_r (cpu_status_t* status);
void instruction_div1_r_r(cpu_status_t* status);
void instruction_add_r_r(cpu_status_t* status);
@ -76,6 +80,10 @@ void instruction_subc_r_r(cpu_status_t* status);
void instruction_extsb_r_r(cpu_status_t* status);
void instruction_neg_r_r(cpu_status_t* status);
void instruction_cmp_str_r_r(cpu_status_t* status);
void instruction_div0u(cpu_status_t* status);
void instruction_tst_imm_r0 (cpu_status_t* status);
void instruction_dmulul_r_r(cpu_status_t* status);
void instruction_negc_r_r(cpu_status_t* status);
void instruction_jmp_r(cpu_status_t* status);
void instruction_bsr_lbl(cpu_status_t* status);
@ -86,6 +94,7 @@ void instruction_bra_lbl(cpu_status_t* status);
void instruction_bt_lbl(cpu_status_t* status);
void instruction_bts_lbl(cpu_status_t* status);
void instruction_bfs_lbl(cpu_status_t* status);
void instruction_braf_r(cpu_status_t* status);
void instruction_nop(cpu_status_t* status);
void instruction_stsl_mash_amr(cpu_status_t* status);
@ -97,6 +106,8 @@ void instruction_ldsl_arp_macl(cpu_status_t* status);
void instruction_sts_macl_r(cpu_status_t* status);
void instruction_ldc_r_gbr(cpu_status_t* status);
void instruction_stc_gbr_r(cpu_status_t* status);
void instruction_ldsl_arm_mach(cpu_status_t* status);
void instruction_sts_mach_r(cpu_status_t* status);
void instruction_tst_r_r(cpu_status_t* status);
void instruction_or_r_r(cpu_status_t* status);

16
src/instructions/jmp.c
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@ -52,6 +52,7 @@ void instruction_jsr_ar(cpu_status_t* status){
status->pc = temp;
if(a == 0x80010070){
status->pr = temp + 4;
syscall_handle(status, temp);
}
else{
@ -64,12 +65,13 @@ void instruction_jsr_ar(cpu_status_t* status){
void instruction_rts(cpu_status_t* status){
unsigned int temp;
temp = status->pc;
uint32_t pr = status->pr;
status->pc += 2;
cpu_execute(status);
status->pc = temp;
status->pc = status->pr;
status->pc = pr;
printf("\e[34mpc: %8x jump (rts) to %08x \e[39m\n", temp, status->pr);
}
@ -171,3 +173,15 @@ void instruction_bfs_lbl(cpu_status_t* status){
status->pc += 4;
}
void instruction_braf_r(cpu_status_t* status){
unsigned int temp;
temp = status->pc;
uint32_t a = status->r[LO_NIBBLE(cpu_read8(status,status->pc))];
status->pc += 2;
cpu_execute(status);
status->pc = temp;
status->pc = temp + 4 + a;
}

10
src/instructions/mov.c
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@ -32,4 +32,12 @@ void instruction_swapb_r_r(cpu_status_t* status){
status->r[n] = (status->r[m] & 0x0000FF00) >> 8;
status->r[n] = status->r[n] | temp1 | temp0;
status->pc += 2;
}
}
void instruction_mova_disp_pc_r0(cpu_status_t* status){
unsigned int disp;
disp = (unsigned int)(0x000000FF & cpu_read8(status,status->pc+1));
status->r[0] = (status->pc & 0xFFFFFFFC) + 4 + (disp << 2);
status->pc += 2;
}

14
src/instructions/movb.c
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@ -17,14 +17,16 @@ void instruction_movb_r_ar(cpu_status_t* status){
}
void instruction_movb_arp_r(cpu_status_t* status){
status->r[LO_NIBBLE(cpu_read8(status,status->pc))] = cpu_read8(status, status->r[HI_NIBBLE(cpu_read8(status,status->pc+1))]);
if ((status->r[LO_NIBBLE(cpu_read8(status,status->pc))] & 0x80) == 0)
status->r[LO_NIBBLE(cpu_read8(status,status->pc))] &= 0x000000FF;
int n = LO_NIBBLE(cpu_read8(status,status->pc));
int m = HI_NIBBLE(cpu_read8(status,status->pc+1));
status->r[n] = cpu_read8(status, status->r[m]);
if ((status->r[n] & 0x80) == 0)
status->r[n] &= 0x000000FF;
else
status->r[LO_NIBBLE(cpu_read8(status,status->pc))] |= 0xFFFFFF00;
status->r[n] |= 0xFFFFFF00;
if (LO_NIBBLE(cpu_read8(status,status->pc)) != HI_NIBBLE(cpu_read8(status,status->pc+1)))
status->r[HI_NIBBLE(cpu_read8(status,status->pc+1))] += 1;
if (n != m)
status->r[m] += 1;
status->pc += 2;
}

3
src/instructions/movl.c
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@ -23,7 +23,8 @@ void instruction_movl_r_ar(cpu_status_t* status) {
void instruction_movl_arp_r(cpu_status_t* status){
status->r[LO_NIBBLE(cpu_read8(status,status->pc))] = cpu_read32(status, status->r[HI_NIBBLE(cpu_read8(status,status->pc+1))]);
if (status->r[LO_NIBBLE(cpu_read8(status,status->pc))] != status->r[HI_NIBBLE(cpu_read8(status,status->pc+1))])
//if (status->r[LO_NIBBLE(cpu_read8(status,status->pc))] != status->r[HI_NIBBLE(cpu_read8(status,status->pc+1))])
if (LO_NIBBLE(cpu_read8(status,status->pc)) != HI_NIBBLE(cpu_read8(status,status->pc+1)))
status->r[HI_NIBBLE(cpu_read8(status,status->pc+1))] += 4;
status->pc += 2;
}

4
src/instructions/movw.c
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@ -90,3 +90,7 @@ void instruction_movw_disp_gbr_r0(cpu_status_t* status){
status->pc += 2;
}
void instruction_movw_r_r0_r(cpu_status_t* status){
cpu_write16(status, status->r[LO_NIBBLE(cpu_read8(status,status->pc))] + status->r[0], status->r[LO_NIBBLE(cpu_read8(status,status->pc))]);
status->pc += 2;
}

74
src/instructions/operations.c
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@ -76,12 +76,11 @@ void instruction_add_r_r(cpu_status_t* status){
}
void instruction_add_imm_r(cpu_status_t* status){
if ((cpu_read8(status,status->pc+1) & 0x80) == 0)
status->r[LO_NIBBLE(cpu_read8(status,status->pc))] += (0x000000FF & (long)cpu_read8(status,status->pc+1));
else
status->r[LO_NIBBLE(cpu_read8(status,status->pc))] += (0xFFFFFF00 | (long)cpu_read8(status,status->pc+1));
status->pc += 2;
if ((cpu_read8(status,status->pc+1) & 0x80) == 0)
status->r[LO_NIBBLE(cpu_read8(status,status->pc))] += (0x000000FF & (long)cpu_read8(status,status->pc+1));
else
status->r[LO_NIBBLE(cpu_read8(status,status->pc))] += (0xFFFFFF00 | (long)cpu_read8(status,status->pc+1));
status->pc += 2;
}
void instruction_cmp_pz_r(cpu_status_t* status){
@ -275,5 +274,68 @@ void instruction_cmp_str_r_r(cpu_status_t* status){
else
status->t = 0;
status->pc += 2;
}
void instruction_div0u(cpu_status_t* status){
status->m = status->q = status->t = 0;
status->pc += 2;
}
void instruction_tst_imm_r0 (cpu_status_t* status){
long temp = status->r[0] & (0x000000FF & (long)cpu_read8(status,status->pc+1));
if (temp == 0)
status->t = 1;
else
status->t = 0;
status->pc += 2;
}
void instruction_dmulul_r_r(cpu_status_t* status){
unsigned long RnL, RnH, RmL, RmH, Res0, Res1, Res2;
unsigned long temp0, temp1, temp2, temp3;
RnL = status->r[LO_NIBBLE(cpu_read8(status,status->pc))] & 0x0000FFFF;
RnH = (status->r[LO_NIBBLE(cpu_read8(status,status->pc))] >> 16) & 0x0000FFFF;
RmL = status->r[HI_NIBBLE(cpu_read8(status,status->pc+1))] & 0x0000FFFF;
RmH = (status->r[HI_NIBBLE(cpu_read8(status,status->pc+1))] >> 16) & 0x0000FFFF;
temp0 = RmL * RnL;
temp1 = RmH * RnL;
temp2 = RmL * RnH;
temp3 = RmH * RnH;
Res2 = 0;
Res1 = temp1 + temp2;
if (Res1 < temp1)
Res2 += 0x00010000;
temp1 = (Res1 << 16) & 0xFFFF0000;
Res0 = temp0 + temp1;
if (Res0 < temp0)
Res2++;
Res2 = Res2 + ((Res1 >> 16) & 0x0000FFFF) + temp3;
status->mach = Res2;
status->macl = Res0;
status->pc += 2;
}
void instruction_negc_r_r(cpu_status_t* status){
unsigned long temp;
temp = 0 - status->r[HI_NIBBLE(cpu_read8(status,status->pc+1))];
status->r[LO_NIBBLE(cpu_read8(status,status->pc))] = temp - status->t;
if (0 < temp)
status->t = 1;
else
status->t = 0;
if (temp < status->r[LO_NIBBLE(cpu_read8(status,status->pc))])
status->t = 1;
status->pc += 2;
}

32
src/instructions/shift.c
View File

@ -151,4 +151,36 @@ void instruction_shlr8_r(cpu_status_t* status){
status->r[LO_NIBBLE(cpu_read8(status,status->pc))] >>= 8;
status->r[LO_NIBBLE(cpu_read8(status,status->pc))] &= 0x00FFFFFF;
status->pc += 2;
}
void instruction_rotr_r (cpu_status_t* status){
if ((status->r[LO_NIBBLE(cpu_read8(status,status->pc))] & 0x00000001) == 0)
status->t = 0;
else
status->t = 1;
status->r[LO_NIBBLE(cpu_read8(status,status->pc))] >>= 1;
if (status->t == 1)
status->r[LO_NIBBLE(cpu_read8(status,status->pc))] |= 0x80000000;
else
status->r[LO_NIBBLE(cpu_read8(status,status->pc))] &= 0x7FFFFFFF;
status->pc += 2;
}
void instruction_rotl_r (cpu_status_t* status){
if ((status->r[LO_NIBBLE(cpu_read8(status,status->pc))] & 0x80000000) == 0)
status->t = 0;
else
status->t = 1;
status->r[LO_NIBBLE(cpu_read8(status,status->pc))] <<= 1;
if (status->t == 1)
status->r[LO_NIBBLE(cpu_read8(status,status->pc))] |= 0x00000001;
else
status->r[LO_NIBBLE(cpu_read8(status,status->pc))] &= 0xFFFFFFFE;
status->pc += 2;
}

13
src/instructions/system.c
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@ -54,4 +54,17 @@ void instruction_ldc_r_gbr(cpu_status_t* status){
void instruction_stc_gbr_r(cpu_status_t* status){
status->r[LO_NIBBLE(cpu_read8(status,status->pc))] = status->gbr;
status->pc += 2;
}
void instruction_ldsl_arm_mach(cpu_status_t* status){
status->mach = cpu_read32(status, status->r[LO_NIBBLE(cpu_read8(status,status->pc))]);
status->r[LO_NIBBLE(cpu_read8(status,status->pc))] += 4;
status->pc += 2;
}
void instruction_sts_mach_r(cpu_status_t* status){
status->r[LO_NIBBLE(cpu_read8(status,status->pc))] = status->mach;
status->r[LO_NIBBLE(cpu_read8(status,status->pc))] |= 0xFFFFFC00;
status->pc += 2;
}

7
src/main.c
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@ -16,11 +16,8 @@ int main(int argc, char **argv){
cpu_status_t* status;
status = malloc(sizeof(cpu_status_t));
cpu_setup_addin(status, argv[1]);
status->r[15] = 0x08100000 + 524288 - 32768/4;
printf("(ram read test) 0x08100000: %8x\n",cpu_read32(status,0x08100000));
cpu_write32(status,0x08100004, 0x00560000);
printf("(ram write test) 0x00560000 at 0x08100004. result: %8x\n", cpu_read32(status,0x08100004));
printf("(rom read test) 0x00300200: %8x\n",cpu_read32(status,0x00300200));
status->r[15] = 0x08100000 + 524288;
cpu_run_from(status, 0x00300200);