106 lines
2.1 KiB
ArmAsm
106 lines
2.1 KiB
ArmAsm
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.global _CGD_sector_memcmp
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.align 4
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# A pretty fast memcmp for 512-byte sectors, with equal(0)-different(1) output
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# r4: 32-aligned pointer to sector in RAM (preferably 1-cycle operand bus RAM)
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# r5: 32-aligned pointer to sector in ROM
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# r6: 512 (ignored; for compatibility with memcmp prototype)
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#
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# There are two main ideas in this code:
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#
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# * Read with words, since such is the affinity of the ROM. (I don't know why.)
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# I tested with longwords, the performance is much worse; bytes are somewhere
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# in-between, which tormented me as I wondered why the most trivial memcmp()
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# with poor assembler from libfxcg was faster than my hand-written function.
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#
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# * Weave iterations with smart register allocation to exploit superscalar
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# parallelism. We read to r0/r1 while comparing r2/r3, then vice-versa. The
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# two mov.w (LS) for one comparison execute in parallel with the cmp (EX) and
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# bf (BR) of the previous comparison, so overall one comparison takes 2
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# cycles (plus any extra cycles in ROM reads if the cache isn't hit or
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# doesn't respond immediately, and some loop overhead).
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#
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_CGD_sector_memcmp:
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# For the first 32 bytes, compare as fast as possible to exit early
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# when the sectors don't match (this saves a little bit).
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mov #16, r7
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1: mov.w @r5+, r0
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mov.w @r4+, r1
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cmp/eq r0, r1
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bf .fail
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dt r7
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bf 1b
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mov #30, r7
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.line:
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# There is a 2-cycle delay for the RAW dependency between each mov.b
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# and the corresponding use. Here the delay is honored so there are no
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# cycles lost to RAW dependencies.
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mov.w @r5+, r0
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nop
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mov.w @r4+, r1
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nop
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mov.w @r5+, r2
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nop
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mov.w @r4+, r3
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cmp/eq r0, r1
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mov.w @r5+, r0
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bf .fail
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mov.w @r4+, r1
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cmp/eq r2, r3
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mov.w @r5+, r2
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bf .fail
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mov.w @r4+, r3
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cmp/eq r0, r1
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mov.w @r5+, r0
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bf .fail
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mov.w @r4+, r1
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cmp/eq r2, r3
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mov.w @r5+, r2
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bf .fail
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mov.w @r4+, r3
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cmp/eq r0, r1
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mov.w @r5+, r0
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bf .fail
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mov.w @r4+, r1
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cmp/eq r2, r3
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mov.w @r5+, r2
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bf .fail
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mov.w @r4+, r3
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cmp/eq r0, r1
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# These two can run in parallel (BR/EX)
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bf .fail
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cmp/eq r2, r3
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bf .fail
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dt r7
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bf .line
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.success:
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rts
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mov #0, r0
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.fail:
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# We don't specify an order
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rts
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mov #1, r0
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